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JPH06150544A - Signal recording and reproducing system - Google Patents

Signal recording and reproducing system

Info

Publication number
JPH06150544A
JPH06150544A JP29325892A JP29325892A JPH06150544A JP H06150544 A JPH06150544 A JP H06150544A JP 29325892 A JP29325892 A JP 29325892A JP 29325892 A JP29325892 A JP 29325892A JP H06150544 A JPH06150544 A JP H06150544A
Authority
JP
Japan
Prior art keywords
circuit
frequency
conversion circuits
recording
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29325892A
Other languages
Japanese (ja)
Inventor
Shizuo Akiyama
鎮男 秋山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP29325892A priority Critical patent/JPH06150544A/en
Publication of JPH06150544A publication Critical patent/JPH06150544A/en
Pending legal-status Critical Current

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  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To decelerate a required speed by returning respective outputs of plural converter circuits to an original frequency band with regenerative frequency converter circuits and synthesizing these outputs. CONSTITUTION:An analog signal with a high speed and a wide band is inputted to an input terminal 11 and distributed to (n) by a distribution circuit 13. Further, the (n) channel analog signals with the high speed and the wide band are inputted to the input terminals 121-12n, and whether the (n) distribution outputs of the circuit 13 are recorded or the (n) channel inputs are recorded is selected by switches 141-14n. The selected analog signals are converted to the same frequency band with a low band and a low speed by frequency converter circuits 151-15n. The output signals become digital signals by A/D converter circuits 161-16n, and (n) channel parallel inputs are synchronized by a recording control circuit and recorded in a storage 18 as serial data. The recording data are returned to the original frequency by regenerative frequency converter circuits 211-21n and synthesized a synthesizer circuit 22. Then, an operational speed is lowered at the low frequency band.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、高周波広帯域のアナ
ログ信号をデジタル信号に変換し記録再生する信号記録
再生方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal recording / reproducing system for converting an analog signal of a high frequency wide band into a digital signal and recording / reproducing it.

【0002】[0002]

【従来の技術】周知のように、高周波で広帯域のアナロ
グ信号を連続的にデジタル信号に変換して記録する場
合、その信号周波数に合致したサンプリング周波数でサ
ンプリングし、A/D(アナログ/デジタル)変換後、
記憶装置に入力して記録するようにしている。
2. Description of the Related Art As is well known, when a high frequency and wide band analog signal is continuously converted into a digital signal for recording, sampling is performed at a sampling frequency matching the signal frequency, and A / D (analog / digital) After conversion,
The data is input to the storage device and recorded.

【0003】しかしながら、上記の信号記録再生方式で
は、入力信号の周波数が高くなればなるほどサンプリン
グ周波数が高くなり、それを実現するためのA/D変換
回路やその周辺回路に要求される動作速度が非常に高速
になり、場合によっては実現困難になる。
However, in the above signal recording / reproducing system, the higher the frequency of the input signal, the higher the sampling frequency, and the operating speed required for the A / D conversion circuit and its peripheral circuits to realize it. Very fast, and sometimes difficult to achieve.

【0004】また、記録すべき信号の時間が長い場合に
は、記憶装置として記憶容量の大きい磁気テープ等が用
いられるが、高速になると多チャンネル同時記録が実現
できなくなり、複数台の記憶装置を並列運転する必要が
ある。
When a signal to be recorded has a long time, a magnetic tape or the like having a large storage capacity is used as a storage device. However, at high speed, multi-channel simultaneous recording cannot be realized and a plurality of storage devices can be used. It is necessary to operate in parallel.

【0005】[0005]

【発明が解決しようとする課題】以上述べたように、従
来の信号記録再生方式では、入力信号の高周波化に従っ
てサンプリング周波数の高くしなければならないため、
A/D変換回路やその周辺回路に要求される動作速度が
非常に高速となり、また記録時間が長い場合にはその高
速化により多チャンネル同時記録が実現できなくなり、
入力チャンネルを一つしか持たない記憶装置を利用でき
なくなってしまう。
As described above, in the conventional signal recording / reproducing system, the sampling frequency must be increased as the frequency of the input signal becomes higher.
The operation speed required for the A / D conversion circuit and its peripheral circuits becomes very high, and when the recording time is long, the high speed operation makes it impossible to realize multi-channel simultaneous recording.
It becomes impossible to use a storage device having only one input channel.

【0006】この発明は上記の課題を解決するためにな
されたもので、A/D変換回路及びその周辺回路に要求
される速度を低くすることができ、しかも入力チャンネ
ルを一つしか持たない記憶装置上に互いに複数の異なる
信号を同時に記録できる信号記録再生方式を提供するこ
とを目的とする。
The present invention has been made in order to solve the above problems, and can reduce the speed required for the A / D conversion circuit and its peripheral circuits, and has a memory having only one input channel. An object is to provide a signal recording / reproducing system capable of simultaneously recording a plurality of different signals on a device.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
にこの発明に係る信号記録再生方式は、1つの入力アナ
ログ信号を複数チャンネルに分配する分配回路と、この
分配回路の分配チャンネル毎に設けられ、入力信号を低
い周波数で狭帯域の信号に変換する複数個の記録周波数
変換回路と、これらの変換回路の各出力をデジタル信号
に変換する複数個のアナログ/デジタル変換回路と、こ
れらの変換回路の各出力を同期化しかつシルアル化する
記憶制御回路と、この回路出力を記録する記憶装置と、
この記憶装置の再生出力をパラレル化して複数のチャン
ネル信号に戻す再生制御回路と、この回路の出力チャン
ネル毎に設けられ、それぞれ対応するチャンネル信号に
変換する複数個のデジタル/アナログ変換回路と、これ
らの変換回路の各出力を元の周波数帯に戻す複数個の再
生周波数変換回路と、これらの変換回路の出力を合成す
る合成回路とを具備
In order to achieve the above object, a signal recording / reproducing system according to the present invention provides a distribution circuit for distributing one input analog signal to a plurality of channels, and a distribution circuit provided for each distribution channel of the distribution circuit. A plurality of recording frequency conversion circuits for converting an input signal into a narrow band signal at a low frequency, a plurality of analog / digital conversion circuits for converting each output of these conversion circuits into a digital signal, and these conversions A storage control circuit for synchronizing and serializing each output of the circuit, and a storage device for recording the circuit output,
A reproduction control circuit that parallelizes the reproduction output of the storage device to return to a plurality of channel signals, a plurality of digital / analog conversion circuits that are provided for each output channel of this circuit, and that convert into corresponding channel signals, respectively. A plurality of reproduction frequency conversion circuits for returning the respective outputs of the conversion circuits to the original frequency band, and a combining circuit for combining the outputs of these conversion circuits.

【0008】[0008]

【作用】上記構成による信号記録再生方式では、一つの
高周波広帯域のアナログ信号を複数チャンネルに分配
し、その分配チャンネル毎に設けられた周波数変換回路
により低い周波数で狭帯域の信号に変換し、デジタル信
号に変換した後、同期化しかつシルアル化して記憶装置
に記録し、この記憶装置の再生出力をパラレル化して複
数のチャンネル信号に戻し、出力チャンネル毎にD/A
変換し、さらに元の周波数帯に戻し、合成することで高
周波広帯域信号の記録再生を行うことを特徴とする。
In the signal recording / reproducing system having the above structure, one high frequency wide band analog signal is distributed to a plurality of channels, and a frequency conversion circuit provided for each distribution channel converts the analog signal into a narrow band signal at a low frequency. After being converted into a signal, they are synchronized and serialized and recorded in a memory device, and the reproduction output of this memory device is parallelized and returned to a plurality of channel signals, and D / A for each output channel.
It is characterized in that high-frequency wideband signals are recorded and reproduced by converting, returning to the original frequency band, and synthesizing.

【0009】[0009]

【実施例】以下、図面を参照してこの発明の一実施例を
詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

【0010】図1はこの発明に係る信号記録方式を用い
た装置構成を示すものである。入力端子11には高速広
帯域のアナログ信号が入力され、分配回路13によりn
分配される。他方、入力端子121〜12nにはそれぞ
れ高速広帯域のnチャンネルアナログ信号が入力され
る。分配回路13のn分配出力を記録するか、nチャン
ネル入力を記録するかはスイッチ141〜14nによっ
て選択する。
FIG. 1 shows an apparatus configuration using the signal recording method according to the present invention. A high-speed broadband analog signal is input to the input terminal 11, and the distribution circuit 13
To be distributed. On the other hand, high-speed wideband n-channel analog signals are input to the input terminals 121 to 12n, respectively. The switches 141 to 14n select whether to record the n-divided output of the distribution circuit 13 or the n-channel input.

【0011】スイッチ141〜14nで選択されたアナ
ログ信号はそれぞれ周波数変換回路151〜15nによ
り狭帯域でかつ低い同一周波数帯に変換される。各回路
には入力信号の周波数帯域をn分割した各帯域が順に割
り当てられる。図2はその様子を示しており、入力信号
が周波数fL からfH まで連続しているものとして、高
い周波数帯の一部が切り出され、低い周波数帯に変換す
る様子を示している。
The analog signals selected by the switches 141 to 14n are converted into the narrow and narrow same frequency band by the frequency conversion circuits 151 to 15n, respectively. Bands obtained by dividing the frequency band of the input signal into n are sequentially assigned to the respective circuits. FIG. 2 shows the situation, and shows that the input signal is continuous from the frequencies fL to fH, a part of the high frequency band is cut out, and is converted into the low frequency band.

【0012】各周波数変換回路151〜15nの出力信
号はA/D変換回路161〜16nでそれぞれデジタル
信号(データ)に変換されて記録制御回路17に送られ
る。この記録制御回路17は同期回路でnチャンネルパ
ラレル入力の同期化を図り、さらに所定の記録フォーマ
ットでシリアルデータに変換する。この変換データは例
えば磁気テープ等を記憶媒体とする記憶装置18に記録
される。
The output signals of the frequency conversion circuits 151 to 15n are converted into digital signals (data) by the A / D conversion circuits 161 to 16n and sent to the recording control circuit 17. The recording control circuit 17 synchronizes an n-channel parallel input with a synchronizing circuit, and further converts it into serial data in a predetermined recording format. The converted data is recorded in the storage device 18 having a magnetic tape or the like as a storage medium.

【0013】記憶装置18から記録データを再生する
と、その再生データは再生制御装置19でもとのnチャ
ンネルパラレルデータに戻される。各チャンネルデータ
はそれぞれD/A(アナログ/デジタル)変換回路20
1〜20nでアナログ信号に変換され、それぞれ周波数
変換回路211〜21nに送られる。
When the recorded data is reproduced from the storage device 18, the reproduced data is returned to the original n-channel parallel data by the reproduction control device 19. Each channel data is converted into a D / A (analog / digital) conversion circuit 20.
The signals are converted into analog signals at 1 to 20n and sent to the frequency conversion circuits 211 to 21n, respectively.

【0014】各周波数変換回路211〜21nはそれぞ
れ入力側とは逆の変換機能を有し、入力信号を元の周波
数に変換する。各周波数変換回路211〜21nの出力
は、記録データがn分配入力である場合には、合成回路
22で合成されて出力端子23から導出される。また、
記録データがnチャンネル入力である場合には出力端子
241〜24nから直接的に導出される。
Each of the frequency conversion circuits 211 to 21n has a conversion function opposite to that on the input side, and converts the input signal to the original frequency. The outputs of the frequency conversion circuits 211 to 21n are combined by the combining circuit 22 and derived from the output terminal 23 when the recording data is n distribution input. Also,
When the recording data is n-channel input, it is directly derived from the output terminals 241 to 24n.

【0015】すなわち、上記構成による信号記録再生装
置では、入力端子11からの高速広帯域アナログ信号を
分配回路13でn分配し、他方、入力端子121〜12
nからの高速広帯域nチャンネル信号と同等に扱い、分
配回路13のn分配出力を記録するか、nチャンネル入
力を記録するかをスイッチ141〜14nによって任意
に選択することができる。
That is, in the signal recording / reproducing apparatus having the above-mentioned structure, the high-speed wideband analog signal from the input terminal 11 is distributed to the distribution circuit 13 by n, while the input terminals 121 to 12 are distributed.
The switches 141 to 14n can arbitrarily select whether to record the n-divided output of the distribution circuit 13 or the n-channel input, by treating it as a high-speed wideband n-channel signal from n.

【0016】選択されたアナログ信号は、それぞれ異な
る周波数帯を扱う周波数変換回路151〜15nによ
り、図2に示すように狭帯域でかつ低い同一周波数帯に
変換され、さらにA/D変換回路161〜16nでそれ
ぞれデジタル信号(データ)に変換される。各チャンネ
ルのA/D変換データは記録制御回路17で同期化さ
れ、シリアルデータに変換されて、記憶装置18に記録
される。
The selected analog signal is converted into a narrow and low same frequency band as shown in FIG. 2 by frequency conversion circuits 151 to 15n which respectively handle different frequency bands, and further A / D conversion circuits 161 to 161. In 16n, each is converted into a digital signal (data). The A / D converted data of each channel is synchronized by the recording control circuit 17, converted into serial data, and recorded in the storage device 18.

【0017】記憶装置18の再生出力は再生制御装置1
9でもとのnチャンネルパラレルデータに戻され、それ
ぞれD/A変換回路201〜20nでアナログ信号に変
換される。これらは低速狭帯域の信号であり、それぞれ
周波数変換回路211〜21nで入力側とは逆に変換さ
れ、これによって元の周波数帯に戻される。
The reproduction output of the storage device 18 is the reproduction control device 1.
At 9, the original n-channel parallel data is restored and converted into analog signals by the D / A conversion circuits 201 to 20n. These are low-speed narrow-band signals, which are respectively converted by the frequency conversion circuits 211 to 21n in the opposite manner to those on the input side and thereby returned to the original frequency band.

【0018】ここで、各周波数変換出力を合成回路22
で合成すれば、入力端子11に入力された高速広帯域の
アナログ信号の再生信号として、出力端子23から取り
出すことができる。また、出力端子241〜24nから
各周波数変換出力を直接的に取り出すことにより、入力
端子121〜12nに入力されたnチャンネルアナログ
信号の再生信号を得ることができる。
Here, each frequency conversion output is combined with the synthesizing circuit 22.
If combined with, it can be taken out from the output terminal 23 as a reproduction signal of a high-speed wideband analog signal input to the input terminal 11. Further, by directly taking out the respective frequency conversion outputs from the output terminals 241 to 24n, it is possible to obtain the reproduced signals of the n-channel analog signals input to the input terminals 121 to 12n.

【0019】このように、上記構成の信号記録再生装置
では、入力信号を周波数変換して低い周波数帯に変換す
ることで、A/D変換及びD/A変換に要求される動作
速度を低くしている。さらに、その帯域幅を狭く分割す
ることにより、回路全体の実現性を容易にすると共に、
信号品質の向上に寄与している。
As described above, in the signal recording / reproducing apparatus having the above configuration, the operating speed required for the A / D conversion and the D / A conversion is lowered by converting the frequency of the input signal into the low frequency band. ing. Furthermore, by dividing the bandwidth narrowly, it is easy to realize the entire circuit,
It contributes to the improvement of signal quality.

【0020】また、複数の異なる信号を1つのチャンネ
ルに同時に記録できるということは、信号どうしの時間
的関係の再現性が重要となる用途においては最も効果が
あり、記憶媒体の管理も容易になるという利点もある。
The ability to simultaneously record a plurality of different signals on one channel is most effective in applications where reproducibility of the temporal relationship between signals is important, and storage medium management becomes easy. There is also an advantage.

【0021】したがって、上記装置を実現する信号記録
再生方式は、超高速のA/D変換回路を用いることな
く、広帯域の高周波アナログ信号をデジタル信号に変換
して記録再生することができ、また、異なる複数のアナ
ログ信号を1つのチャンネル入力しか持たない記憶装置
に記録再生することができる。
Therefore, the signal recording / reproducing system for realizing the above device can convert a wideband high frequency analog signal into a digital signal for recording / reproducing without using an ultra-high speed A / D conversion circuit. It is possible to record and reproduce a plurality of different analog signals in a storage device having only one channel input.

【0022】尚、この発明は上記実施例に限定されるも
のではなく、その他、この発明の要旨を逸脱しない範囲
で種々変形しても同様に実施可能であることはいうまで
もない。
It is needless to say that the present invention is not limited to the above-described embodiments, and that various modifications may be made without departing from the scope of the invention.

【0023】[0023]

【発明の効果】以上のようにこの発明によれば、A/D
変換回路及びその周辺回路に要求される速度を低くする
ことができ、しかも入力チャンネルを一つしか持たない
記憶装置上に互いに複数の異なる信号を同時に記録でき
る信号記録再生方式を提供することができる。
As described above, according to the present invention, the A / D
It is possible to reduce the speed required for the conversion circuit and its peripheral circuits, and to provide a signal recording / reproducing system capable of simultaneously recording a plurality of different signals on a storage device having only one input channel. .

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明に係る信号記録再生方式の一実施例の
回路構成を示すブロック構成図。
FIG. 1 is a block configuration diagram showing a circuit configuration of an embodiment of a signal recording / reproducing system according to the present invention.

【図2】同実施例の信号周波数変換の様子を示す図。FIG. 2 is a diagram showing how signal frequency conversion is performed in the embodiment.

【符号の説明】[Explanation of symbols]

11,121〜12n…入力端子、13…分配回路、1
41〜14n…スイッチ、151〜15n…周波数変換
回路、161〜16n…A/D変換回路、17…記録制
御回路、18…記憶装置、19…再生制御装置、201
〜20n…D/A変換回路、211〜21n…周波数変
換回路、22…合成回路、23,241〜24n…出力
端子。
11, 121 to 12n ... Input terminal, 13 ... Distribution circuit, 1
41 to 14n ... Switch, 151 to 15n ... Frequency conversion circuit, 161 to 16n ... A / D conversion circuit, 17 ... Recording control circuit, 18 ... Storage device, 19 ... Reproduction control device, 201
20n ... D / A conversion circuit, 211-21n ... Frequency conversion circuit, 22 ... Combining circuit, 23, 241-24n ... Output terminal.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】1つの入力アナログ信号を複数チャンネル
に分配する分配回路と、この分配回路の分配チャンネル
毎に設けられ、入力信号を低い周波数で狭帯域の信号に
変換する複数個の記録周波数変換回路と、これらの変換
回路の各出力をデジタル信号に変換する複数個のアナロ
グ/デジタル変換回路と、これらの変換回路の各出力を
同期化しかつシルアル化する記憶制御回路と、この回路
出力を記録する記憶装置と、この記憶装置の再生出力を
パラレル化して複数のチャンネル信号に戻す再生制御回
路と、この回路の出力チャンネル毎に設けられ、それぞ
れ対応するチャンネル信号に変換する複数個のデジタル
/アナログ変換回路と、これらの変換回路の各出力を元
の周波数帯に戻す複数個の再生周波数変換回路と、これ
らの変換回路の出力を合成する合成回路とを具備する信
号記録再生方式。
1. A distribution circuit for distributing one input analog signal to a plurality of channels, and a plurality of recording frequency converters provided for each distribution channel of the distribution circuit and converting the input signal into a narrow band signal at a low frequency. Circuits, a plurality of analog / digital conversion circuits for converting the outputs of these conversion circuits into digital signals, a storage control circuit for synchronizing and serializing the outputs of these conversion circuits, and recording the circuit outputs Storage device, a playback control circuit for parallelizing the playback output of this storage device into a plurality of channel signals, and a plurality of digital / analog converters provided for each output channel of this circuit and converting to corresponding channel signals. The conversion circuits, a plurality of reproduction frequency conversion circuits that return each output of these conversion circuits to the original frequency band, and the outputs of these conversion circuits. Signal recording and reproducing method comprising a combining circuit for combining the.
【請求項2】さらに、前記分配回路の分配出力に代わっ
て複数チャンネルのアナログ信号を前記複数個の記録周
波数変換回路に導出する複数個のスイッチを備え、前記
複数個の再生周波数変換回路の各出力を直接導出するよ
うにしたことを特徴とする請求項1記載の信号記録再生
方式。
2. A plurality of switches for deriving analog signals of a plurality of channels to the plurality of recording frequency conversion circuits instead of the distribution output of the distribution circuit, each of the plurality of reproduction frequency conversion circuits. 2. The signal recording / reproducing system according to claim 1, wherein the output is directly derived.
JP29325892A 1992-10-30 1992-10-30 Signal recording and reproducing system Pending JPH06150544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29325892A JPH06150544A (en) 1992-10-30 1992-10-30 Signal recording and reproducing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29325892A JPH06150544A (en) 1992-10-30 1992-10-30 Signal recording and reproducing system

Publications (1)

Publication Number Publication Date
JPH06150544A true JPH06150544A (en) 1994-05-31

Family

ID=17792503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29325892A Pending JPH06150544A (en) 1992-10-30 1992-10-30 Signal recording and reproducing system

Country Status (1)

Country Link
JP (1) JPH06150544A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006308585A (en) * 2005-04-29 2006-11-09 Tektronix Inc Acquisition apparatus, digitizing method and measuring instrument

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006308585A (en) * 2005-04-29 2006-11-09 Tektronix Inc Acquisition apparatus, digitizing method and measuring instrument
JP4677574B2 (en) * 2005-04-29 2011-04-27 テクトロニクス・インコーポレイテッド Measuring instrument take-in device

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