JPH0613432A - Connecting method for semiconductor integrated circuit device - Google Patents
Connecting method for semiconductor integrated circuit deviceInfo
- Publication number
- JPH0613432A JPH0613432A JP19138192A JP19138192A JPH0613432A JP H0613432 A JPH0613432 A JP H0613432A JP 19138192 A JP19138192 A JP 19138192A JP 19138192 A JP19138192 A JP 19138192A JP H0613432 A JPH0613432 A JP H0613432A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- conductive
- circuit board
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29399—Coating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体集積回路装置と回
路基板との接続方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for connecting a semiconductor integrated circuit device and a circuit board.
【0002】[0002]
【従来の技術】従来、半導体集積回路装置と回路基板と
の接続方法としては、半導体集積回路装置を封止した上
で、この封止ずみの半導体集積回路装置をソケットを介
して回路基板に接続する方法や、あるいはこのソケット
を省略して、封止ずみの半導体集積回路装置を直接回路
基板にはんだ接続する方法が一般的である。2. Description of the Related Art Conventionally, as a method of connecting a semiconductor integrated circuit device and a circuit board, after sealing the semiconductor integrated circuit device, the sealed semiconductor integrated circuit device is connected to the circuit board through a socket. In general, this method is used, or this socket is omitted and the sealed semiconductor integrated circuit device is directly soldered to the circuit board.
【0003】ソケットを用いて接続する方法では、ソケ
ットの接続部の摺動部、あるいは封止ずみの半導体集積
回路装置部品の細長い足ピン部分の機械的変形により、
回路基板と半導体集積回路装置との温度熱膨張係数の差
異による機械的歪みや、応力が吸収され、機械的接続と
電気的接続とが両立する。In the method of connecting by using a socket, the sliding portion of the connection portion of the socket or the mechanical deformation of the elongated foot pin portion of the semiconductor integrated circuit device component that has been sealed causes mechanical deformation.
Mechanical strain and stress due to the difference in thermal expansion coefficient between the circuit board and the semiconductor integrated circuit device are absorbed, and both mechanical connection and electrical connection are achieved.
【0004】またさらに、ソケットの電気的接触部分の
表面には金メッキが施され、酸化による接続不良が生じ
ないようにしている。Furthermore, the surface of the electrical contact portion of the socket is plated with gold to prevent a connection failure due to oxidation.
【0005】これらの実装方法は、長年に渡る使用実績
がある優れた方法である。しかしながら、半導体集積回
路装置と回路基板との実装に要する体積が大きく、装置
の小形化の隘路になっている。These mounting methods are excellent methods that have been used for many years. However, the volume required for mounting the semiconductor integrated circuit device and the circuit board is large, which is a bottleneck for downsizing the device.
【0006】この実装体積が大きいという点を解決する
方法として、半導体集積回路片(以下ICチップと記載
する)の各接続電極部分に、バンプと呼ばれるはんだの
突起電極を形成し、回路基板に直接ICチップをはんだ
付けする、いわゆるフリップチップ方式が提案され、実
用化されている。As a method for solving the problem that the mounting volume is large, solder bump electrodes called bumps are formed on each connection electrode portion of a semiconductor integrated circuit piece (hereinafter referred to as an IC chip), and the solder bump electrodes are directly formed on the circuit board. A so-called flip chip method of soldering an IC chip has been proposed and put into practical use.
【0007】しかし、ICチップと回路基板とを数十μ
mの短い距離で対向させ、直径が数十μmと大きいハン
ダバンプを用いて機械的に固着するため、ICチップと
回路基板とにおける機械的寸法の温度熱膨脹係数の差異
による変形が発生し、応力の逃げ場がなく、これによる
機械的破壊が生じる。However, the IC chip and the circuit board are tens of μ
Since they are opposed to each other at a short distance of m and are mechanically fixed by using solder bumps having a large diameter of several tens of μm, deformation occurs due to the difference in the thermal expansion coefficient between the mechanical dimensions of the IC chip and the circuit board, which causes stress. There is no escape, which causes mechanical destruction.
【0008】この機械的破壊を抑制するためには、シリ
コンのICチップとエポキシ材料からなる回路基板とを
接続する場合、ICチップの大きさとしては数mm、シ
リコンのICチップとガラス材料からなる回路基板とを
接続する場合で、ICチップの大きさは10mm程度が
上限である。In order to suppress this mechanical destruction, when a silicon IC chip and a circuit board made of an epoxy material are connected, the size of the IC chip is several mm, and the silicon IC chip and the glass material are used. When connecting to a circuit board, the maximum size of the IC chip is about 10 mm.
【0009】ハンダバンプの代わりに、半導体集積回路
装置の外部接続電極であるアルミニウム電極上にバリヤ
金属層を介して金バンプを形成し、薄い絶縁フィルム上
に薄い銅箔を形成してパターニングした可撓性を有する
回路基板にICチップを実装して、温度熱膨脹係数の差
異による変形や、応力を吸収し、この可撓性の回路基板
を通常の回路基板に接続する方法、いわゆるTAB方式
が提案され実施されている。Instead of solder bumps, gold bumps are formed on an aluminum electrode, which is an external connection electrode of a semiconductor integrated circuit device, via a barrier metal layer, and a thin copper foil is formed on a thin insulating film to form a flexible pattern. A so-called TAB method has been proposed in which an IC chip is mounted on a flexible circuit board to absorb deformation and stress due to a difference in thermal expansion coefficient and to connect this flexible circuit board to a normal circuit board. It has been implemented.
【0010】しかし、このTAB方式では、可撓性の回
路基板を介在させるための実装面積が大きくなり、半導
体集積回路装置へのバリヤ金属層形成のための工程追
加、および金バンプ形成のための貴金属使用によるコス
トの増加の欠点がある。However, in this TAB method, a mounting area for interposing a flexible circuit board becomes large, and a step for forming a barrier metal layer is added to a semiconductor integrated circuit device, and a gold bump is formed. There is a drawback of increased cost due to the use of precious metals.
【0011】またさらにICチップと微細パターンの可
撓性の回路基板との接続部における貴金属の使用は、簡
易的な耐湿樹脂封止においては、短い距離の接続電極間
において、貴金属溶出再結晶化による電極短絡事故を生
じ易いという信頼性上の欠点がある。Furthermore, the use of the noble metal in the connection portion between the IC chip and the flexible circuit board having the fine pattern is such that noble metal is eluted and recrystallized between the connection electrodes at a short distance in the simple moisture-proof resin sealing. There is a drawback in reliability in that an electrode short circuit accident due to is likely to occur.
【0012】安価な実装方法の1つとして信頼性におい
て多少不安はあるが、ICチップを導電ペ−ストを用い
て回路基板に、直接実装する方法が存在する。Although there is some concern about reliability as one of inexpensive mounting methods, there is a method of directly mounting an IC chip on a circuit board using a conductive paste.
【0013】ICチップの接続電極部分のみを回路基板
と電気的接続するために、半導体集積回路装置の外部接
続電極であるアルミニウム電極上に、バンプとよばれる
金メッキを行った、大きさが数十μmの多数の突起電極
を形成する。さらに、昔から知られる凸版印刷の手法を
用いて、この突起電極部分にのみ導電ペ−ストを塗布
し、これを回路基板に接続する。In order to electrically connect only the connection electrode portion of the IC chip to the circuit board, an aluminum electrode, which is an external connection electrode of the semiconductor integrated circuit device, is plated with gold called a bump. A large number of projecting electrodes of μm are formed. Further, by using a letterpress printing method known from old days, a conductive paste is applied only to the protruding electrode portion and connected to the circuit board.
【0014】ICチップと回路基板とを接続する導電ペ
−ストは、二液混合型あるいは熱硬化型の接着剤と、銀
粒子あるいはパラジウム銀微粒子を混練したもので、機
械的接続と電気的接続とを同時に達成する。The conductive paste for connecting the IC chip and the circuit board is a mixture of a two-liquid type or thermosetting adhesive and silver particles or palladium silver fine particles, and is mechanically and electrically connected. And at the same time.
【0015】この導電ペーストを用いた接続を成立させ
るには、多数の突起電極の高さが揃っていることと、接
続電極間ピッチ寸法を充分広くして導電ペ−ストの接続
電極からのはみ出し距離よりも大きいこととが必要であ
る。In order to establish a connection using this conductive paste, the heights of a large number of protruding electrodes are made uniform, and the pitch dimension between the connecting electrodes is made sufficiently wide to allow the conductive paste to protrude from the connecting electrodes. It must be greater than the distance.
【0016】さらに、この導電ペーストを用いた実装方
法においても、前述の温度熱膨脹係数の差異によって発
生する機械的歪みによる応力や、変形の問題を解決しな
ければならない。Further, also in the mounting method using this conductive paste, it is necessary to solve the problems of stress and deformation due to mechanical strain generated due to the difference in thermal expansion coefficient.
【0017】現在は導電ペーストを用いた実装方法での
ICチップの大きさは、数mm以下の寸法で実用になっ
ている。これ以上の寸法のICチップでは、機械的歪み
による接続の剥がれやICチップの破壊が生じる。At present, the size of the IC chip in the mounting method using the conductive paste is practically a few mm or less. With an IC chip of a size larger than this, peeling of the connection or breakage of the IC chip occurs due to mechanical strain.
【0018】さらに、導電ペーストを用いた実装方法で
は、前述のバンプの形成のための半導体集積回路の製造
プロセスにおける追加工程のためのコスト増加と、通常
と異なる大きな接続電極のためのICチップの面積効率
の低下とが存在し、かえってICチップの単価が増大す
る。Further, in the mounting method using the conductive paste, the cost is increased due to an additional step in the manufacturing process of the semiconductor integrated circuit for forming the bumps described above, and the IC chip for a large connecting electrode which is different from usual is formed. There is a decrease in area efficiency, and the unit price of the IC chip is increased.
【0019】すなわち、信頼性とコストと実装体積との
総合評価では、ICチップを回路基板へ直接実装するこ
とによる経済効果は必ずしも大きくなく、信頼性では不
安定要素が存在し、体積効果にのみの優位性に依存する
傾向がある。That is, in the comprehensive evaluation of reliability, cost and mounting volume, the economic effect of directly mounting the IC chip on the circuit board is not necessarily large, and there is an unstable factor in reliability, and only the volume effect is present. Tends to depend on the superiority of.
【0020】しかし装置の小形化は時代の趨勢であり、
ICチップ実装面積と、実装体積の縮小と、多接続端子
の接続コストの画期的低下とは、強く望まれ有効な技術
の出現が待たれている。However, downsizing of the device is a trend of the times,
IC chip mounting area, mounting volume reduction, and epoch-making reduction in connection cost of multiple connection terminals are strongly desired, and the emergence of effective technology is awaited.
【0021】上記の理解の便利のため、図7の断面図に
従来の導電ペ−ストを用いた実装方法におけるICチッ
プと回路基板とを含む断面構造を示す。For convenience of understanding the above, the sectional view of FIG. 7 shows a sectional structure including an IC chip and a circuit board in a conventional mounting method using a conductive paste.
【0022】図7に示すように、ICチップ702は、
トランジスタや抵抗やコンデンサーなどの素子を形成す
る能動領域704の最上部のアルミニウムからなる金属
導電層706の一部が露出するように、保護膜層708
に接続穴をエッチングで形成する。この金属導電層70
6上には、クロムやチタンの単層膜、あるいは積層膜か
らなるバリヤ層(図示せず)を介してバンプ710を設
ける。As shown in FIG. 7, the IC chip 702 is
The protective film layer 708 is formed so that a part of the metal conductive layer 706 made of aluminum at the uppermost part of the active region 704 forming elements such as transistors and resistors and capacitors is exposed.
The connection hole is formed by etching. This metal conductive layer 70
Bumps 710 are provided on 6 via a barrier layer (not shown) made of a single layer film of chromium or titanium or a laminated film.
【0023】このバンプ710は銅で形成し、銅表面に
金メッキ膜を設ける。バンプ710の直径は百数十μm
あり、バンプの高さは数十μmある。通常、バンプ71
0高さのばらつきは、10μm程度ある。The bump 710 is made of copper, and a gold plating film is provided on the copper surface. The diameter of the bump 710 is hundreds of tens of μm.
The bump height is several tens of μm. Usually bump 71
The 0 height variation is about 10 μm.
【0024】導電ペ−スト712は、ICチップ702
と回路基板716との隙間が規定されているために、バ
ンプ710高さの誤差を吸収しており、導電ペ−スト7
12の横方向のはみ出し量は、バンプ710高さのばら
つき程度、すなわち10μm程度のばらつきが発生す
る。The conductive paste 712 is the IC chip 702.
Since the gap between the circuit board 716 and the circuit board 716 is defined, the height error of the bump 710 is absorbed, and the conductive paste 7
The lateral protrusion amount of 12 has a degree of variation in the height of the bump 710, that is, a variation of about 10 μm.
【0025】このためバンプ間距離748は、最悪条件
で隣り合った電極同志が短絡しないために、導電ペース
ト712の最低はみ出し量の2倍以上の距離、たとえば
30μm以上の寸法を必要とする。For this reason, the bump-to-bump distance 748 requires a distance of at least twice the minimum protrusion amount of the conductive paste 712, for example, a dimension of 30 μm or more, so that adjacent electrodes do not short-circuit under the worst conditions.
【0026】したがって実装するICチップ702の電
極ピッチは、数十μm以下の実装は無理があるのが実情
である。Therefore, in reality, it is not possible to mount the electrode pitch of the IC chip 702 to be several tens of μm or less.
【0027】さらにバンプ710高さのばらつきは、短
絡事故を生じて接続歩留りを低下させ、そのうえ温度変
化により実装領域での接続はがれを生じ、接続抵抗が不
安定になる。Further, the variation in height of the bumps 710 causes a short circuit accident to reduce the connection yield, and further, the temperature change causes a disconnection in the mounting area, which makes the connection resistance unstable.
【0028】導電ペーストを用いた接続方法とは別に、
金バンプの高さを数μmと低くして直接回路基板に押し
付け、紫外線硬化樹脂により、ICチップと回路基板と
を接続する構造が提案されている。しかしながらバンプ
高さばらつきを押し付け圧力のみで吸収させるには無理
がある。Apart from the connection method using the conductive paste,
A structure has been proposed in which the height of the gold bump is lowered to several μm and the gold bump is directly pressed against the circuit board, and the IC chip and the circuit board are connected by an ultraviolet curable resin. However, it is impossible to absorb the bump height variation only by pressing pressure.
【0029】さらに別のICチップと回路基板との接続
方法として、導電性被膜を被覆したプラスチック球を、
さらに薄い膜厚の熱溶融性のプラスチックで覆い、数μ
mの高さの金バンプと回路基板とを接着し、熱によって
回路基板とICチップとの導通接続をはかり、横方向の
電極間短絡を逃げるという構造の提案もあるが、導電接
続性にも短絡防止にもゆとりを持った材料や条件は厳し
い。As another method for connecting the IC chip and the circuit board, a plastic ball coated with a conductive film is used.
Cover with a thinner film of heat-melting plastic,
There is also a proposal of a structure in which a gold bump having a height of m is adhered to a circuit board, and the circuit board and the IC chip are electrically connected by heat to escape a short circuit between electrodes in the lateral direction. Materials and conditions that allow for short circuit prevention are strict.
【0030】[0030]
【発明が解決しようとする課題】以上説明したように、
従来技術のICチップ実装方法で解決が望まれている課
題は、ICチップに形成するバンプと呼ばれる接続用の
突起電極の形成コストの低下と、電極面積の縮小と、金
属溶出再結晶短絡事故を引き起こす恐れのある高価な貴
金属使用の廃止と、温度熱膨脹係数の差異により生ずる
接続剥がれの防止と、ICチップの破壊防止とである。As described above,
Problems to be solved by the conventional IC chip mounting method include reduction in cost of forming a protruding electrode for connection called a bump formed on the IC chip, reduction in electrode area, and metal elution recrystallization short circuit accident. The use of expensive noble metals that may cause this is eliminated, the connection is prevented from peeling off due to the difference in thermal expansion coefficient, and the IC chip is prevented from being destroyed.
【0031】本発明の目的は、上記課題の解決を図るた
めの新しい接続方法を提供することにある。さらに詳し
く記すと、貴金属を用いずに安定であり、なおかつ導電
性に優れ、金属溶出再結晶短絡を起こしにくい接続方法
を提供することが、本発明の目的である。An object of the present invention is to provide a new connection method for solving the above problems. More specifically, it is an object of the present invention to provide a connection method that is stable without using a precious metal, has excellent conductivity, and is unlikely to cause a metal-eluting recrystallization short circuit.
【0032】[0032]
【課題を解決するための手段】上記目的を達成するため
に、本発明は下記記載の方法を採用する。In order to achieve the above object, the present invention employs the method described below.
【0033】本発明の半導体集積回路装置の接続方法
は、接続電極を備える半導体集積回路片と、回路基板電
極を備える回路基板とを、弾力性のある導電性粒子、も
しくは導電性粒子と弾力性のある非導電性粒子とを絶縁
性接着剤と共に混練し導電接続体とし、導電性粒子ある
いは非導電性粒子の粒子径間隔で回路基板電極と半導体
集積回路片とを接着し、半導体集積回路片の接続電極と
回路基板の回路基板電極の電気的接続を導電接続体を用
いて行うことを特徴とする。In the method for connecting a semiconductor integrated circuit device according to the present invention, a semiconductor integrated circuit piece having a connection electrode and a circuit board having a circuit board electrode are made of elastic conductive particles, or elastic with conductive particles. A non-conductive particle having a certain amount is kneaded together with an insulating adhesive to form a conductive connecting body, and a circuit board electrode and a semiconductor integrated circuit piece are bonded at a particle diameter interval of the conductive particle or the non-conductive particle to form a semiconductor integrated circuit piece. The connecting electrode and the circuit board electrode of the circuit board are electrically connected using a conductive connector.
【0034】[0034]
【実施例】以下本発明の実施例を図面に基き説明する。
図1は本発明による半導体集積回路装置の接続方法にお
ける実施例の一つである。Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 shows one embodiment of a method for connecting a semiconductor integrated circuit device according to the present invention.
【0035】図1に示すように、ICチップ102は、
トランジスタや抵抗やコンデンサーなどの能動素子や受
動素子を形成した能動領域104上にアルミニウムから
なる接続電極110が露出するように保護膜108に開
口を形成する。As shown in FIG. 1, the IC chip 102 is
An opening is formed in the protective film 108 so that the connection electrode 110 made of aluminum is exposed on the active region 104 in which active elements such as transistors, resistors and capacitors and passive elements are formed.
【0036】一方、回路基板116上には回路基板電極
114を設ける。回路基板116は液晶表示装置の場合
は、ガラス基板であり、回路基板電極114は、透明電
極膜で構成する。On the other hand, a circuit board electrode 114 is provided on the circuit board 116. In the case of a liquid crystal display device, the circuit board 116 is a glass substrate, and the circuit board electrode 114 is composed of a transparent electrode film.
【0037】ICチップ102の接続電極110と、回
路基板電極114とは、導電接続体112を用いて、電
気的接続を行う。The connection electrode 110 of the IC chip 102 and the circuit board electrode 114 are electrically connected by using the conductive connector 112.
【0038】つぎに導電接続体を用いて回路基板の回路
基板電極とICチップの接続電極との接続を行う実施例
を説明する。Next, a description will be given of an embodiment in which the circuit board electrode of the circuit board and the connection electrode of the IC chip are connected using the conductive connector.
【0039】図2に示すように、導電接続体は、テトロ
ン、あるいはポリイミドなどの弾力性のある絶縁性プラ
スチック粒子210の表面に、パラジウム銀や酸化物導
電体の導電性被膜212を形成し、さらに軟化点の低い
絶縁性プラスチック微粒子、あるいはワックス微粒子か
らなる絶縁性粒子214を設けたもので構成する。この
絶縁性粒子214の大きさは、1μm以下のものを用い
る。As shown in FIG. 2, the conductive connector has a conductive coating 212 of palladium silver or an oxide conductor formed on the surface of elastic insulating plastic particles 210 such as Tetron or polyimide. Further, it is configured by providing insulating particles 214 made of insulating plastic particles having a low softening point or wax particles. The size of the insulating particles 214 is 1 μm or less.
【0040】ICチップ202と回路基板206とは、
ICチップ202の両側に配置した接着剤232中のス
ペ−サ部材230により一定の間隔、たとえば5μmで
対向配置する。同時に導電性が付与された絶縁性プラス
チック粒子210を歪ませて接続圧を発生させる。The IC chip 202 and the circuit board 206 are
The spacer members 230 in the adhesive 232 arranged on both sides of the IC chip 202 oppose each other at a constant interval, for example, 5 μm. At the same time, the insulating plastic particles 210 having conductivity are distorted to generate a connection pressure.
【0041】絶縁性プラスチック粒子210の表面は、
導電性被膜212により導電被覆されているが、図2の
上下方向は、強い圧力で絶縁性プラスチック粒子210
の表面の絶縁性粒子214が、絶縁性プラスチック粒子
210内に埋没したり、熱で潰れたりして、上下方向で
回路基板電極208と、ICチップ202の接続電極2
04とを導通させる。The surface of the insulating plastic particles 210 is
Although being electrically conductively coated with the electrically conductive coating 212, the insulating plastic particles 210 are strongly pressured in the vertical direction in FIG.
The insulating particles 214 on the surface of the substrate are buried in the insulating plastic particles 210 or are crushed by heat, so that the circuit board electrode 208 and the connection electrode 2 of the IC chip 202 are vertically arranged.
04 and conductive.
【0042】しかしながら電極の横方向では、圧力の逃
げ場があるので絶縁性粒子214の埋没や潰れが起き
ず、導通が行われない。However, in the lateral direction of the electrodes, since there is a relief area for pressure, the insulating particles 214 are not buried or crushed, and conduction is not performed.
【0043】導通を与える粒子は、お互いに密着しない
程度の平面密度で均一にICチップ202上、もしくは
回路基板206上に塗布する。The particles that give continuity are uniformly applied to the IC chip 202 or the circuit board 206 with a planar density such that they do not adhere to each other.
【0044】しかしながら、絶縁性プラスチック粒子2
10表面の絶縁性粒子214の存在により、電極横方向
の導通は疎外され、電極上下方向のみ強い圧力が発生で
き、導通する。However, the insulating plastic particles 2
Due to the presence of the insulating particles 214 on the surface 10, the electric conduction in the lateral direction of the electrode is alienated, and a strong pressure can be generated only in the vertical direction of the electrode so that the electric conduction occurs.
【0045】上下に導電性の接続電極204や回路基板
電極208が存在する領域だけが導通するので、従来の
導電ぺ−ストを凸版印刷法にて、パターン化印刷する方
法と異なり、10μmピッチ程度までの微細ピッチの電
極接続が達成できる。Since only the regions where the conductive connection electrodes 204 and the circuit board electrodes 208 are present on the top and bottom are conductive, unlike the conventional method of pattern printing by the relief printing method, a pattern of about 10 .mu.m pitch is used. Up to fine pitch electrode connection can be achieved.
【0046】図3に、本発明の半導体集積回路装置の接
続方法におけるさらに別の実施例を示す。FIG. 3 shows still another embodiment of the method for connecting a semiconductor integrated circuit device of the present invention.
【0047】図3に示すように、導電接続体は、直径数
μm程度のテトロン、あるいはポリイミドなどの弾力性
のある絶縁性プラスチック表面にパラジウム銀や酸化物
導電体膜を形成した導電性粒子312と、導電性粒子3
12より粒径の小さいテトロン、あるいはポリイミドな
どの絶縁性プラスチックからなる非導電性粒子310と
を絶縁性接着剤314とを混練して構成する。As shown in FIG. 3, the conductive connecting member is a conductive particle 312 in which palladium silver or an oxide conductive film is formed on the surface of a flexible insulating plastic such as tetron or polyimide having a diameter of about several μm. And conductive particles 3
A non-conductive particle 310 made of an insulating plastic such as Tetoron or a polyimide having a particle size smaller than 12 is kneaded with an insulating adhesive 314 to be formed.
【0048】導電性粒子312と非導電性粒子310と
の2種類の粒子が混在しており、上下方向すなわちIC
チップ302の接続電極304と回路基板306の回路
基板電極308との間には、導電性粒子312と非導電
性粒子310とが一層に配列し、横方向には導電性粒子
312と非導電性粒子310とが混ざって配列する。Two kinds of particles, that is, the conductive particles 312 and the non-conductive particles 310, are mixed and are in the vertical direction, that is, the IC.
Conductive particles 312 and non-conductive particles 310 are arranged in a layer between the connection electrode 304 of the chip 302 and the circuit board electrode 308 of the circuit board 306, and the conductive particles 312 and the non-conductive particles 312 are non-conductive in the lateral direction. The particles 310 are mixed and arranged.
【0049】一層配列の方向は、接着剤332に混入し
たスペ−サ部材330の寸法を導電性粒子312寸法よ
りも小さく設定することにより、導電性粒子312に押
し付け圧が発生し、接続電極304と回路基板電極30
8との導通が得られる。Regarding the direction of the one-layer arrangement, by setting the size of the spacer member 330 mixed in the adhesive 332 to be smaller than the size of the conductive particles 312, a pressing pressure is generated on the conductive particles 312 and the connection electrode 304. And circuit board electrode 30
Conduction with 8 is obtained.
【0050】電極横方向には、導電性粒子312と非導
電性粒子310の直列接続状態が発生するので、非導電
性粒子310に対する導電性粒子312の比率を1/7
以下にしておくと、1個の導電性粒子312の周囲を全
て非導電性粒子310とすることが可能となり、電極横
方向短絡は起こらなくなる。Since the conductive particles 312 and the non-conductive particles 310 are connected in series in the lateral direction of the electrode, the ratio of the conductive particles 312 to the non-conductive particles 310 is 1/7.
If it is set below, it becomes possible to make all the periphery of one conductive particle 312 the non-conductive particle 310, and the short circuit in the lateral direction of the electrode does not occur.
【0051】非導電性粒子310の直径を導電性粒子3
12の直径よりも少しだけ小さくすることにより、電極
上下方向の導通確率を低下させることがなくなり、導通
確率の低下を防ぐことができる。The diameter of the non-conductive particles 310 is set to be that of the conductive particles 3.
By making it slightly smaller than the diameter of 12, it is possible to prevent the conduction probability in the vertical direction of the electrode from decreasing, and prevent the conduction probability from decreasing.
【0052】ただし非導電性粒子310の直径を導電性
粒子312の直径の1/4以下にすると、非導電性粒子
310の横方向接続防止の寸法効果が減少する。However, if the diameter of the non-conductive particles 310 is set to 1/4 or less of the diameter of the conductive particles 312, the dimensional effect of preventing the non-conductive particles 310 from connecting in the lateral direction is reduced.
【0053】図4は本発明におけるさらに別の実施例を
示し、異方性導電部材を用いた接続方法を示す。FIG. 4 shows still another embodiment of the present invention, showing a connecting method using an anisotropic conductive member.
【0054】シート状の異方性導電部材は、形状記憶合
金の細線を冷間加工で少し折り曲げて絶縁性プラスチッ
クなどの柔らかい媒体中に分散固定する。形状記憶合金
細線は、鉄やニッケルのメッキ処理で磁場中配向を可能
にし、さらに接続抵抗を低下させるために銀パラジウム
メッキを施すと良い。形状記憶合金細線に、あらかじめ
絶縁被覆を施してから、束ねて絶縁性接着剤で固着する
方法も作り易い利点がある。The sheet-shaped anisotropic conductive member is obtained by bending a thin wire of a shape memory alloy slightly by cold working and fixing it in a soft medium such as insulating plastic. The shape memory alloy fine wire is preferably plated with silver or palladium in order to enable orientation in a magnetic field by a plating treatment with iron or nickel and further reduce the connection resistance. There is also an advantage that it is easy to make a method in which the shape memory alloy fine wires are previously coated with an insulating coating and then bundled and fixed with an insulating adhesive.
【0055】図4に示すように、絶縁性接着剤402中
に形状記憶合金細線404を柔らかいプラスチックから
なる鞘406で被覆し、シート状にして、これを異方性
導電部材とする。As shown in FIG. 4, a shape memory alloy fine wire 404 is covered with an insulating adhesive 402 by a sheath 406 made of soft plastic to form a sheet, which is used as an anisotropic conductive member.
【0056】形状記憶合金は一定の温度以下では可塑性
を示すが、温度が上昇して一定温度以上になると可塑性
を失い、高温時の形状に戻る。The shape memory alloy exhibits plasticity below a certain temperature, but loses plasticity when the temperature rises above a certain temperature and returns to the shape at high temperature.
【0057】したがって高温時に真っ直ぐな形状記憶合
金細線404を、冷間加工で曲げた形状記憶合金細線4
04を用い、ICチップと回路基板とを絶縁性接着剤4
02を用いて固着した後に、加熱を行うとICチップの
実装時に、形状記憶合金細線404が真っ直ぐに伸び、
挫屈や変形で減少していた接続用の接触圧が回復して実
装接続抵抗を安定確保できる。Therefore, the shape memory alloy thin wire 4 obtained by bending the shape memory alloy thin wire 404 which is straight at high temperature by cold working.
04 by using an insulating adhesive 4 between the IC chip and the circuit board.
When the IC chip is mounted, the shape-memory alloy thin wire 404 is stretched straight when it is heated after being fixed by using 02.
The contact pressure for connection, which has been reduced due to buckling or deformation, is restored and the mounting connection resistance can be stably secured.
【0058】鞘406は、形状記憶合金細線404同志
の電気的接触によるショートを防いで、異方性導電部材
の絶縁シ−トを形成するのに有効である。さらに鞘40
6をワックスのような熱軟化性の材料で構成しておく
と、加熱時の形状記憶合金細線404の形状回復による
接続圧の発生が容易になる。The sheath 406 is effective in preventing short circuit due to electrical contact between the shape memory alloy thin wires 404 and forming an insulating sheet of the anisotropic conductive member. Further sheath 40
When 6 is made of a heat softening material such as wax, the connection pressure is easily generated due to the shape recovery of the shape memory alloy fine wire 404 during heating.
【0059】絶縁性接着剤402は、形状記憶合金細線
404を固めてシ−ト状にするのに用いるだけではな
く、ICチップと回路基板とを固着する作用も有する。The insulating adhesive 402 is used not only for fixing the shape memory alloy fine wire 404 into a sheet shape, but also for fixing the IC chip and the circuit board.
【0060】図5は本発明の導電性粒子の構造の実施例
を示す。FIG. 5 shows an example of the structure of the conductive particles of the present invention.
【0061】図5(a)は形状記憶合金細線502を冷
やして小さく丸めたものであり、図5(b)は形状記憶
合金細線とプラスチック材料やワックス材料とともに丸
めて球状導電性粒子504としたものであり、図5
(c)は加熱により膨脹した形状記憶合金細線ボ−ル5
06をそれぞれ示す。FIG. 5A shows a shape memory alloy thin wire 502 which is cooled and rounded into small pieces, and FIG. 5B shows a shape memory alloy thin wire and a plastic material or a wax material which are rounded into spherical conductive particles 504. Fig. 5
(C) is a shape-memory alloy thin wire ball 5 expanded by heating.
06 are shown respectively.
【0062】丸めた形状記憶合金細線502は単独では
互いに絡みやすく、表面を導電被覆したプラスチック粒
子のような異方性導電構造を形成し難い。The rounded shape memory alloy fine wires 502 tend to be entangled with each other by themselves, and it is difficult to form an anisotropic conductive structure such as plastic particles whose surfaces are conductively coated.
【0063】しかし形状記憶合金細線502をワックス
材料やプラスチック材料と共に練り合わせた球状導電性
粒子504は団子状にすることができ、絡み合いを防ぎ
導電性粒子として取扱うことができる。However, the spherical conductive particles 504 obtained by kneading the shape memory alloy fine wire 502 together with a wax material or a plastic material can be made into a dumpling shape and can be handled as conductive particles while preventing entanglement.
【0064】しかもこの球状導電性粒子504は、実装
後に加熱工程を経過すると、溶融したワックス球のなか
で形状記憶合金細線が形状を膨らませ、図5(c)に示
す形状記憶合金細線ボール506の状態となり、接続圧
を発生し、プラスチック材料からなる導電性粒子にない
利点がある。Further, in the spherical conductive particles 504, the shape memory alloy fine wire swells in the molten wax sphere after the heating process after mounting, and the shape memory alloy fine wire ball 506 shown in FIG. The conductive particles made of a plastic material have an advantage over the conductive particles made of a plastic material.
【0065】あるいは可撓性の細線、もしくは金属酸化
物被覆や金属膜を被覆して導電性を持たせた可撓性絶縁
性細線を、ワックスと共に低温で練り固めた複合材料
は、形状記憶合金と全く同様に高温加熱工程で篭状に膨
脹して接続圧を発生するので、図5に示す導電性粒子と
同様に利用することができる。Alternatively, a flexible thin wire, or a flexible insulating thin wire coated with a metal oxide film or a metal film to have conductivity and kneaded with wax at a low temperature is a shape memory alloy. In the same manner as above, since it expands in a basket shape in the high temperature heating step to generate a connection pressure, it can be used similarly to the conductive particles shown in FIG.
【0066】図6は、本発明の半導体集積回路装置の接
続方法を、液晶表示素子を構成するガラス基板上の配線
とICチップとの接続に適用したチップオングラス実装
方法における実施例を示す。FIG. 6 shows an embodiment of a chip-on-glass mounting method in which the semiconductor integrated circuit device connection method of the present invention is applied to the connection between the wiring on the glass substrate forming the liquid crystal display element and the IC chip.
【0067】図6の断面図に示すように、液晶表示装置
を構成するガラス基板604とガラス基板606との間
に液晶層600を設ける。この液晶層600は封止材6
22により、ガラス基板604とガラス基板606との
間に封入されている。As shown in the sectional view of FIG. 6, a liquid crystal layer 600 is provided between a glass substrate 604 and a glass substrate 606 which form a liquid crystal display device. This liquid crystal layer 600 is a sealing material 6.
It is enclosed by the glass substrate 604 between the glass substrate 604 and the glass substrate 606.
【0068】それぞれのガラス基板604、606に
は、光の振動面の方向を規定する偏向板624、626
を設ける。Deflection plates 624 and 626 are provided on the glass substrates 604 and 606, respectively, for defining the directions of the vibration planes of light.
To provide.
【0069】さらにそれぞれのガラス基板604、60
6には、表示を行うための透明電極膜630、632を
設ける。Further, the respective glass substrates 604, 60
6 is provided with transparent electrode films 630 and 632 for displaying.
【0070】さらにガラス基板604には、液晶表示装
置を駆動するための液晶駆動用ICチップ602を、本
発明の接続方法を用いて、導電接続体608により実装
している。Further, a liquid crystal driving IC chip 602 for driving the liquid crystal display device is mounted on the glass substrate 604 by a conductive connector 608 using the connection method of the present invention.
【0071】液晶駆動用ICチップ602を制御する信
号や電源は、ガラス基板604に熱硬化型導電性接着剤
612を用いて接続する回路基板接続電極614より供
給する。A signal and a power source for controlling the liquid crystal driving IC chip 602 are supplied from a circuit board connecting electrode 614 which is connected to the glass substrate 604 by using a thermosetting conductive adhesive 612.
【0072】図6に示すように、透過光628は液晶層
600を透過するとき変調され、偏向板624、626
の効果で振幅変調に変化させられる。As shown in FIG. 6, the transmitted light 628 is modulated as it passes through the liquid crystal layer 600, and the deflection plates 624 and 626 are modulated.
Is changed to amplitude modulation.
【0073】液晶表示素子を構成するガラス基板604
とガラス基板606とには、表面に酸化インジウムすず
混合物薄膜からなる透明導電膜630、632を形成
し、液晶層600に駆動電圧を印加する。Glass substrate 604 which constitutes a liquid crystal display element
Transparent conductive films 630 and 632 made of indium tin oxide mixture thin films are formed on the surfaces of the glass substrate 606 and a driving voltage is applied to the liquid crystal layer 600.
【0074】透明導電膜630、632は、数μmの狭
い間隔を介して対向して配置し、その間に一定方向に配
向処理した液晶層600を挟持している。The transparent conductive films 630 and 632 are arranged so as to face each other with a narrow gap of several μm, and the liquid crystal layer 600 oriented in a certain direction is sandwiched therebetween.
【0075】温度変化によるガラス基板604と液晶駆
動用ICチップ602との温度熱膨脹係数の差異に起因
する機械的歪は、導電接続体608の使用で吸収され、
電気接続のための接続圧は本発明の接続方法で安定して
維持され、電気的接続の問題は生じない。The mechanical strain due to the difference in thermal expansion coefficient between the glass substrate 604 and the liquid crystal driving IC chip 602 due to the temperature change is absorbed by the use of the conductive connector 608,
The connection pressure for electrical connection is stably maintained by the connection method of the present invention, and the problem of electrical connection does not occur.
【0076】[0076]
【発明の効果】以上の説明で明らかなように、本発明の
半導体集積回路装置の接続方法においては、ICチップ
と回路基板との接続に貴金属を用いずに接続を行ってい
るので貴金属固有の金属溶出短絡事故を抑圧できる。ま
たさらに従来使用していた導電ペーストとは異なり、本
発明の接続方法で用いる導電接続体は、物理的、化学的
に安定である。As is apparent from the above description, in the method of connecting a semiconductor integrated circuit device of the present invention, since the IC chip and the circuit board are connected without using a precious metal, the characteristic of the precious metal is provided. The metal elution short circuit accident can be suppressed. Further, unlike the conductive paste used conventionally, the conductive connector used in the connecting method of the present invention is physically and chemically stable.
【0077】このため電極ピッチが10μm程度と、従
来に比較して小さな寸法でICチップの実装が可能にな
る。また導電ペースト形成のための凸版印刷工程のよう
な時間と手間の掛かる工程を必要としないので、プロセ
スコストが大幅に低下できる。接続の安定性の点から見
ると、形状記憶合金効果で温度熱膨脹や経時変化に対し
て接続圧が安定して確保され、接続の安定性と信頼性と
で優れている。さらに、貴金属を用いないために材料費
の点でも優れている。Therefore, the electrode pitch is about 10 μm, which makes it possible to mount the IC chip with a smaller dimension than the conventional one. Further, since a time-consuming and troublesome process such as a letterpress printing process for forming the conductive paste is not required, the process cost can be significantly reduced. From the viewpoint of connection stability, the shape memory alloy effect ensures a stable connection pressure against temperature thermal expansion and aging, and is excellent in connection stability and reliability. Further, since no precious metal is used, the material cost is excellent.
【図1】本発明の実施例における半導体集積回路装置の
接続方法を示す断面図である。FIG. 1 is a cross-sectional view showing a method of connecting a semiconductor integrated circuit device according to an embodiment of the present invention.
【図2】本発明の実施例における半導体集積回路装置の
接続方法を示す断面図である。FIG. 2 is a sectional view showing a method of connecting a semiconductor integrated circuit device according to an embodiment of the invention.
【図3】本発明の実施例における半導体集積回路装置の
接続方法を示す断面図である。FIG. 3 is a sectional view showing a method of connecting a semiconductor integrated circuit device according to an embodiment of the present invention.
【図4】本発明の実施例における半導体集積回路装置の
接続方法に用いる異方性導電部材を示す斜視図である。FIG. 4 is a perspective view showing an anisotropic conductive member used in a method for connecting a semiconductor integrated circuit device according to an example of the present invention.
【図5】本発明の実施例における半導体集積回路装置の
接続方法に用いる導電接続体を示す斜視図である。FIG. 5 is a perspective view showing a conductive connector used in a method for connecting a semiconductor integrated circuit device in an example of the present invention.
【図6】本発明の半導体集積回路装置の接続方法を液晶
表示装置に適用した実施例を示す断面図である。FIG. 6 is a sectional view showing an embodiment in which the method for connecting a semiconductor integrated circuit device of the present invention is applied to a liquid crystal display device.
【図7】従来の半導体集積回路装置の接続方法を示す断
面図である。FIG. 7 is a cross-sectional view showing a method of connecting a conventional semiconductor integrated circuit device.
102 半導体集積回路片(ICチップ) 110 接続電極 112 導電接続体 114 回路基板電極 116 回路基板 102 semiconductor integrated circuit piece (IC chip) 110 connection electrode 112 conductive connection body 114 circuit board electrode 116 circuit board
Claims (7)
回路基板電極を備える回路基板とを、弾力性のある導電
性粒子、もしくは導電性粒子と弾力性のある非導電性粒
子とを絶縁性接着剤と共に混練し導電接続体とし、導電
性粒子あるいは非導電性粒子の粒子径間隔で回路基板電
極と半導体集積回路片とを接着し、半導体集積回路片の
接続電極と回路基板の回路基板電極の電気的接続を導電
接続体を用いて行うことを特徴とする半導体集積回路装
置の接続方法。1. A semiconductor integrated circuit piece having a connection electrode,
A circuit board having a circuit board electrode, conductive particles having elasticity, or conductive particles and non-conductive particles having elasticity are kneaded together with an insulating adhesive to form a conductive connector, and the conductive particles or non-conductive particles are used. The circuit board electrode and the semiconductor integrated circuit piece are adhered to each other at particle diameter intervals of the conductive particles, and the connection electrode of the semiconductor integrated circuit piece and the circuit board electrode of the circuit board are electrically connected using a conductive connector. Method for connecting semiconductor integrated circuit device.
いた液晶素子基板であり、半導体集積回路片は液晶駆動
用集積回路素子であることを特徴とする請求項1に記載
の半導体集積回路装置の製造方法。2. The semiconductor integrated circuit according to claim 1, wherein the circuit board is a liquid crystal element substrate in which a transparent conductive film is formed on glass, and the semiconductor integrated circuit piece is a liquid crystal driving integrated circuit element. Device manufacturing method.
る微小バネ構造体であることを特徴とする請求項1に記
載の半導体集積回路装置の製造方法。3. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the conductive connector is a micro spring structure formed of a shape memory alloy.
小な弾力性プラスチックバネ構造体であることを特徴と
する請求項1に記載の半導体集積回路装置の製造方法。4. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the conductive connector is a minute elastic plastic spring structure whose surface is conductively coated.
な弾力性プラスチック体で、さらにこの弾力性プラスチ
ック体上に絶縁性の熱可塑性微細粉末を塗布した構造で
あることを特徴とする請求項1に記載の半導体集積回路
装置の製造方法。5. The conductive connecting body is a fine elastic plastic body having a conductive coating on the surface thereof, and further has a structure in which insulating thermoplastic fine powder is applied onto the elastic plastic body. Item 2. A method for manufacturing a semiconductor integrated circuit device according to item 1.
金細片をプラスチックで固めた複合体であり、温度上昇
により圧縮が解ける構造であることを特徴とする請求項
1に記載の半導体集積回路装置の製造方法。6. The semiconductor according to claim 1, wherein the conductive connector is a composite of cold-compressed shape memory alloy strips solidified with plastic, and has a structure in which the compression can be released by a temperature rise. Manufacturing method of integrated circuit device.
路基板電極との接続は異方性導電部材を用いて行い、異
方性導電部材は、形状記憶合金が冷間加工変形された微
小バネ構造体であり、バネ構造体の側面が絶縁性の鞘で
覆われ、バネ構造体を多数束ねて異方性導電部材を構成
し、半導体集積回路片と回路基板とを異方性導電部材を
挟んで固着した後、加熱して電気的接続のための接続圧
を異方性導電部材に発生させることを特徴とする半導体
集積回路装置の接続方法。7. An anisotropic conductive member is used to connect the connection electrode of the IC chip and the circuit board electrode of the circuit board, and the anisotropic conductive member is formed by cold working deformation of a shape memory alloy. A spring structure, the side surface of the spring structure is covered with an insulating sheath, a large number of spring structures are bundled to form an anisotropic conductive member, and the semiconductor integrated circuit piece and the circuit board are anisotropically conductive members. A method for connecting a semiconductor integrated circuit device, comprising: fixing the semiconductor integrated circuit device by sandwiching it and heating it to generate a connection pressure for electrical connection in the anisotropic conductive member.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19138192A JPH0613432A (en) | 1992-06-26 | 1992-06-26 | Connecting method for semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19138192A JPH0613432A (en) | 1992-06-26 | 1992-06-26 | Connecting method for semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0613432A true JPH0613432A (en) | 1994-01-21 |
Family
ID=16273652
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19138192A Pending JPH0613432A (en) | 1992-06-26 | 1992-06-26 | Connecting method for semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0613432A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100313766B1 (en) * | 1999-12-30 | 2001-11-15 | 구자홍 | Method and conductive powder struture of anisotropic conductive powder |
US6940180B1 (en) | 1996-09-05 | 2005-09-06 | Seiko Epson Corporation | Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit |
WO2018079365A1 (en) * | 2016-10-24 | 2018-05-03 | デクセリアルズ株式会社 | Anisotropic conductive film |
JP2018073808A (en) * | 2016-10-24 | 2018-05-10 | デクセリアルズ株式会社 | Anisotropic Conductive Film |
-
1992
- 1992-06-26 JP JP19138192A patent/JPH0613432A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6940180B1 (en) | 1996-09-05 | 2005-09-06 | Seiko Epson Corporation | Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit |
US7084517B2 (en) | 1996-09-05 | 2006-08-01 | Seiko Epson Corporation | Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit |
KR100313766B1 (en) * | 1999-12-30 | 2001-11-15 | 구자홍 | Method and conductive powder struture of anisotropic conductive powder |
WO2018079365A1 (en) * | 2016-10-24 | 2018-05-03 | デクセリアルズ株式会社 | Anisotropic conductive film |
JP2018073808A (en) * | 2016-10-24 | 2018-05-10 | デクセリアルズ株式会社 | Anisotropic Conductive Film |
US11557562B2 (en) | 2016-10-24 | 2023-01-17 | Dexerials Corporation | Anisotropic conductive film |
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