JPH0612858B2 - Differential amplifier circuit - Google Patents
Differential amplifier circuitInfo
- Publication number
- JPH0612858B2 JPH0612858B2 JP62322552A JP32255287A JPH0612858B2 JP H0612858 B2 JPH0612858 B2 JP H0612858B2 JP 62322552 A JP62322552 A JP 62322552A JP 32255287 A JP32255287 A JP 32255287A JP H0612858 B2 JPH0612858 B2 JP H0612858B2
- Authority
- JP
- Japan
- Prior art keywords
- color difference
- transistor
- differential amplifier
- circuit
- amplifier circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000003071 parasitic effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000003086 colorant Substances 0.000 description 3
- 230000002238 attenuated effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Processing Of Color Television Signals (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、オフセットを有する差動増幅回路に関するも
ので、特にテレビジョン受像機の色相を検出する検出回
路に用いて好適な差動増幅回路に関する。TECHNICAL FIELD The present invention relates to a differential amplifier circuit having an offset, and particularly to a differential amplifier circuit suitable for use in a detection circuit for detecting the hue of a television receiver. Regarding the circuit.
(ロ)従来の技術 TV受像機の色相調整回路としてオートグリーン回路と
呼ばれるものがある。前記オートグリーン回路は、3つ
の色差信号のレベルを比較して、緑色が大レベルである
ことを検出すると、緑色近傍の色を緑色に強制的に補正
し緑が鮮やかなテレビ画面を得るようにしている。第2
図は、その様なアートグリーン回路を示す回路図で、第
1,第2及び第3入力端子(1),(2)及び(3)にはそれぞ
れR−Y色差信号、G−Y色差信号、B−Y色差信号が
印加され各々第1乃至第3バッファアンプ(4)乃至(6)を
介して、第1乃至第3引算回路(7)乃至(9)の正入力端子
に印加される。一方、第4入力端子(10)からは−Y(輝
度信号)信号が印加され、第4バッファアンプ(11)を介
して前記第1乃至第3引算回路(7)乃至(9)の負入力端子
に印加される。第1,第2及び第3引算回路(7)(8)及び
(9)は、入力される各色差信号中からY信号成分を減算
するので、第1,第2及び第3出力端子(12)(13)及び(1
4)にはR原色信号、G原色信号、B原色信号を得ること
が出来る。(B) Conventional technology There is a so-called auto green circuit as a hue adjustment circuit of a TV receiver. The auto green circuit compares the levels of the three color difference signals, and when it detects that green is at a high level, it forcibly corrects the colors in the vicinity of green to green so as to obtain a television screen with vivid green. ing. Second
The figure is a circuit diagram showing such an Art Green circuit, in which the RY color difference signal and the GY color difference signal are respectively applied to the first, second and third input terminals (1), (2) and (3). , BY color difference signals are applied and applied to the positive input terminals of the first to third subtraction circuits (7) to (9) through the first to third buffer amplifiers (4) to (6), respectively. It On the other hand, a −Y (luminance signal) signal is applied from the fourth input terminal (10), and the negative signals of the first to third subtraction circuits (7) to (9) are applied via the fourth buffer amplifier (11). Applied to the input terminal. First, second and third subtraction circuits (7) (8) and
Since (9) subtracts the Y signal component from each input color difference signal, the first, second and third output terminals (12), (13) and (1
In 4), R primary color signal, G primary color signal, and B primary color signal can be obtained.
ところで、エミッタが共通接続された第1乃至第3トラ
ンジスタ(15)乃至(17)から成る差動増幅回路(18)の前記
第1トランジスタ(15)のベースにはR−Y色差信号が、
第1エミッタフォロアトランジスタ(19)を介して印加さ
れる。又、前記第2トランジスタ(16)のベースにはB−
Y色差信号が、第2エミッタフォロアトランジスタ(20)
を介して印加され、更に前記第3トランジスタ(17)のベ
ースにはG−Y色差信号が、第3エミッタフォロアトラ
ンジスタ(21)を介して印加される。そして、前記差動増
幅回路(18)において各色差信号の比較が行なわれる。こ
こで、前記第3エミッタフォロアトランジスタ(21)のエ
ミッタに接続されている抵抗(22)は、前記差動増幅回路
(18)にオフセットを持たせる為のものである。その為、
前記G−Y色差信号のレベルが、他の2つの色差信号の
レベルよりオフセットレベル以上高くなった時のみ、前
記第3トランジスタ(17)がオンし、そのコレクタには差
に応じた電流が流れる。そして、前記電流と等しい電流
が、トランジスタ(23)のエミッタ・コレクタ路に流れ、
減衰回路(24)に供給される。すると、前記減衰回路(24)
は、第3引算回路(9)からのB原色信号のレベルを前記
電流値に応じて減衰させる。従って、テレビ画面上で見
た場合画面中の緑色近傍の色が緑色に補正され、テレビ
画面上には鮮やかな緑色が得られる。By the way, an R-Y color difference signal is applied to the base of the first transistor (15) of the differential amplifier circuit ( 18 ) including the first to third transistors (15) to (17) whose emitters are commonly connected.
It is applied through the first emitter follower transistor (19). The base of the second transistor 16 is B-
The Y color difference signal is the second emitter follower transistor (20).
Further, the G-Y color difference signal is applied to the base of the third transistor (17) via the third emitter follower transistor (21). Then, the color difference signals are compared in the differential amplifier circuit ( 18 ). Here, the resistor (22) connected to the emitter of the third emitter follower transistor (21) is the differential amplifier circuit.
It is for giving an offset to ( 18 ). For that reason,
Only when the level of the G-Y color difference signal is higher than the levels of the other two color difference signals by the offset level or more, the third transistor (17) is turned on, and a current corresponding to the difference flows through the collector thereof. . Then, a current equal to the current flows in the emitter-collector path of the transistor (23),
It is supplied to the attenuation circuit (24). Then, the attenuation circuit (24)
Reduces the level of the B primary color signal from the third subtraction circuit (9) according to the current value. Therefore, when viewed on the TV screen, colors near green in the screen are corrected to green, and vivid green is obtained on the TV screen.
(ハ)発明が解決しようとする問題点 ところで、第2図の定電流源(25)は一般にトランジスタ
で構成されるので、寄生容量が発生する。すると、前記
寄生容量と抵抗(22)とによってローパスフィルタが形成
されてしまい、第3トランジスタ(17)のベースに印加さ
れるG−Y色差信号の高域成分が減衰されてしまう。
又、抵抗(50)及び(51)と第1及び第2トランジスタ15及
び(16)のベース・エミッタ間容量とでも各々ローパスフ
ィルタが形成されてしまい、R−Y及びB−Y色差信号
の高域成分か減衰されてしまう。その為、差動増幅回路
(18)において高周波の色差信号のレベル比較が正確に行
なえないという問題があった。又、オフセットを与える
為の抵抗の外にオフセットを補償する為の3つのエミッ
タフォロアトランジスタを必要とし、素子数の増加にな
るという問題もあった。(C) Problems to be solved by the invention By the way, since the constant current source (25) of FIG. 2 is generally composed of a transistor, a parasitic capacitance is generated. Then, a low-pass filter is formed by the parasitic capacitance and the resistor 22 and the high frequency component of the G-Y color difference signal applied to the base of the third transistor 17 is attenuated.
In addition, the resistors (50) and (51) and the base-emitter capacitances of the first and second transistors 15 and (16) each form a low-pass filter, which increases the RY and BY color difference signals. The range component is attenuated. Therefore, the differential amplifier circuit
In ( 18 ), there is a problem that the level comparison of high-frequency color difference signals cannot be performed accurately. In addition to the resistance for giving an offset, three emitter follower transistors for compensating for the offset are required, which causes a problem that the number of elements increases.
(ニ)問題点を解決するための手段 本発明は、上述の点に鑑み成されたもので、エミッタが
共通接続された2つのトランジスタと、該2つのトラン
ジスタの共通エミッタと基準電位点との間に接続された
動作電流源とから成る差動増幅回路において、前記動作
電流源の一端と前記2つのトランジスタの一方のトラン
ジスタのエミッタとの間に抵抗を設けるとともに、前記
抵抗に定電流を供給する定電流源を設けたことを特徴と
する。(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and includes two transistors whose emitters are commonly connected, a common emitter of the two transistors, and a reference potential point. In a differential amplifier circuit including an operating current source connected in between, a resistor is provided between one end of the operating current source and an emitter of one of the two transistors, and a constant current is supplied to the resistor. It is characterized in that a constant current source is provided.
(ホ)作 用 本発明によれば、2つのトランジスタのエミッタ間に抵
抗を接続し、前記抵抗に定電流を供給しているので、寄
生容量の影響を受けずに前2つのトランジスタにオフセ
ットを持たせることが出来る。(E) Operation According to the present invention, since a resistor is connected between the emitters of two transistors and a constant current is supplied to the resistor, an offset is applied to the previous two transistors without being affected by parasitic capacitance. You can have it.
(ヘ)実施例 第1図は、本発明の一実施例を示す回路図で、(26)はベ
ースにR−Y色差信号が印加される第1トランジスタ、
(27)はベースにB−Y色差信号が印加される第2トラン
ジスタ、(28)はベースにG−Y色差信号が印加される第
3トランジスタ、(29)は前記第1及び第2トランジスタ
(26)及び(27)の共通エミッタに接続された動作電流源、
(30)は前記動作電流源(29)と前記第3トランジスタ(28)
のエミッタとの間に接続された抵抗、及び(31)は前記抵
抗(30)に定電流を供給する定電流源である。(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention. (26) is a first transistor to which an RY color difference signal is applied to the base,
(27) is a second transistor to which a BY color difference signal is applied to the base, (28) is a third transistor to which a GY color difference signal is applied to the base, and (29) is the first and second transistors
An operating current source connected to the common emitters of (26) and (27),
(30) is the operating current source (29) and the third transistor (28)
A resistor (31) connected between the resistor and the emitter is a constant current source for supplying a constant current to the resistor (30).
尚、第1図の回路において第2図と同一の回路素子につ
いては同一の符号を付し、その説明を省略する。In the circuit of FIG. 1, the same circuit elements as those of FIG. 2 are designated by the same reference numerals, and the description thereof will be omitted.
まず無信号時におけるオフセットについて説明する。定
電流源(31)からの定電流は、抵抗(30)を介して動作電流
源(29)に流れる。その為、第3トランジスタ(28)のベー
ス電圧は、第1及び第2トランジスタ(26)及び(27)のベ
ース電圧に比べ前記定電流源(31)の定電流値I0と前記
抵抗(30)の抵抗値Rとの積(I0・R)分だけ常に高く
なり、この分のオフセットが与えられることになる。こ
の状態から、第1乃至第3入力端子(1)乃至(3)に各色差
信号が印加されると、第1トランジスタ(26)のベースに
は第1バッファアンプ(4)からR−Y色差信号が、又第
2トランジスタ(27)のベースには第3バッファアンプ
(6)からB−Y色差信号が印加され、更に第3トランジ
スタ(28)のベースには第2バッファアンプ(5)からG−
Y色差信号が印加される。First, the offset when there is no signal will be described. The constant current from the constant current source (31) flows through the resistor (30) to the operating current source (29). Therefore, the base voltage of the third transistor (28) is higher than the base voltage of the first and second transistors (26) and (27) by the constant current value I 0 of the constant current source (31) and the resistance (30). ) And the resistance value R (I 0 · R) always increase, and an offset corresponding to this value is given. In this state, when each color difference signal is applied to the first to third input terminals (1) to (3), the base of the first transistor (26) receives the RY color difference from the first buffer amplifier (4). The signal, and the third buffer amplifier at the base of the second transistor (27)
The BY color difference signal is applied from (6), and the second buffer amplifier (5) to G- is applied to the base of the third transistor (28).
The Y color difference signal is applied.
ここで、3つの色差信号のレベル比較が行なわれ、も
し、G−Y色差信号が、R−Y色差信号及びB−Y色差
信号のレベルに比べオフセット分の電圧(I0・R)よ
り低いとすると、第1及び第2トランジスタ(26)及び(2
7)がオンし第3トランジスタ(28)がオフする。この際、
各色差信号は寄生容量の影響を受けないので正確なレベ
ル比較が行なえる。その為、トランジスタ(23)には電流
が流れず、減衰回路(24)が動作を停止するので、第3引
算回路(9)の出力端に発生するB原色信号は、そのまま
のレベルで第3出力端子(14)に導出される。Here, the levels of the three color difference signals are compared, and if the G-Y color difference signal is lower than the offset voltage (I 0 · R) as compared with the levels of the RY color difference signal and the BY color difference signal. Then, the first and second transistors (26) and (2
7) turns on and the third transistor (28) turns off. On this occasion,
Since each color difference signal is not affected by parasitic capacitance, accurate level comparison can be performed. Therefore, since no current flows through the transistor (23) and the attenuator circuit (24) stops operating, the B primary color signal generated at the output end of the third subtraction circuit (9) remains at the same level as the first level signal. It is led to three output terminals (14).
従って、特別な色相調整が施されること無く、第1乃至
第3出力端子(12)乃至(14)に各原色信号を得ることが出
来る。Therefore, the primary color signals can be obtained at the first to third output terminals (12) to (14) without any special hue adjustment.
次にG−Y色差信号が、R−Y色差信号及びB−Y色差
信号のレベルに比べオフセット分の電圧(I0・R)よ
り高いとすると、第1及び第2トランジスタ(26)及び(2
7)がオフするとともに第3トランジスタ(28)がオンす
る。すると、前記第3トランジスタ(28)のコレクタには
G−Y色差信号とR−Y及びB−Y色差信号とのレベル
差に応じた電流が流れ、前記電流と等しい電流が、トラ
ンジスタ(23)のコレクタから減衰回路(24)に供給され
る。すると、前記減衰回路(24)は、第3引算回路(9)か
らのB原色信号を所定量減衰させて第3出力端子(14)に
導出する。Next, assuming that the G-Y color difference signal is higher than the offset voltage (I 0 · R) as compared with the levels of the RY color difference signal and the BY color difference signal, the first and second transistors (26) and ( 2
7) turns off and the third transistor (28) turns on. Then, a current corresponding to the level difference between the G-Y color difference signal and the R-Y and BY color difference signals flows in the collector of the third transistor (28), and a current equal to the current flows to the transistor (23). It is supplied to the attenuation circuit (24) from the collector of. Then, the attenuator circuit (24) attenuates the B primary color signal from the third subtraction circuit (9) by a predetermined amount and outputs it to the third output terminal (14).
従って、第1乃至第3出力端子(12)乃至(14)からの各原
色信号をテレビ画面上に写せば、画面中の緑色近傍の色
から青色成分が除去され、鮮やかな緑色が得られる。Therefore, if the primary color signals from the first to third output terminals (12) to (14) are projected on the television screen, the blue component is removed from the colors near the green in the screen, and bright green is obtained.
(ト)発明の効果 以上述べた如く、本発明に依れば寄生容量の影響を受け
ないオフセット型の差動増幅回路を提供出来る。又、本
発明に依ればオフセットを補償する為のエミッタフォロ
アトランジスタや抵抗が不要となるので、素子数の削減
が計れる。又、実施例の如くオートグリーン回路に本発
明の差動増幅回路を用いれば、色差信号の正確なレベル
比較が可能となり、正しく緑色の補正を行なうことが出
来る。(G) Effect of the Invention As described above, according to the present invention, it is possible to provide an offset type differential amplifier circuit which is not affected by parasitic capacitance. Further, according to the present invention, the emitter follower transistor and the resistor for compensating the offset are not necessary, so that the number of elements can be reduced. Further, if the differential amplifier circuit of the present invention is used for the auto green circuit as in the embodiment, it is possible to accurately compare the levels of the color difference signals and correct the green color.
【図面の簡単な説明】第1図は、本発明の一実施例を示
す回路図、及び第2図は従来のオートグリーン回路用の
差動増幅回路を示す回路図である。 (26)……第1トランジスタ、(27)……第2トランジス
タ、(28)……第3トランジスタ、(29)……動作電流源、
(30)……抵抗、(31)……定電流源。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional differential amplifier circuit for an auto green circuit. (26) …… first transistor, (27) …… second transistor, (28) …… third transistor, (29) …… operating current source,
(30) …… Resistance, (31) …… Constant current source.
Claims (1)
スタと、該2つのトランジスタの共通エミッタと基準電
位点との間に接続された動作電流源とから成る差動増幅
回路において、前記動作電流源の一端と前記2つのトラ
ンジスタの一方のトランジスタのエミッタとの間に抵抗
を設けるとともに、前記抵抗に定電流を供給する定電流
源を設け、前記差動増幅回路にオフセットを持たせるよ
うにしたことを特徴とする差動増幅回路。1. A differential amplifier circuit comprising two transistors whose emitters are commonly connected and an operating current source connected between a common emitter of the two transistors and a reference potential point. A resistor is provided between one end of the differential transistor and the emitter of one of the two transistors, and a constant current source for supplying a constant current to the resistor is provided so that the differential amplifier circuit has an offset. A differential amplifier circuit characterized by.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62322552A JPH0612858B2 (en) | 1987-12-18 | 1987-12-18 | Differential amplifier circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62322552A JPH0612858B2 (en) | 1987-12-18 | 1987-12-18 | Differential amplifier circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01162408A JPH01162408A (en) | 1989-06-26 |
JPH0612858B2 true JPH0612858B2 (en) | 1994-02-16 |
Family
ID=18144948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62322552A Expired - Fee Related JPH0612858B2 (en) | 1987-12-18 | 1987-12-18 | Differential amplifier circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0612858B2 (en) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0685487B2 (en) * | 1985-05-18 | 1994-10-26 | 日本電装株式会社 | Dual antenna for dual frequency |
JPS61264806A (en) * | 1985-05-20 | 1986-11-22 | Fujitsu Ltd | Offset correction circuit for differential amplifier |
-
1987
- 1987-12-18 JP JP62322552A patent/JPH0612858B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH01162408A (en) | 1989-06-26 |
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