JPH06121287A - Motion detection circuit for muse system decoder - Google Patents

Abstract

PURPOSE:To provide the motion detection circuit for MUSE system decoder without deterioration in picture quality by preventing occurrence of missing signal. CONSTITUTION:A difference absolute value of each picture element in two-frame preceding position relation accurately with respect to a specific notice picture element and preceding and succeeding L-picture elements of a current frame is obtained, the result of L+1 picture elements is accumulated and the result of accumulation of difference absolute values for L picture elements in the similar cross reference in 2-frame + or - 1,..., 2-frame + or - M (M is an integer being 2 or over) preceding picture elements are calculated. Then the relation of position minimizing the calculated value among (2M+1) sets of calculation results is detected, sets when the minimum value is other than a relation of two preceding frames accurately with respect to a noted picture element position consecutive in the horizontal direction are grouped and an output of the grouping circuit 15 is used to implement pading processing to reduce mis-detection.

Description

Detailed Description of the Invention

[0001]

This invention relates to MUSE (Multiple S
M used for digital video signal processing of a high-definition television receiver for receiving a high-definition television signal band-compressed by the ub-Nyquist Sampling Encod-ing method.
The present invention relates to a motion detection circuit of a USE decoder.

[0002]

2. Description of the Related Art A motion detection circuit for a high-definition television signal of the MUSE system proposed by NHK (hereinafter simply referred to as "MUSE signal") calculates a difference between a current frame and a signal two frames before, and further A portion having a large absolute value is determined as a moving area, and sensitivity correction is performed at the edge portion of the image. This means, for example, "MUSE-
High-definition transmission system ", Ninomiya, edited by The Institute of Electronics, Information and Communication Engineers, page 193, Fig. 4.94, and is known.

However, even in the motion detection of the standard TV system, when a moving object has a complicated pattern, etc., a detection omission such as a hole is generated in the moving object of the detection result, and as a result, It becomes a reproduced image of multi-line blur.

Particularly, in the MUSE system, since subsampling is performed between frames, it is necessary to detect motion based on the difference between two frames. In this case, the perforation phenomenon of the detection result is more likely to occur than in the case of using the difference between one frames. Therefore, it is necessary to perform a process of extending the detection signal in the time direction to prevent the perforation phenomenon. For example, when the area of a moving object having a pattern in which holes are likely to occur is large, it is impossible to prevent the phenomenon of holes, and if the process of extending the detection result in the time direction is performed excessively, the motion detection result However, it is a phenomenon in which a still part is overlapped and a tail is long drawn behind a moving object.

FIG. 9 is a block circuit diagram showing the configuration of a motion detection circuit used in a MUSE decoder as a conventional example. FIG. 10 is a timing chart for explaining the operation of the motion detection circuit shown in FIG.

In FIG. 9, the signal of the edge component in the video signal from the terminal 60 is input to the absolute value conversion circuit (ABS) 63. Also, the current video signal 6d is output to the terminal 61.
Is input to the delay circuit 64 for two frames, and its output is input to the subtractor 65. Then, the subtracter 65 subtracts the directly input video signal 6b and the output from the delay circuit 64 of the two frames. The subtracted signal is input to the absolute value conversion circuit 66 and used as the difference in magnitude between the two. The output signal 6f of the absolute value conversion circuit 63 is the absolute value conversion circuit 6
The signal that is input to the divider 67 that divides by the signal of 6 and that is output through the 1-frame delay circuit 68 and the signal that is output by the divider 67, whichever has the larger value, is output from the MAX circuit 69. It is output and is output from the terminal 62 as a motion detection output signal 6g.

That is, a 2-frame delay circuit 64 and a subtractor 65 generate a 2-frame difference for the video signal 6d. Further, after being processed by the absolute value conversion circuit 66, it is input to the divider 67. The edge signal 60 is processed by the absolute value conversion circuit 63 and then input to the divider 67. Thus, the divider 67
Then, the 1-frame delay circuit 68 and the MAX circuit 69 further obtain the motion detection output 6g extended by 1 frame in the time direction from the terminal 62 with respect to the signal which has been divided by the edge component to become the motion amount. .

Next, the operation principle of the circuit shown in FIG. 9 is shown in FIG.
It will be described using 0. Here, a case where a certain staircase-like object moves in the direction of the arrow will be described. In the figure,
The signals 6a to 6d mean data of one particular scanning line of interest, and the value in the vertical direction means the amplitude of the data.

In FIG. 10, a signal 6d is a signal of the current frame, and is an old past signal one frame at a time in the order of the signal 6c, the signal 6b, and the signal 6a. First, the signal 6d in the current frame and the signal 6b two frames before are obtained as a signal 6e when the difference and the absolute value are obtained through the subtractor 65 and the absolute value conversion circuit 66. Further, in this circuit, the one-frame delay circuit 68 extends one frame in the time direction, and as a result, the absolute difference value 6f between the signal 6c one frame before and the signal 6a three frames before and the divider 67. The signal 6e directly input from is subjected to the MAX processing (the OR processing is also the same), and the output is the signal 6g.

[0010]

On the other hand, in the case of the decoder for the MUSE system, since the interpolation processing of 4 fields is performed in the still image processing, the area necessary for the motion detection output that does not cause a malfunction in the motion adaptation processing is , The period 6h indicated by the arrow.

Therefore, the signal 6g obtained as described above has the following problems.

First of all, since the second frame differential signal is further subjected to the one-frame extension processing in the time direction, an unnecessary motion detection signal generated behind the moving object is generated. Exists. In this way, the motion detection signal is generated more than necessary, so that the moving image is superimposed on the still image and the reproduction image quality is deteriorated.

The second one is that, when the amplitude of the signal of the motion detection result decreases in the central portion of the moving object despite the required moving area, the moving portion still image processing is performed in this portion. Therefore, multi-line blurring and halftone dot interference are likely to occur depending on the pattern of a moving object. this is,
Further, it is solved by stretching in the time direction, but this makes the first problem worse.

As described above, in the conventional motion detection circuit, 2
Motion detection is performed based on the difference between frames, but the detection result is likely to cause a puncture phenomenon, and when stretching is performed in the time direction to prevent this puncture phenomenon, the result is a moving object. An unnecessarily large motion detection area is generated in the rear of the image, an area in which a moving image is superimposed on a still image is generated, and reproduction image quality is deteriorated.

Therefore, an object of the present invention is to provide a motion detection circuit of a MUSE decoder which prevents the occurrence of a perforation phenomenon and causes no image quality deterioration.

[0016]

[MEANS FOR SOLVING THE PROBLEMS] MUSE of the present invention
The motion detection circuit of the system decoder obtains the absolute difference value of each pixel having a positional relationship two frames before the specific pixel of the current frame and the L pixels before and after the specific pixel, and obtains the result of the L + 1 pixels. At the same time, the same process is performed to calculate an accumulation result of difference absolute values of L pixels having a corresponding positional relationship of two frames ± 1, ..., Two frames ± M (M is an integer of 2 or more) pixels before, Of the 2M + 1 calculation results,
A minimum position detection circuit that detects a positional relationship that minimizes the calculated value, and among outputs of the minimum position detection circuit, a value other than a position at which the minimum value has a relationship between a predetermined pixel position and a pixel position two frames before A grouping circuit that detects the continuity in the horizontal direction, collects the continuity into one group, and generates horizontal pulses corresponding to the group, an input video signal, and a signal delayed by two frames The difference between the frames of the moving area detection circuit that performs the motion detection processing based on the absolute value of the difference is used, and the output of the grouping circuit is used to generate no difference despite the movement portion. A padding processing circuit for padding a signal having a predetermined amplitude in a portion or a portion in which it hardly occurs.

[0017]

According to the present invention, a difference occurs between the input video signal and the signal delayed by two frames, the output of the moving area detecting circuit performing the motion detecting process based on the absolute value of the difference, regardless of the moving portion. For a portion that has not been generated or a portion that has hardly occurred, first, the absolute difference value of each pixel that is exactly two frames before the specific pixel of interest in the current frame and the L pixels before and after that pixel is calculated. Then, the results of those L + 1 pixels are accumulated, and at the same time, the same processing is performed for two frames ± 1, ..., Two frames ± M (M is an integer greater than or equal to 2) pixels. 2M of the cumulative results of the absolute difference values of the L pixels in
Among the +1 calculation results, the minimum position detection circuit detects the positional relationship that minimizes the calculated value. Of the output of the minimum position detection circuit, when the minimum value is exactly two frames before the position of the pixel of interest, the position is "0" position, and the other positions are "± N" positions (N is an integer). In this case, the grouping circuit detects the case where the values other than the "0" position are continuous in the horizontal direction, collects the group into one group, and generates the horizontal pulse. Based on the output of this grouping circuit, the padding processing circuit uses the output of this grouping circuit with respect to the difference signal between the frames, where there is no difference, or almost no difference is generated despite movement. By filling in the unfilled parts, false detections are reduced.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A motion detection circuit of a MUSE type decoder according to an embodiment of the present invention will be described below.

FIG. 1 is a block circuit diagram showing the structure of a motion detection circuit of a MUSE decoder according to an embodiment of the present invention. FIG. 8 is a timing chart showing the operation of the motion detection circuit of the MUSE scheme decoder according to the embodiment of the present invention. In the figure, the symbols 5a to 5h indicate signals at the same symbol positions in FIG.

In FIG. 1, the video signal 5b input to the terminal 10 is written in the frame memory 12 of 2 frames which functions as a delay circuit of 2 frames, and the subtractor 1
In step 3, the video signal 5b is subtracted from the signal read from the frame memory 12, the absolute value is converted by the absolute value conversion circuit (ABS) 17, and the timing adjustment signal 5g is input to the padding processing circuit 19 by the trimmer 18. To be done. On the other hand, a grouping in which the signal 5a and the video signal 5b read from the frame memory 12 are input to the minimum position detection circuit 14 and the output of the minimum position detection circuit 14 is detected when the displacement of each pixel is continuously the same value. Input to circuit 15 and pulse width reduction circuit 1
6 is input to the hole filling processing circuit 19 and a motion detection output signal 5h is output from the hole filling processing circuit 19 as a terminal 11
Obtained from

A circuit for inputting the video signal 5b into the frame memory 12 for two frames, subtracting the video signal 5b from the signal read from the frame memory 12, and performing absolute value conversion in the absolute value conversion circuit 17. Constitutes a moving area detection circuit for carrying out a motion detection process on the basis of the absolute value of the difference between the input video signal 5b and the signal delayed by two frames in this embodiment.

Next, the minimum position detection circuit 1 used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention.
4, the grouping circuit 15, the pulse width reduction circuit 16, and the padding processing circuit 19 will be further described in detail.

FIG. 2 shows a minimum position detection circuit 1 used in the motion detection circuit of the MUSE decoder according to one embodiment of the present invention.
4 is a block circuit diagram showing the configuration of FIG. FIG. 3 is a block circuit diagram showing the configuration of the comparison circuit 23 used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention. In FIG. 3, the symbol 2a is the symbol 2 of FIG.
The symbol a and the symbol 2b indicate the same positions as the symbol 2b and the symbol 2c in FIG. 2, respectively.

In FIG. 2, a frame signal of two frames before is input to a D type flip-flop 22 connected to a series of 7 signals 2a of two frames before at a terminal 21. The signal 2b of the current frame is input to each comparison circuit 23, and each comparison circuit 23 compares each input / output of the seven D type flip-flops 22 to which the signal of the previous two frames has been input, and the signal of the comparison result. 2c is the minimum position determination circuit 2
5 and the result is obtained from the output terminal 26.

In FIG. 3, the five-stage shift register 232 forming each comparison circuit 23 receives each input / output signal of seven D type flip-flops 22 in which the signal 2a two frames before is delayed by one pixel. The signal of the current frame is input to the 5-stage shift register 235 via the trim circuit 234, and each bit of the 5-stage shift register 232 and the 5-stage shift register 235 is input to the subtractor 236. The output of the subtractor 236 is input to each absolute value conversion circuit (ABS) 237 consisting of five circuits, and the output of the subtractor 236 is input to the adder 238, so that the difference of the corresponding 5 pixels is calculated. Find the absolute value, and then
The signal 2c obtained by calculating the added value is input to the minimum position determination circuit 25.

In particular, here, the accumulated error of each of the two pixels before and after the specific pixel of interest in the current frame, a total of five pixels, and the five pixels in the same positional relationship of the signal two frames before is calculated. At the same time, the same calculation is performed for the positional relationship between the specific pixel of interest two frames before, −1 pixel, −2 pixel, −3 pixel, −4 pixel, +1 pixel, +2 pixel, and +3 pixel. The minimum position determination circuit 25 outputs the position (vector) having the smallest value as position information for each of the obtained eight accumulated results.

That is, the minimum position determination circuit 25 obtains the absolute difference value of each pixel having a positional relationship exactly two frames before the pixel of interest of the current frame and L (L is an integer) pixels before and after the pixel of interest. The results of those L + 1 pixels are accumulated, and at the same time, the same processing is performed in the same positional relationship in the previous two frames ± 1, ..., Two frames ± M (M is an integer of 2 or more) pixels. The cumulative result of the absolute difference values of L pixels is calculated, and the positional relationship that minimizes the value is detected from the 2M + 1 calculated results.

FIG. 4 is a grouping circuit 1 used in the motion detection circuit of the MUSE decoder of one embodiment of the present invention.
5 is a block circuit diagram showing the configuration of FIG. FIG. 5 is a timing chart for explaining the operation of the grouping circuit 15 shown in FIG.

In FIG. 4, the input data 3a from the input terminal 30 is input to the D type flip-flop 32 connected in series of four. Each input / output of the D-type flip-flop 32 connected in series of four is input to each comparator 33 having two inputs A and B and one output Y.
Each comparator 33 has the function of Y = A when A = B and A ≠ 0, and Y = 0 otherwise. Further, the comparator 37 has two inputs A and B and one output Y, and has a function of generating a binary output of Y = 1 when A = B and A ≠ 0, and Y = 0 otherwise. It is a thing. Output 3 of comparator 37
b is input to the D-type flip-flop 38 connected in series of four. Further, the output of the rising edge extraction circuit 34 that generates a pulse having a one-clock width at the rising edge portion of the input pulse is input to the D-type flip-flop 39 connected in series of three. Three
D-type flip-flop 39 connected in series
Each input / output of the input 3g of the D-type flip-flop 38 via the OR circuit 35 and the input 3g of the OR circuit 36.
Becomes The output signal 3i of the OR circuit 36 is obtained from the terminal 31.

In FIG. 5, symbols 3a to 3i show signal waveforms at the symbol positions shown in FIG.

The D-type flip-flop 32, the comparator 33, and the comparator 37 are used for the input data 3a to detect a case where five or more same values other than "0" in the input data 3a continue. Generate pulse 3b. Furthermore,
A rising edge extraction circuit 3 is provided at the rising portion of the edge.
At 4, a pulse 3c having a width of 1 clock is generated. This 1-clock-width pulse 3c is applied to the D-type flip-flop 39.
Then, the signal 3g is expanded by the OR circuit 35 to a width of 4 clocks. At the same time, the output of the pulse 3b is delayed by 4 clocks to form the pulse 3h, which is the output 3i obtained by ORing the OR circuits 36. This rising edge extraction circuit 34, D
In the processing by the type flip-flop 39 and the OR circuit 35, since the first four clocks are missing when the pulse 3b is generated, that portion is compensated here.

As described above, the grouping circuit 15 of the present embodiment, when the minimum value of the outputs of the minimum position detection circuit 14 is exactly two frames before the specific pixel position of interest, for example, " 0 position and other positions are "±"
The minimum position where the values other than the "0" position when the N "position (N is an integer) are continuous in the horizontal direction are detected, and the collection is grouped into one group to generate a horizontal pulse. Of the outputs of the detection circuit 14, it is detected that the values other than the position where the minimum value is in the relationship between the predetermined pixel position and the pixel position two frames before are continuous in the horizontal direction, and the continuous values are grouped into one group. In summary, the horizontal pulse width corresponding to the group is generated.

In particular, in the case of the grouping circuit 15 in this example, a pulse is generated when five or more identical values are consecutive for convenience of description. However, in practice, a noise malfunction or the like is taken into consideration. The present invention is not limited to the case where the same value or more is consecutive, but may be determined or configured by different numbers.

Further, FIG. 6 shows a MUSE of an embodiment of the present invention.
It is a block circuit diagram showing a configuration of a padding processing circuit 19 used in the motion detection circuit of the system decoder.

In FIG. 6, an input terminal 41 is a signal from the difference absolute value system processing of the video signal (symbol 5g in FIG. 1), and an input terminal 47 is the grouping circuit 15 (symbol in FIG. 1). 5f) signal. 2 inputs of A and B,
The comparator 42 having 1 output of Y inputs the predetermined threshold value 4b and the output from the difference absolute value system processing of the input video signal, and uses the output as one input of the AND circuit 43 of the binary signal, The signal 4d (3i) from the grouping circuit 15 is input to the other side of the AND circuit 43. Then, the output of the AND circuit 43 is used as one input of the AND circuit 44 and the predetermined threshold value 4g is input to the other to obtain a multilevel signal as its output, and the output is input to the adder 45 and input. Add to the output of the absolute difference system processing of the video signal,
The motion detection signal 4f is obtained at the motion detection terminal 46.

This operation is illustrated in FIG.

FIG. 7 is a timing chart showing the operation of the padding processing circuit 19 used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention. The symbols in FIG. 7 represent the signal waveforms with the same symbols as the symbols at the positions shown in FIG.

Assuming that the signal 4a shown in FIG.
Is inputted, the comparator 42 compares the signal 4a with a predetermined threshold value 4b. Only when the threshold value 4b is large, the comparator 42 outputs "1" as the output signal 4c. AND circuit 4
At 3, the signal is ANDed with the input terminal 47 to obtain the signal 4e. When the signal 4e is "1", the threshold value 4g of the AND circuit 44 is input to the adder 45 and is added to the signal 4a to be the motion detection output 4f. Therefore, if there is a hole in the input 4a, the hole filling process is performed.

As described above, the hole filling processing circuit 19 of the present embodiment.
Inputs the video signal 5b into the frame memory 12 for two frames, subtracts the video signal 5b from the signal read from the frame memory 12, and the absolute value conversion circuit 17 performs absolute value conversion in the moving area detection circuit. Using the output of the grouping circuit 15 for the difference signal between frames,
A signal having a predetermined amplitude is filled in a portion whose difference is equal to or smaller than a predetermined value even though it is a moving portion.

In addition, although the pulse width reduction circuit 16 will not be described in detail, the pulses generated by the grouping circuit 15 are unnecessarily widened depending on the configuration of the comparison circuit 23 in the minimum position detection circuit 14 in FIG. there is a possibility. Therefore, the pulse width is reduced by cutting the pulse before and after the pulse generated by the grouping circuit 15 according to the configuration of the comparison circuit 23. Specifically, it can be obtained by using a clock pulse and cutting the front and / or the rear of the pulse width to a predetermined pulse width.

Next, the overall operation of the motion detection circuit of the MUSE system decoder of this embodiment will be described with reference to FIG.

The input video signal 5b is delayed by two frames in the frame memory 12 and becomes a signal 5a. The subtractor 13 generates a difference between the two-frame delayed signal and the video signal that has arrived now. Further, the difference is led to the absolute value conversion circuit 17, and the absolute value conversion is performed there. The absolute value of their difference is the signal 5c.

On the other hand, the input video signal 5b and the signal 5a delayed by two frames in the frame memory 12 are input to the minimum value detection circuit 14. Here, the horizontal movement of the moving object in the input video signal is detected,
The result is signal 5d. This is to calculate the minimum horizontal displacement by calculating the difference between corresponding pixels around a certain target pixel on a pixel-by-pixel basis with respect to the video of the current frame and the image two frames before. Further, the grouping circuit 15 detects the case where the displacements of the respective pixels obtained by the minimum value detection circuit 14 are continuously the same value for grouping, and obtains the binary pulse 5e. After that, the pulse width reduction circuit 16 removes the unnecessary spread of the binary pulse that detects the case where the displacement of each pixel has the same value continuously, and this signal 5f is input to the padding processing circuit 19. . In the padding processing circuit 19, the signal 5 of the absolute value conversion circuit 17 described above is used.
A signal 5g in which c is trimmed by a trimmer 18 and a signal 5f from the pulse width reduction circuit 16 are input, and a hole filling process is performed for a hole-filling phenomenon of the signal 5g having an amplitude of a threshold value 5i or less to obtain a signal 5h. That is, the hole filling phenomenon occurring in the conventional motion detection circuit based on the frame difference shown in FIG. 10 is filled.

By the way, the moving area detection circuit of the above embodiment is composed of the frame memory 12, the subtraction circuit 13, and the absolute value conversion circuit 17, but when the present invention is carried out, the input video signal 5b is inputted. It is possible to use a circuit for detecting a moving area with a known perforation phenomenon, which performs a motion detection process based on the absolute value of the difference between the signal delayed by 2 frames and the signal.

In addition, the minimum position detection circuit 14 of the above embodiment
Is the difference absolute value of each pixel having a positional relationship two frames before exactly with respect to the pixel of interest of the current frame and two pixels before and after the pixel of interest, and accumulates the results of those five pixels.
At the same time, the same process is performed to calculate the cumulative results of the absolute difference values of the pixels having the same corresponding relationship in the positional relationship of the seven pixels before and after the particular pixel of interest, and the value out of the eight calculated results is the minimum value. However, in the case of implementing the present invention, the absolute difference between each pixel having a positional relationship two frames before with respect to the specific pixel of the current frame and the L pixels before and after the specific pixel is detected. The value is obtained, and the results for those L + 1 pixels are accumulated, and at the same time, the same process is performed for 2 frames ± 1 ,.
.... Accumulation result of difference absolute values of L pixels having a corresponding positional relationship of 2 frames ± M (M is an integer of 2 or more) pixels before, and the calculated value is the smallest among the 2M + 1 calculation results. It suffices if it can detect the following positional relationship.

Then, the grouping circuit 1 of the above embodiment
5 is combined into one continuous group, and the pulse width in the horizontal direction corresponding to the group is generated. However, when implementing the present invention, the minimum position detection circuit 14
Of the outputs, the values other than the position where the minimum value is in the relationship between the predetermined pixel position and the pixel position two frames before are detected to be continuous in the horizontal direction, and the continuous values are combined into one group. Any pulse can be used as long as it can generate a horizontal pulse corresponding to a group.

Furthermore, the hole filling processing circuit 19 of the above embodiment is
Although the padding is performed by the output of the grouping circuit 15, in the case of implementing the present invention, the output of the grouping circuit 15 is used for the difference signal between the frames of the moving area detection circuit. It suffices to fill a signal having a predetermined amplitude with respect to a portion where the difference is equal to or less than a predetermined value even though it is a portion.

[0048]

As described above, the motion detection circuit of the decoder for the MUSE system of the present invention detects the moving area based on the absolute value of the difference between the input video signal and the signal delayed by two frames. For the differential signal between the frames of the circuit, the output of the grouping circuit is used to fill a signal of a predetermined amplitude with respect to a portion where the difference is equal to or less than a predetermined value even though it is a moving portion. Since the processing circuit fills in the holes, malfunctions due to the hole-filling phenomenon in motion detection and image quality deterioration that have occurred in the conventional method are eliminated by the hole-filling process in the hole-filling processing circuit, and as a result, motion with few false detections A detection circuit can be realized.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a configuration of a motion detection circuit of a MUSE scheme decoder according to an embodiment of the present invention.

FIG. 2 is a block circuit diagram showing a configuration of a minimum position detection circuit used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention.

FIG. 3 is a block circuit diagram showing a configuration of a comparison circuit of a minimum position detection circuit used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention.

FIG. 4 is a block circuit diagram showing a configuration of a grouping circuit used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention.

5 is a timing chart for explaining the operation of the grouping circuit shown in FIG.

FIG. 6 is a block circuit diagram showing the configuration of a padding processing circuit used in the motion detection circuit of the MUSE decoder according to the embodiment of the present invention.

FIG. 7 is a timing chart for explaining the operation of the padding processing circuit shown in FIG.

FIG. 8 is a timing chart showing the operation of the motion detection circuit of the MUSE scheme decoder according to the embodiment of the present invention.

FIG. 9 is a block circuit diagram showing a configuration of a motion detection circuit used in a MUSE decoder as a conventional example.

10 is a timing chart for explaining the operation of the motion detection circuit shown in FIG.

[Explanation of symbols]

 12 frame memory 13 subtractor 14 minimum position detection circuit 15 grouping circuit 16 pulse width reduction circuit 17 absolute value conversion circuit 18 trimmer 19 hole filling processing circuit

Claims (1)

[Claims] 1. A motion area detection circuit for performing motion detection processing based on an absolute value of a difference between an input video signal and a signal delayed by two frames, and a specific pixel of a current frame and L pixels before and after the specific pixel. On the other hand, the absolute difference value of each pixel in the positional relationship two frames before is calculated, and the results of L + 1 pixels are accumulated, and at the same time, the same process is performed for two frames ± 1, ...
L in a corresponding positional relationship before M (M is an integer of 2 or more) pixels before
A minimum position detection circuit that calculates the cumulative result of the pixel difference absolute values and detects the positional relationship that minimizes the calculated value among the 2M + 1 calculation results; and the minimum value of the outputs of the minimum position detection circuit. Detects that a value other than a position having a relationship between a predetermined pixel position and a pixel position two frames before is continuous in the horizontal direction, collects the continuous values into one group, and detects values in the horizontal direction corresponding to the group. A grouping circuit that generates a pulse, and a differential signal between frames of the moving area detection circuit,
And a padding processing circuit for padding a signal having a predetermined amplitude to a portion whose difference is less than a predetermined value even though it is a moving portion, using the output of the grouping circuit. The motion detection circuit of the decoder for the MUSE system.