JPH06112526A - Semiconductor chip array, semiconductor chip forming pattern therefor, and its dicing method - Google Patents

Abstract

PURPOSE:To provide a semiconductor chip array in which chips are arranged adjacent to each other so that a prescribed positional relation can be obtained between them and which can be easily cut off from the wafer of the used chips, and then, with which high assembling accuracy can be obtained. CONSTITUTION:In the title array, semiconductor chips 321 and 322 are arranged adjacent to each other so that a prescribed positional relation can be obtained between them and the width of the semiconductor chip arranging direction is made shorter than the width which is required when the chips 321 and 322 are closely arranged in such a way that a gap 37 can be formed between the chips 321 and 322.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip assembled such that semiconductor chips such as LED array chips are adjacent to each other in a predetermined positional relationship, and when such semiconductor chips are formed in a lattice pattern on a semiconductor wafer. And a dicing method for cutting a semiconductor chip formed in such a pattern from a semiconductor wafer.

[0002]

2. Description of the Related Art An LED array used in an LED printer is a large number of minute LEDs arranged in one direction at a minute pitch. The entire length of the LED array requires only the printing width, and usually has a width of several hundred mm. It is impossible to form an array having such a length on a semiconductor wafer because of the relationship between wafer use efficiency and yield. Therefore, a long LED array is realized by arranging a plurality of LED array chips of about 10 mm composed of several tens to 100 LEDs in the long axis direction of the chip to form an array. Although there is a thermal head or the like in the arrangement of a plurality of such chips, an LED array will be described below as an example.

FIG. 4 is a view showing an LED array chip and an assembled state. FIG. 4A shows a state in which the LED array chips 42 are arranged in the long axis direction. For example, one L
In the ED array chip, 128 LEDs are arranged at a pitch of 85 μm. Usually each LED array chip 42
Are assembled on a substrate made of ceramic or the like by fixing each LED with an adhesive or the like so that they are aligned.

FIG. 4B shows an arrayed LED array chip.
It is a figure which shows the connection part of a battery. 42 ₁, 42₂Are adjacent
LED array chip with a small L on each chip
The EDs 43 are arranged on a straight line at a predetermined pitch. Four
Reference numeral 4 is an electrode for each LED 43, and the drive signal is sent to the LED 43.
For connecting the driving IC that applies the signal and the LED 43
Are bonded.

Since the positional accuracy of the LEDs 43 directly affects the accuracy of the printing position and the printing quality, it is necessary that they are arranged in a straight line at a predetermined pitch a, which is required over the entire width. The positional accuracy in each chip is high, and there is no problem in satisfying such accuracy, but how to assemble adjacent chips with high accuracy is a big problem.

The positional accuracy of the LEDs between adjacent chips is related to the inclination of the central axis of the LED array and the displacement of the connecting portion in the plane of FIG. In reality, there is also a deviation in the direction perpendicular to the plane of FIG. 4, but this is omitted here because it is determined by adhesion or the like. The assembly is performed by using a microscope so that the above accuracy is satisfied. However, in order to facilitate the assembly, the edges of the adjacent chips are aligned, and the edge of FIG. It is desirable to match the position in the Y direction in b). Therefore, the sum of the distance between the edge of the chip and the center position of the LED is L
It is necessary to be equal to the arrangement pitch a of the EDs. Further, the edge needs to be perpendicular to the arrangement direction of the LEDs.

The LED array chip is formed in a lattice shape on a semiconductor wafer, and thin grooves are processed by a dicer as shown in FIG. 5 and cut out. This is called dicing. In FIG. 5, 51 is a thin grindstone blade, and 52 is a part that supports and rotates the grindstone blade 51. Reference numeral 53 is a wafer chuck for holding a semiconductor wafer, 54 is a moving mechanism for moving the wafer chuck in parallel in the X- and Y-axis directions, and further in the Z-axis direction as necessary, and also has a rotating function. .

Dicing is performed by repeatedly forming grooves in the gaps of the chips arranged in a grid.
FIG. 6 shows a state after processing of an LED array chip processed by a method conventionally used as a dicing method for an LED array chip. 6 (a) is a top view,
FIG. 6B is a side view. In FIG. 6, 61 ₁ and 61
Reference numeral ₂ is a chip formed adjacent to each other, and the pitch of the LEDs at the ends of both chips is equal to the pitch of the regular LEDs plus the width of the groove 65, that is, the width of the grindstone blade. After the groove 55 is processed and divided by the grindstone blade, the chips to be arranged as they are are selected and assembled.

However, the width of the grindstone blade varies to some extent, and the width of the grindstone blade is abraded and the width changes as it is used. If the widths are different, the distance between the processed edge and the LED 62 does not reach a desired value, and the pitch of the assembled LED array has different pitches at the connecting portions of the chips.
Therefore, according to another method of dicing the LED array chips, adjacent LED array chips are formed with a certain distance therebetween, and two grooves are formed between the chips to form LEs each having an edge.
Set it to a predetermined position from D. 7A and 7B are views showing a chip grooved by this processing method. FIG. 7A is a top view and FIG. 7B is a side view.

In FIG. 7A, 71 ₁ and 71 ₂ are L
It is an ED array chip, and 72 is an LED. 75 ₁
And 75 ₂ indicate the processed grooves. If the groove formed by the grindstone is perpendicular to the surface and the distance between the center of the LED at the edge and the processed edge is half the LED arrangement pitch, the edge of the LED array chips to be arranged adjacent to each other is set. By arranging the LEDs in contact with each other, the LEDs can be arranged at an equal pitch. To be precise, the total length of the distances between the LEDs at the ends of the LED array chips arranged adjacent to each other and the edge may be the LED arrangement pitch.

However, the actually processed groove is not completely perpendicular to the surface, and a slight tilt error occurs. When there is such a tilt error, even if the above-described length relationship is satisfied on the surface, the length relationship is not satisfied at the lower portion, and the LED arrangement pitch is increased or decreased only in the connection portion. Can happen. In order to prevent the above problems from occurring, until now the groove to be processed is inclined with respect to the surface as shown in Fig. 7 (b), and the length of the bottom of each chip is always shorter than the surface. I was trying to become. If the distance between the center and the edge of the LED at the edge satisfies the above length relationship on the surface, the LED array chips are arranged in contact with each other so that the LED array pitch is a regular length even at the connection portion. become.

[0012]

To process a groove inclined with respect to the surface of a semiconductor wafer as shown in FIG. 6B,
The grindstone blade is tilted by a predetermined amount before processing. However, FIG. 7 (b)
As shown in Fig. 2, the two grooves 75 ₁ and 75 _{2 which} are processed between the LED array chips formed adjacent to each other have different inclination directions. Therefore, when processing these grooves, the inclination of the grindstone blade should be changed. , Or the wafer must be rotated 180 °.

Normally, the groove processing is performed in order from one side of the semiconductor wafer. However, changing the inclination of the grindstone blade every time two grooves between each chip row are processed is complicated because the inclination adjustment is complicated. There is a problem that it becomes difficult to perform groove processing with high accuracy. Therefore, the groove with one inclination is sequentially processed, and when the processing is completed, the semiconductor wafer is rotated by 180 ° or the inclination of the grindstone blade is changed, and the groove with the other inclination is sequentially processed. With such processing, after the positioning of the grindstone blade and the semiconductor wafer, each groove can be sequentially processed while the grindstone blade is fed at a constant pitch.

However, in the above-described processing method, each chip row is cut off when the groove having one inclination is processed. The semiconductor wafer is fixed to the table with adhesive tape or the like, but in the state where it is separated for each chip row, a slight misalignment occurs in each chip row during the second processing for processing the groove with the other inclination. Occurs. Therefore, there is a problem in that the width of each chip row varies.
Since the variation in the width of each chip row becomes the variation in the width of the LED array chip as it is, even if the LED array chips are arranged in contact with each other, the pitch of the LEDs at the connecting portion deviates from the predetermined value.

When the processing of one groove is completed and the other groove is processed, the semiconductor wafer is rotated by 180 ° or the inclination of the grindstone blade is changed. Alignment work is required to reposition the grindstone blade with respect to the insert row. This alignment work is not only complicated, but there is a problem that an error in the width of the LED array chip occurs due to an adjustment error.

The present invention has been made in view of the above problems, and realizes a semiconductor chip array suitable for easily cutting out semiconductor chips to be combined and satisfying high assembly precision, and a semiconductor chip wafer for that purpose. The purpose is to realize the above-mentioned formation pattern and dicing method.

[0017]

In order to achieve the above object, the semiconductor chip array of the present invention is arranged such that the width of the semiconductor chips to be assembled in the arrangement direction is shorter than the width required for dense arrangement. There should be a gap between the semiconductor chips.

[0018]

In the conventional semiconductor chip array, since the semiconductor chips to be aligned adjacent to each other are brought into contact with each other at their edges and aligned, the length of each semiconductor chip is equal to the length when closely arranged, and It was required that this length be shortened at the bottom of the semiconductor chip. Therefore, in dicing of the semiconductor chip to be assembled, it is required to form grooves having different inclinations as shown in FIG. 6 (b).

However, since the semiconductor chips are aligned and adhered on the ceramic substrate or the like, if the widths of the semiconductor chips are smaller than the widths when they are closely arranged, the semiconductor chips are not contacted at the edges of the semiconductor chips. It can be arranged with a gap so as to have a regular pitch. Of course, it is necessary to adjust the position without making contact, but such position adjustment is easy if a pattern recognition technique using a TV camera in recent years is used, and there is no problem.

If the above-mentioned gap is provided when the semiconductor chips are aligned, an error in the inclination of the groove can be absorbed in this gap, so that there is no problem even if a vertical groove is processed. With such a vertical groove, it is not necessary to adjust the inclination of the grindstone blade, and all the grooves in this direction can be processed during one feeding operation.

[0021]

EXAMPLE FIG. 1 shows L on a semiconductor wafer in an example.
It is a figure which shows arrangement | positioning of an ED array chip and a processing operation. 1A is a diagram showing the entire semiconductor wafer.
(b) is a partially enlarged view. In (a) of Figure 1,
Reference numeral 1 is a semiconductor wafer, and 2 is an LED array chip. In the cutting process, first, a groove in the X direction is processed and separated into a chip row, and then the semiconductor wafer 1 is rotated by 90 ° to perform Y cutting.
A groove in the direction is processed to separate each LED array chip.
The present invention relates to dicing in the X direction, and only dicing in the X direction will be described below.

As shown in FIG. 1 (b), each chip row is formed with a certain gap, and two grooves are formed once at the positions indicated by 5 _M and 5 _S in this gap. Y
Machining while moving in the direction. As described above, in dicing, after the semiconductor wafer 1 is aligned with the grindstone blade, the semiconductor wafer 1 is moved in the X direction to process the groove. This is repeated while moving in the Y direction at a predetermined pitch to process all the grooves. The dicer has a function of inputting an index that defines the feed pitch in the Y direction, and a value corresponding to the feed pitch is input during dicing.

However, in this embodiment, one of the grooves 5 _M or 5
_S has a constant pitch, but adjacent grooves 5 _M and 5
The pitch of _S is different. Therefore, in order to process all the grooves in the Y direction only once, it is necessary to change the feed pitch. In a current dicer, a main index and a sub index can be defined as indexes that define the feed pitch in the Y direction. The main index is a conventional index, and the sub index defines the feed amount to be added to the feed amount of the main index. Therefore, in the present embodiment, by using the main index and the sub index, the position for processing the groove 5 _M is defined by the main index, and the position of the groove 5 _S is defined by the sub index.

2A and 2B are an enlarged view of a portion adjacent to the LED array chip in this embodiment and a diagram showing a processed groove position. FIG. 2A is a top view and FIG. 2B is a side view. In FIG. 2, 22 ₁ and 22 ₂ are LED array chips formed adjacent to each other, 23 is an LED, and 24 is an electrode for bonding. The LEDs 23 have square or rectangular light emitting portions, and are arranged at equal intervals at a pitch a in each chip. LED 23 on the right end of the left chip 22 ₁
Pitch between LED 23 ₂ at the left end ₁ and the right side of the chip 22 ₂ are formed so as to x.

25 _M and 25 _S are grooves processed by a dicer. It represents the distance between the edge of the chip by the central and grooves 25 _S of the rightmost LED 23 ₁ on the left side of the chip 22 ₁ c,
Similarly, if representing the distance between the edge of the right chip 22 ₂ of the leftmost LED 23 ₂ and the center of the chip in d, the sum of c and d is the groove is machined to be less than a. Although b in the figure corresponds to a gap between two chips on the wafer, this gap b is 2
It is required that the width be equal to or larger than the width required to accurately form the groove of the book. If the gap b is narrow, the groove shown in FIG.
There arises a problem that the portion indicated by 26 in (b) is broken, and is dropped from the tape to which the wafer is attached and hits the surface of the wafer. Therefore, the value of the gap b is preferably determined in consideration of the holding force of the tape to be attached and the action of the grindstone blade and the water supplied during cutting.

As described above, the whetstone blade may be worn during use and its width may become narrow. As the width of the blade becomes narrower, c and d in FIG. 2 increase. In that case, adjust the sub index without modifying the main index. The LED array chips separated as described above are assembled after being inspected for each chip. FIG. 3 is a view showing the assembled LED array, and is an enlarged view of a connecting portion of the LED array.

In FIG. 3, 32 ₁ and 32 ₂ are LED array chips, and usually about 128 L array chips are included in one chip.
The EDs are arranged. The LED array chips are aligned in a line of several tens so that the pitch of each LED is equal over the entire width. Although not shown here,
For assembly, the chip is attached onto a ceramic substrate or the like with an adhesive. At this time, the LEDs are assembled while performing pattern recognition with a TV camera or the like so that the LEDs are aligned in a straight line at equal pitches.

In the assembled state, as shown in FIG. 3, the LED arrangement pitch is a at the chip connecting portion as well.
be equivalent to. As shown in FIG. 2, the distances c and d between the center and the edge of the LED at the edge of the chip are separated so that their sum is smaller than a, so that in the assembled state, the chip A gap 37 is always formed between them. On the contrary, even if the values of c and d have errors due to the width and position error of the grindstone blade, as long as they are within the size t of the gap 37, these errors can be absorbed to assemble. . Therefore, it is desirable to determine the above c and d in consideration of these errors and the LED pattern.

[0029]

As described above, according to the present invention,
L that is aligned and assembled to have a predetermined positional relationship
A semiconductor chip array in which a semiconductor chip such as an ED array chip is easily cut out from a wafer and the assembling accuracy is good can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a semiconductor chip arrangement pattern on a semiconductor wafer in an example of the present invention.

FIG. 2 is an enlarged view of a semiconductor chip and a groove after groove processing in an example.

FIG. 3 shows the finally assembled LE in the example.
It is a figure which shows the assembly state of a D array.

FIG. 4 is a view showing a conventional LED array and an assembled state.

FIG. 5 is a diagram showing a schematic configuration of a dicer.

FIG. 6 is a diagram showing an example of a conventional dicing method.

FIG. 7 is a diagram showing another example of a conventional dicing method.

[Explanation of Codes] 1 ... Semiconductor wafer 2 ... Semiconductor chip (LED array chip) 23 ... LED (light emitting portion) 24 ... Electrode 25 ... Groove

Claims (3)

[Claims] 1. A semiconductor chip array in which semiconductor chips are arranged adjacent to each other so as to have a predetermined positional relationship, and the width of the semiconductor chips in an arrangement direction is shorter than a width required for dense arrangement. A semiconductor chip array characterized in that a gap exists between the arranged semiconductor chips. 2. A semiconductor chip forming pattern for forming the semiconductor chips forming the semiconductor chip array according to claim 1 in a grid pattern on a semiconductor wafer, wherein the semiconductor chips in a semiconductor chip row are arranged during assembly. The semiconductor chip forming pattern is characterized in that the distance in the direction of the arrow is equal to or more than the width required to process the two grooves with the dicer. 3. A dicing method for cutting out semiconductor chips formed by the formation pattern according to claim 2 from a semiconductor wafer, wherein all chip rows are formed during one operation of feeding the semiconductor wafer in one direction. A dicing method characterized in that two grooves are processed between the two.