JPH06105211A - Motion vector detection circuit - Google Patents

Abstract

PURPOSE:To configure a motion vector detection circuit to take a same detec tion range even in both of odd and even number fields. CONSTITUTION:The detection circuit is provided with a correlation arithmetic operation circuit 24 calculating a correlation in each transition in a detection area to a representative point based on picture data in a current field and data from a representative point memory circuit 18, a minimum value detection circuit 27 detecting a minimum value and a minimum position from the output of an accumulation circuit accumulating the output of the correlation arithmetic operation at every transition, an average value arithmetic operation 26 calculation the mean value of the correlation value, and a motion vector generating the motion vector of a picture based on the output of the minimum value detection circuit and the output of the averaging value arithmetic operation circuit, and the detection position of a detection area is differentiated by one line each based on an odd number field and an even number field to control the read of data of the detection are from the representative point memory or the position of the representative point is revised by one line each to control the read of data of the representative point from the representative point memory.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motion vector detection circuit suitable for use in a camera shake correction device of a video camera.

[0002]

2. Description of the Related Art In a video camera, it is necessary to detect a motion vector in order to perform camera shake correction. One of the methods of detecting this motion vector is National Technical Report Vo.
There is a representative point matching method shown in P48-54 of l.37 No.3 Jun.1991.

The representative point matching method is one field (or one frame) at a plurality of fixed representative points.
Compare the previous video signal level with the video signal level of the sampling point in the detection area including the representative point, find the sampling point of the current field that has the smallest difference and has a high correlation, and determine the difference between this sampling point and the representative point. Is specified as a motion of the subject, that is, a motion vector.

The representative point matching method will be described. Figure 9
Indicates an image pickup area, and four detection blocks are provided in this image pickup area. Furthermore, each detection block is 1
It is divided into 6 detection areas. A plurality of sampling points exist in the detection area, and one of them is set as the representative point.

FIG. 10 shows a block diagram of a motion vector detection circuit by the representative point matching method. The digital video signal input to the input terminal 1 is corrected in the vertical interpolation circuit 9 for vertical pixel position deviation between odd and even fields by the interlace method, and then the representative point memory 2 is used.
And the correlation value calculation circuit 3. The representative point memory 2 stores digital data corresponding to the brightness level of each representative point. In the correlation value calculation circuit 3, the absolute value of the difference between the digital data corresponding to the brightness level of the video signal of the current frame and the digital data one field before from the representative point memory 2, that is, the representative point and the representative point in the detection area. The luminance correlation with each transition for is computed. This correlation is calculated in the cumulative addition circuit 4 including the correlation value memory and the adder,
All representative points in the detection block are cumulatively added for each transition. This cumulative addition is performed for every four detection blocks.

The output of the cumulative addition circuit is supplied to the minimum value detection circuit 5 and the average value calculation circuit 6. The minimum value detection circuit 5 detects the position of the one having the smallest correlation value among the plurality of transitions and the minimum value thereof. Further, the average value calculation circuit 6 calculates the average of the accumulated correlation values of each transition. Then, the calculated minimum position, minimum value and average value are supplied to the motion vector generation circuit 7. The motion vector generation circuit 7 is composed of a microcomputer, and its software processing first extracts a total of four motion vectors based on the minimum position for each detection block. Next, of the motion vectors, those having a minimum value / average value smaller than a predetermined threshold value are removed as having low reliability, and 1 is selected from the remaining ones.
Individual motion vectors are specified. The address, timing, etc. of the representative point memory 2, the cumulative addition circuit 4, and the average value calculation circuit 6 are controlled by the control circuit 8.

[0007]

In the video camera, the interlace system is adopted, and one frame is composed of an odd field and an even field. Therefore, when looking at the correlation value between the representative point memory and the image data of the current field, for example, if the representative point memory is an odd field, the current field is an even field.

Therefore, as shown in FIG. 11, the case where the number of lines in the vertical direction detection area is, for example, 12 will be considered. As shown in this figure, even 1 is followed by odd 1 and odd 2 is followed by odd 2 and thus odd field and even field are sequentially transmitted as data. come. In this figure and in FIG. 12 described later, the numbers 0 to 11 are the number of lines, that is, the address of the representative point memory, □ is the position of the representative point,
A circle indicates the position of the detection area, and a triangle indicates the position of the representative point of the previous field.

By the way, conventionally, the start point and the representative point of the detection area are also controlled as the same line (same address) in each field. Therefore, as shown in FIG. 11, in the odd field, the detection area for obtaining the correlation position between the representative point 1 (Δ) of the previous field and the image of the current field is 6 lines above the representative point, 6 lines or 7 lines above the representative point in the even field,
There is a problem that the detection range is different in the odd-numbered and even-numbered fields due to the lower five lines.

When vertical interpolation is performed by the vertical interpolation circuit, it is as shown in FIG. In FIG. 12, the dotted line is a line created by interpolation.
Even in the case of this interpolation, the detection area is 2 lines above the representative point and 2.5 lines below the representative point in the odd field, and 3 lines above the representative point and 3 lines below the representative point and 1.
There are 5 lines, and in this case as well, the detection range is different in the odd and even fields.

In order to accurately calculate the motion vector, it is preferable that the detection ranges from the representative point position are the same.

The present invention has been made in view of the above points, and it is an object of the present invention to provide the same detection range in both odd and even fields.

[0013]

A motion vector detection circuit according to the present invention divides an image into a plurality of areas, stores a representative point memory circuit for storing image data of representative points of each area, and image data of a current field. A correlation value calculation circuit that calculates a correlation value at each transition in the detection area with respect to the representative point based on the data from the representative point memory circuit, and a cumulative addition circuit that cumulatively adds the output of this correlation value calculation circuit for each transition. And a minimum value detection circuit that detects a minimum value and a minimum position from the output of the cumulative addition circuit, an average value calculation circuit that calculates the average value of the correlation values, the minimum value detection circuit output, and the average value calculation circuit output In a motion vector detection circuit including a motion vector generation circuit that generates a motion vector of an image based on The representative point memory circuit is controlled such that the representative point memory circuit controls the reading of the data in the detection area so that the detected position of the representative point is changed by one line, or the position of the representative point is changed by one line. It further comprises a control means for controlling the reading of the data of the representative point.

[0014]

According to the present invention, the odd-numbered field and the even-numbered field are used to make the detection position of the detection area different for each line or to change the position of the representative point for each line to make the odd-numbered and even-numbered fields even. The same detection range can be taken in both fields. Therefore, it is possible to provide a motion vector detection circuit that accurately calculates a motion vector.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of a motion vector detection circuit by the representative point matching method according to the embodiment of the present invention.

The digital video signal input to the input terminal 1 is sent to the vertical interpolation circuit 12 after the horizontal pixels have been spread by the horizontal spreading circuit 11. The horizontal spreading circuit 11 is provided in order to reduce the memory capacity of the correlation value accumulation memory circuit 25 described later and to lengthen the transfer time (sampling time) of one pixel to allow a processing time. In this embodiment, sampling is performed at intervals of two pixels, and one pixel is scattered. For example, 14MHz
Is sampled at 7 MHz, data with a 2-pixel interval is output.

As described above, the vertical interpolation circuit 12 corrects the pixel position shift in the vertical direction between the odd and even fields by the interlace system, and the data of the previous line stored in the vertical interpolation memory circuit 13 is used. The data of the current line is added and averaged to be used as interpolation data. After the output from the vertical interpolation circuit 12, there are two series of data from the CCD and interpolated data, but if this is returned to one series, the data of different lines are alternately sent and the sampling time period is also doubled ( 14 MHz), two series are handled as they are in this embodiment. Therefore, the output from the vertical interpolation circuit 12 is the horizontal filter circuit 1
Given to 4, 15. This horizontal filter circuit 1
Reference numerals 4 and 15 are for removing horizontal noise in order to improve the detection accuracy. Then, after that, the data is output to the vertical direction filter circuit 16, and the vertical direction noise is removed by the vertical direction filter circuit 16. The vertical image data of the previous line is stored in the filter memory circuit 17, and the filtering process is performed based on the previous line data and the current line data.

The filtered data is supplied to the representative point memory circuit 18 and the correlation value calculation circuit 24. The representative point memory circuit 18 stores digital data corresponding to the brightness level of each representative point. In the correlation value calculation circuit 24, the absolute value of the difference between the digital data corresponding to the luminance level of the video signal of the current frame and the digital data one field before from the representative point memory circuit 18, that is, the representative point and the representative in the detection area. The luminance correlation with each transition for the point is calculated. This correlation is cumulatively added for each transition for all the representative points in the detection block in the correlation cumulative memory circuit 25 including the correlation value memory and the adder. This cumulative addition is performed for every four detection blocks. The output from the correlation value calculation circuit 24 is supplied to the average value calculation circuit 26, and the average of the correlation values of the respective transitions accumulated in the average value calculation circuit 26 is calculated.

The output of the correlation accumulation memory circuit 25 is supplied to the minimum value detection circuit 27. The minimum value detection circuit 27 detects the position of the one having the smallest correlation value among the plurality of transitions and the minimum value thereof. And the minimum position found,
The minimum value and the average value are supplied to the motion vector generation circuit (not shown) as in the above-mentioned conventional example, and the motion vector generation circuit firstly outputs a total of four motion vectors based on the minimum position for each detection block. To extract. Next, of these motion vectors, those having a minimum value / average value smaller than a predetermined threshold value are removed as having low reliability, and one motion vector is specified from the remaining ones.

In the present invention, in order to improve the motion vector detection accuracy, the detection range from the representative point position is made equal in both odd and even fields. Therefore, the present invention has a configuration in which the representative point position and the detection position can be set by inputting each data such as the position and the interval by the internal control circuit (microcomputer) or the external input.

Then, the horizontal address synchronizing signal and the vertical address synchronizing signal are given from the synchronization generating circuit 20 to the representative point position generating circuit 21 and the detection system position generating circuit 22, and the representative point position generating circuit 21 and the detection system position generating circuit are provided. From 22 to the representative point memory control circuit 19 and the detection system control circuit 23, control pulses for address and read / write of the respective memory circuits 18 and 26 are created. Further, from the detection system position generation circuit 22, the representative point memory control circuit 19
A control pulse is given to obtain the correlation when reading the memory.

These control pulses control the address and read / write of each memory so that the detection range from the representative point position is constant in both odd and even fields.

That is, with the address from the synchronization generating circuit 20 as a reference, a representative point position signal is output from the address to the representative point position data input from the microcomputer. Then, the representative point position signal is determined by the area interval, the block interval, and the representative point number data as described above,
It is generated from the address of the representative point position data described above. This also applies to the detection system position signal.

FIG. 2 is a timing chart showing the relationship between the horizontal synchronizing pulse, the representative point position signal and the detection system position signal. The synchronization pulse is output from the synchronization generation circuit 20, the representative point position signal is output from the representative point position generation circuit 21, and the detection position signal is output from the detection position generation circuit 22. Upon receipt of this output pulse, both the representative point and the detection system, Control circuit 19,
At 23, the address and read / write control pulse of each memory are created. In the vertical direction, the address of each memory and the read / write control pulse are similarly created.

Next, the operation of the present invention will be described with reference to FIGS. As in FIGS. 11 and 12, the numbers 0 to 11 are the number of lines, that is, the address of the representative point memory, □ is the position of the representative point, and ○ is the same as in FIGS. 11 and 12. The position of the detection area, Δ indicates the position of the representative point of the previous field. First, the case where the representative point position is fixed will be described. FIG. 4 shows a case in which interpolation is not performed in the vertical direction, and the representative point position is a fixed number of lines (same address).
In the case of 1, the control is performed so that the detection areas in the even field and the odd field are alternately shifted by one line. That is, as shown in the flow chart of FIG. 3, the microcomputer determines whether or not the current line is an even field (step S1), and if it is an even field, the detection system position is set so that the detection area position is +1 line. The generation circuit 22 is controlled (step S2). If it is not an even field, that is, if it is an odd field, the detection system position generation circuit 22 is controlled so as to output the detection area position as it is (step S3). Then, the above operation is repeated until all the detections are completed (step S4). As a result, as shown in FIG. 4, both even and odd fields have 6 lines above and 6 lines below the representative point.

FIG. 5 shows an embodiment in which there is vertical interpolation. In this embodiment, both even and odd fields have two lines above the representative point and 2.5 lines below the representative point.

Next, a case where the detection area position is fixed will be described. FIG. 7 shows a case where interpolation is not performed in the vertical direction, and the detection area position has a fixed number of lines (same address).
In the case of 1, the control is performed such that the representative point position is alternately shifted by one line in the even field and the odd field. That is, as shown in the flowchart of FIG. 6, the microcomputer determines whether the current line is an even field (step S11), and if it is an even field, the representative point position is output as it is. The generation circuit 21 is controlled (step S12). If it is not an even field, that is, if it is an odd field, the representative point position is -1.
The representative point position generation circuit 21 is controlled so as to line (step S13). Then, the above operation is repeated until all the detections are completed (step S14). As a result, as shown in FIG. 7, there are 6 lines above and 6 lines below the representative point for even and odd fields.

FIG. 8 shows an embodiment in which there is vertical interpolation. In this embodiment, both even and odd fields have two lines above the representative point and 2.5 lines below the representative point.

As described above, in the present invention, the detection position can be freely changed for each field by setting not only the hardware circuit.

[0030]

As described above, according to the present invention, the detection position of the detection area is made to differ by one line by the odd field and the even field, or the position of the representative point is made by one line. By changing it, the same detection range can be taken in both odd and even fields, and the motion vector can be accurately calculated.

[Brief description of drawings]

FIG. 1 is a block diagram of a motion vector detection circuit according to a representative point matching method according to an embodiment of the present invention.

FIG. 2 is a timing chart showing the relationship between a horizontal synchronizing pulse, a representative point position signal, and a detection system position signal.

FIG. 3 is a flowchart showing the operation of the embodiment of the present invention.

FIG. 4 is a schematic diagram showing a relationship between a representative point and a detection area when vertical interpolation is not performed in an embodiment of the present invention.

FIG. 5 is a schematic diagram showing a relationship between a representative point and a detection area when interpolation is performed in a vertical direction in an embodiment of the present invention.

FIG. 6 is a flowchart showing the operation of another embodiment of the present invention.

FIG. 7 is a schematic diagram showing the relationship between representative points and detection areas when vertical interpolation is not performed in another embodiment of the present invention.

FIG. 8 is a schematic diagram showing a relationship between a representative point and a detection area in the case where interpolation is performed in the vertical direction in another embodiment of the present invention.

FIG. 9 is a schematic diagram showing an imaging area in the representative point matching method.

FIG. 10 is a block diagram of a motion vector detection circuit according to a conventional representative point matching method.

FIG. 11 is a schematic diagram showing a relationship between a representative point and a detection area when conventional vertical interpolation is not performed.

FIG. 5 is a schematic diagram showing a relationship between a representative point and a detection area in the case of performing vertical interpolation in the related art.

[Explanation of symbols]

 18 representative point memory circuit 19 representative point memory control circuit 20 synchronization generation circuit 21 representative point position generation circuit 22 detection system position generation circuit 23 detection system control circuit 24 correlation calculation circuit 25 correlation cumulative memory circuit 26 average value calculation circuit 27 minimum value detection circuit

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] July 3, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction content]

This representative point matching method will be described. Figure 9
Indicates an image pickup area, and four detection blocks are provided in this image pickup area. Furthermore, each detection block has 3
It is divided into 0 detection areas. A plurality of sampling points exist in the detection area, and one of them is set as the representative point.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction content]

By the way, conventionally, the start point and the representative point of the detection area are also controlled as the same line (same address) in each field. Therefore, as shown in FIG. 11, the detection area for obtaining the correlation position between the representative point position (Δ) of the previous field and the image of the current field is 6 lines above the representative point in the odd field, 6 lines or 7 lines above the representative point in the even field,
There is a problem that the detection range is different in the odd-numbered and even-numbered fields due to the lower five lines.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0016

[Correction method] Change

[Correction content]

The digital video signal input to the input terminal 1 is sent to the vertical interpolation circuit 12 after the horizontal pixels are spread by the horizontal spreading circuit 11. The horizontal spreading circuit 11 is provided in order to reduce the memory capacity of the correlation value accumulation memory circuit 25 described later and to lengthen the transfer time (sampling time) of one pixel to allow a processing time. In this embodiment, sampling is performed at intervals of two pixels, and one pixel is scattered. For example, 14 MH
By sampling z at 7 MHz, data with a 2-pixel interval is output.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction content]

As described above, the vertical interpolation circuit 12 corrects the vertical pixel position shift between the odd and even fields by the interlace method, and the data of the previous line stored in the vertical interpolation memory circuit 13 is corrected. The data of the current line is added and averaged to be used as interpolation data. After the output from the vertical interpolation circuit 12, there are two series of data from the CCD and the interpolated data, but if this is returned to one series, the data of different lines are alternately sent and the sampling time is also doubled (14 MHz). Therefore, in this embodiment, two series are handled as they are. Therefore, the output from the vertical interpolation circuit 12 is the horizontal direction filter circuits 14 and 1.
Given to 5. The horizontal filter circuits 14 and 15
Is to remove horizontal noise in order to improve detection accuracy. Then, after that, the data is output to the vertical direction filter circuit 16,
Removes vertical noise. The vertical image data of the previous line is stored in the filter memory circuit 17,
Filtering processing is performed based on the data of the previous line and the data of the current line.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

Then, the horizontal address synchronizing signal and the vertical address synchronizing signal are given from the synchronization generating circuit 20 to the representative point position generating circuit 21 and the detection system position generating circuit 22, and the representative point position generating circuit 21 and the detection system position generating circuit are provided. From 22 to the representative point memory control circuit 19 and the detection system control circuit 23, control pulses for address and read / write of the respective memory circuits 18 and 25 are created. Further, from the detection system position generation circuit 22, the representative point memory control circuit 19
A control pulse is given to obtain the correlation when reading the memory.

[Procedure correction 6]

[Document name to be amended] Statement

[Name of item to be corrected] 0025

[Correction method] Change

[Correction content]

Next, the operation of the present invention will be described with reference to FIGS. As in FIGS. 11 and 12, the numbers 0 to 11 are the number of lines, that is, the address of the representative point memory, □ is the position of the representative point, and ○ is the same as in FIGS. 11 and 12. Indicates the position of the detection area, and Δ indicates the position of the representative point of the previous field. First, the case where the representative point position is fixed will be described. FIG. 4 shows a case where interpolation is not performed in the vertical direction, and when the representative point position is a fixed number of lines (same address), the detection area is alternately shifted by one line in the even field and odd field. To do. That is, as shown in the flow chart of FIG. 3, the microcomputer determines whether or not the current line is an even field (step S1). If it is an even field, the detection system position is set so that the detection area position is +1 line. Generation circuit 2
2 is controlled (step S2). If it is not an even field, that is, if it is an odd field, the detection system position generation circuit 22 is controlled so as to output the detection area position as it is (step S3). Then, the above operation is repeated until all the detections are completed (step S4). As a result, as shown in FIG. 4, both even and odd fields have 6 lines above and 6 lines below the representative point. ─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] August 20, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction content]

The representative point matching method will be described. Figure 9
Indicates an image pickup area, and four detection blocks are provided in this image pickup area. Furthermore, each detection block has 3
It is divided into 0 detection areas. A plurality of sampling points exist in the detection area, and one of them is set as the representative point.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction content]

By the way, conventionally, the start point and the representative point of the detection area are also controlled as the same line (same address) in each field. Therefore, as shown in FIG. 11, the detection area for obtaining the correlation position between the representative point position (Δ) of the previous field and the image of the current field is 6 lines above the representative point in the odd field, 6 lines or 7 lines above the representative point in the even field,
There is a problem that the detection range is different in the odd-numbered and even-numbered fields due to the lower five lines.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0016

[Correction method] Change

[Correction content]

The digital video signal input to the input terminal 1 is sent to the vertical interpolation circuit 12 after the horizontal pixels have been spread by the horizontal spreading circuit 11. The horizontal spreading circuit 11 is provided in order to reduce the memory capacity of the correlation value accumulation memory circuit 25 described later and to lengthen the transfer time (sampling time) of one pixel to allow a processing time. In this embodiment, sampling is performed at intervals of two pixels, and one pixel is scattered. For example, 14 MH
By sampling z at 7 MHz, data with a 2-pixel interval is output.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction content]

As described above, the vertical interpolation circuit 12 corrects the pixel position shift in the vertical direction between the odd and even fields by the interlace system, and the data of the previous line stored in the vertical interpolation memory circuit 13 is used. The data of the current line is added and averaged to be used as interpolation data. After the output from the vertical interpolation circuit 12, there are two series of data from the CCD and the interpolated data, but if this is returned to one series, the data of different lines are alternately sent and the sampling time is also doubled (14 MHz). Therefore, in this embodiment, two series are handled as they are. Therefore, the output from the vertical interpolation circuit 12 is the horizontal direction filter circuits 14 and 1.
Given to 5. The horizontal filter circuits 14 and 15
Is to remove horizontal noise in order to improve detection accuracy. Then, after that, the data is output to the vertical direction filter circuit 16,
Removes vertical noise. The vertical image data of the previous line is stored in the filter memory circuit 17,
Filtering processing is performed based on the data of the previous line and the data of the current line.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

Then, the horizontal address synchronizing signal and the vertical address synchronizing signal are given from the synchronization generating circuit 20 to the representative point position generating circuit 21 and the detection system position generating circuit 22, and the representative point position generating circuit 21 and the detection system position generating circuit are provided. From 22 to the representative point memory control circuit 19 and the detection system control circuit 23, control pulses for address and read / write of the respective memory circuits 18 and 25 are created. Further, from the detection system position generation circuit 22, the representative point memory control circuit 19
A control pulse is given to obtain the correlation when reading the memory.

[Procedure correction 6]

[Document name to be amended] Statement

[Name of item to be corrected] 0025

[Correction method] Change

[Correction content]

Next, the operation of the present invention will be described with reference to FIGS. As in FIGS. 11 and 12, the numbers 0 to 11 are the number of lines, that is, the address of the representative point memory, □ is the position of the representative point, and ○ is the same as in FIGS. 11 and 12. Indicates the position of the detection area, and Δ indicates the position of the representative point of the previous field. First, the case where the representative point position is fixed will be described. FIG. 4 shows a case where interpolation is not performed in the vertical direction, and when the representative point position is a fixed number of lines (same address), the detection area is alternately shifted by one line in the even field and odd field. To do. That is, as shown in the flow chart of FIG. 3, the microcomputer determines whether or not the current line is an even field (step S1), and if it is an even field, the detection system position is set so that the detection area position is +1 line. Generation circuit 2
2 is controlled (step S2). If it is not an even field, that is, if it is an odd field, the detection system position generation circuit 22 is controlled so as to output the detection area position as it is (step S3). Then, the above operation is repeated until all the detections are completed (step S4). As a result, as shown in FIG. 4, both even and odd fields have 6 lines above and 6 lines below the representative point. ─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] December 7, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 is a block diagram of a motion vector detection circuit according to a representative point matching method according to an embodiment of the present invention.

FIG. 2 is a timing chart showing the relationship between a horizontal synchronizing pulse, a representative point position signal, and a detection system position signal.

FIG. 3 is a flowchart showing the operation of the embodiment of the present invention.

FIG. 4 is a schematic diagram showing a relationship between a representative point and a detection area when vertical interpolation is not performed in an embodiment of the present invention.

FIG. 5 is a schematic diagram showing a relationship between a representative point and a detection area when interpolation is performed in a vertical direction in an embodiment of the present invention.

FIG. 6 is a flowchart showing the operation of another embodiment of the present invention.

FIG. 7 is a schematic diagram showing the relationship between representative points and detection areas when vertical interpolation is not performed in another embodiment of the present invention.

FIG. 8 is a schematic diagram showing a relationship between a representative point and a detection area in the case where interpolation is performed in the vertical direction in another embodiment of the present invention.

FIG. 9 is a schematic diagram showing an imaging area in the representative point matching method.

FIG. 10 is a block diagram of a motion vector detection circuit according to a conventional representative point matching method.

FIG. 11 is a schematic diagram showing a relationship between a representative point and a detection area when conventional vertical interpolation is not performed.

FIG. 12 is a schematic diagram showing a relationship between a representative point and a detection area in a case where conventional vertical interpolation is performed.

[Description of Reference Signs] 18 representative point memory circuit 19 representative point memory control circuit 20 synchronization generation circuit 21 representative point position generation circuit 22 detection system position generation circuit 23 detection system control circuit 24 correlation calculation circuit 25 correlation accumulation memory circuit 26 average value calculation Circuit 27 Minimum value detection circuit

Claims (2)

[Claims] 1. A representative point memory for dividing an image into a plurality of areas and storing image data of representative points of each area, and image data of the current field and data from the representative point memory circuit for the representative points. A correlation value calculation circuit that calculates a correlation value at each transition in the detection area, a cumulative addition circuit that cumulatively adds the correlation value calculation circuit output for each transition, and a minimum value and a minimum position from the cumulative addition circuit output. A minimum value detecting circuit for detecting, an average value calculating circuit for calculating an average value of the correlation values, a motion vector generating circuit for generating an image motion vector based on the minimum value detecting circuit output and the average value calculating circuit output In a motion vector detection circuit including: a representative vector so that the detection position of the detection area differs by one line depending on an odd field and an even field. Motion vector detecting circuit comprising a control means for controlling reading of data of the detected area from the memory circuit. 2. A representative point memory circuit that divides an image into a plurality of areas and stores image data of representative points of each area, and the representative point by image data of the current field and data from the representative point memory circuit. A correlation value calculation circuit for calculating a correlation value at each transition in the detection area, a cumulative addition circuit for cumulatively adding the correlation value calculation circuit output for each transition, and a minimum value and a minimum position from the cumulative addition circuit output. A minimum value detection circuit, an average value calculation circuit that calculates an average value of the correlation values, and a motion vector generation circuit that generates a motion vector of an image based on the minimum value detection circuit output and the average value calculation circuit output. In the motion vector detection circuit including, the representative point memory is configured to change the position of the representative point by one line by using an odd field and an even field. Motion vector detecting circuit comprising a control means for controlling reading of data of the representative points from Li circuit.