JPH06102118A - Semiconductor pressure sensor - Google Patents

Abstract

PURPOSE:To obtain a stable semiconductor pressure sensor not generating the fluctuations of an offset value due to a temp. change. CONSTITUTION:The principal parts 19a of the metal wirings 19 connecting the diffusion resistors 15a-15d and electrode pads 7 provided on the insulating layer 14 on a semiconductor diaphragm 1 and also mutually connecting the diffusion resistors are formed on the semiconductor diaphragm 1 in positions away from the peripheral part of the diaphragm 1. The diffusion resistors 15a-15d and metal wiring connection parts 19b are formed so that the width of each of them is made smaller than that of each of the diffusion resistors 15a-15b in a direction reduced in effect with respect to the stress component in the longitudinal direction of the diffusion resistors 15a-15d.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor pressure sensor for measuring the pressure of a high temperature atmosphere and a high temperature medium.

[0002]

2. Description of the Related Art FIG. 13 is a plan view showing a conventional semiconductor pressure sensor, and FIG. 14 is a sectional view thereof. In the figure, 1 is a semiconductor diaphragm in which a central portion of a silicon substrate is etched to form a thin portion 1a, 2 is an insulating layer formed on the surface of the semiconductor diaphragm 1, 3 is a polycrystalline silicon layer formed on the insulating layer 2, 4 Is a plurality of diffusion resistors formed by implanting impurities (boron) into a part of the polycrystalline silicon layer 3, 5 is an insulating layer formed on the surface of the polycrystalline silicon layer 3, and 6 is a diffusion through the insulating layer 5. Aluminum wiring connects between the resistor 4 and the electrode pad and between the diffusion resistor 4, and 8 is a wire that connects between the electrode pad 7 and the lead post 9.

Next, the operation will be described. When external pressure acts from the direction of the arrow, the semiconductor diaphragm 1 is deformed according to the magnitude of the pressure, and this deformation causes the diffusion resistance 4 to the aluminum wiring 6, the electrode pad 7, and the wire 8 to be deformed.
The electric signal output to the lead post 9 via the changes, and the pressure is detected by this electric signal.

[0004]

Since the conventional semiconductor pressure sensor is constructed as described above, the aluminum wiring 6 is provided at the portion corresponding to the peripheral portion of the semiconductor diaphragm 1.
However, there is a problem that thermal stress due to the aluminum wiring 6 acts on the diffusion resistance 4 due to the temperature change, causing a temperature drift of the offset value. The present invention has been made to solve the above problems,
It is an object of the present invention to obtain a stable semiconductor pressure sensor that does not change the offset value due to temperature changes.

[0005]

According to another aspect of the present invention, there is provided a semiconductor pressure sensor comprising: a diffusion resistance provided on an insulating layer on a semiconductor diaphragm; electrode pads; and metal wiring for connecting the diffusion resistances. Among them, the main part is formed at a position apart from the peripheral part of the semiconductor diaphragm.

According to a second aspect of the present invention, there is provided a semiconductor pressure sensor comprising: a diffusion resistance provided on an insulating layer on a semiconductor diaphragm; and a metal wiring connecting between the electrode pads and between the diffusion resistances. The width of the diffusion resistance and the metal wiring connection portion is formed narrower than the width of the diffusion resistance.

According to a third aspect of the present invention, there is provided a semiconductor pressure sensor in which a diffusion resistance provided on an insulating layer on a semiconductor diaphragm and metal wirings connecting the electrode pads and the diffusion resistances are connected to each other. The diffusion resistance and the metal wiring connecting portion are formed in a direction in which the stress component in the longitudinal direction of the diffusion resistance is less affected.

Further, in the semiconductor pressure sensor according to the present invention as defined in claim 4, the single crystal silicon layer is removed by etching after leaving a portion which becomes diffusion resistance and diffusion lead on the insulating layer on the semiconductor diaphragm. Impurities are injected into the remaining portion to form diffusion resistance, the amount of injected impurities is changed to form diffusion leads, and metal wiring is formed to connect between the diffusion leads and the electrode pads and between the diffusion leads. .

[0009]

In the semiconductor pressure sensor according to the first aspect of the present invention, the main portion of the metal wiring region is formed at a position distant from the peripheral portion of the semiconductor diaphragm, whereby the thermal stress due to the metal wiring is relaxed even in a high temperature atmosphere, and the temperature drift is reduced. Can be made.

Further, in the semiconductor pressure sensor according to the second aspect, the width of the metal wiring connecting portion with the diffusion resistance is made narrower than the width of the diffusion resistance, whereby the thermal stress due to the metal wiring is alleviated even in a high temperature atmosphere. The temperature drift can be reduced.

Further, in the semiconductor pressure sensor according to a third aspect of the present invention, the diffusion resistance is formed even in a high temperature atmosphere by forming the metal wiring connecting portion with the diffusion resistance in a direction in which the stress component in the longitudinal direction of the diffusion resistance is less affected. The influence of thermal stress due to the metal wiring in the longitudinal direction of the is reduced, and the temperature drift can be reduced.

According to another aspect of the semiconductor pressure sensor of the present invention, a diffusion resistance and a diffusion lead are formed on an insulating layer on a semiconductor diaphragm, and a metal wiring for connecting between the diffusion lead and the electrode pad and between the diffusion leads. By forming, the dissimilar metal portion does not exist in the vicinity of the semiconductor diaphragm portion, so that the thermal stress can be relaxed even in a high temperature atmosphere, and the temperature drift can be reduced.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. The same parts as those in FIG. 13 and FIG. 14 are designated by the same reference numerals and their duplicate description is omitted. 14 in FIGS. 1 and 2.
Is an insulating layer formed on the surface of the semiconductor diaphragm 1, 15
a to 15d are diffusion resistors provided on the insulating layer 14, 18 is an insulating layer covering the diffusion resistors 15a to 15d, and 19 is an insulating layer 18.
A metal wiring that penetrates through the wiring to connect the diffusion resistances 15a to 15d and the electrode pad 7 and connects the diffusion resistances 15a to 15d to each other to form a bridge structure. 19a is a portion of the metal wiring 19 near the electrode pad 7. A main portion, 19b is a connecting portion from the main portion of the metal wiring to the diffusion resistors 15a to 15d, and 20 is a surface protective layer formed on the metal wiring.

The metal wiring main portion 19a is provided at a position apart from the portion corresponding to the peripheral portion of the semiconductor diaphragm 1. The metal wiring connection portion 19b is formed between the metal wiring main portion 19a and the diffusion resistors 15a to 15d with a width narrower than that of the metal wiring main portion 19a.

Next, the operation of the above embodiment will be described.
When the semiconductor diaphragm 1 is deformed by receiving pressure from the outside in the direction of the arrow, the electric signals from the diffusion resistors 15a to 15d connected to the bridge structure also change due to this deformation,
The pressure can be detected by this fluctuation.

An example of a method of manufacturing the semiconductor pressure sensor of the invention according to claim 1 will be described below with reference to FIGS.
An underlying oxide layer (SiO ₂ ) 12 having a thickness of 50 nm is formed on an N-type silicon (Si) substrate 11 (ST-1), and a nitride film (Si ₃ N ₄ ) 13 having a thickness of 80 nm is formed on the underlying oxide layer. Are deposited (ST-2).

Except for the portion corresponding to the seed portion 11a,
Nitride film layer 13, underlay oxide film 12, N-type silicon substrate 11
Are sequentially removed by etching (ST-3 to ST-5). In this case, the etching amount H1 of the N-type silicon substrate 11 is 3
It is about 50 nm.

After removing the remaining resist 21 on the nitride film 13 (ST-6), an oxide layer 14 having a thickness T = 1.1 μm is formed on the N-type silicon substrate 1 by thermal oxidation. (ST-7), the remaining underlying oxide layer 12 is removed, and the oxide layer 14 is removed by etching by about 0.1 μm to planarize the surface (ST-8, ST-9).

Thereafter, a polysilicon layer 15 is deposited to a thickness of 600 nm on the oxide layer 14 (ST-10), and a nitride film 16 is deposited thereon to a thickness of 50 nm (ST-1).
1) Then, the resist 22 is removed by etching so that the nitride film 16 remains in a stripe shape to form an antireflection layer 17 (ST-12, ST-13).

Then, a laser (argon laser) is irradiated from the upper portion (not shown) to scan and melt the polysilicon layer 15, and then recrystallized into a single crystal (ST-
14). After that, the antireflection layer 17 and the nitride film layer 16 are removed (ST-15).

The recrystallized polysilicon layer 15 is removed together with the resist by etching, leaving a portion which becomes the diffusion resistance (ST-16, ST-17). Impurities (for example, boron) are implanted into the remaining polysilicon layer 15 to form a plurality of diffusion resistors 15a to 15d (ST-18).
As a result, a plurality of diffusion resistors can be formed on the insulating layer, which is an oxide layer, in a state where they are electrically insulated and separated. Thereafter, a high temperature oxide layer is formed on the entire surface of the oxide layer 14 so as to cover the diffusion resistors. 18 is deposited (ST-19).

Next, the high temperature oxide layer 18 in the portion to be the contact is removed by etching together with the resist layer 23 (ST-20), and then the resist layer 23 is removed by etching (ST-21). Thereafter, a metal wiring layer (eg, gold, aluminum, etc.) 19 is formed on the entire surface (ST-22),
The metal wiring layer 19 corresponding to the wiring region main portion 19a of the portion corresponding to the peripheral portion of the semiconductor diaphragm 1 and the wiring region 19b connecting the diffusion resistors 15a to 15d and the wiring region main portion 19a is left, and other portions are left. After the portion and the resist layer 24 are removed by etching (ST-23,
ST-24), a protective layer 20 by glass coating on the entire surface
(ST-25) is applied.

After that, a part of the protective layer 20 is removed by etching to form the electrode pad 7, and the back surface of the N-type silicon substrate 11 is polished to form a wafer having a desired thickness. Au) 25 is formed (ST-2
6). Then, the gold 25 and the resist 26 in the portion to be the diaphragm portion are removed (ST-27, ST-28), and the back surface of the N-type silicon substrate 11 is removed by etching using the remaining gold 25 as a mask to form the semiconductor diaphragm 1. The thin portion 1a is formed (ST-29).

The above ST-3, ST-12, ST-
16, ST-23, ST-27 resist layer 21
24 to 26 are applied at the time of mask alignment (pattern alignment) for etching in the previous stage.
This serves as a mask for etching.

By the above manufacturing method, a plurality of diffusion resistors made of single crystal silicon can be formed on the insulating layer formed on the semiconductor silicon single crystal substrate while being electrically insulated from each other. As a result, the thermal stress is alleviated even in a high temperature environment, and the temperature drift can be reduced to stabilize the operation.

In the above manufacturing method, the diffusion resistance provided on the insulating layer 2 on the semiconductor diaphragm 1 and the electrode pad 7 are used.
Among the metal wirings 19 connecting the diffusion resistances to each other and the diffusion resistances, the width of the metal wiring connection portion 19b with the diffusion resistances is narrower than the width of the diffusion resistances (for example, the diffusion resistance width 1/3 or less) formed.

In the above manufacturing method, among the diffusion resistors provided on the insulating layer on the semiconductor diaphragm, and the metal wirings connecting the electrode pads and the diffusion resistors,
As shown in FIG. 10, the metal wiring connecting portion 19b with the diffused resistor is formed in a direction perpendicular to the longitudinal direction of the diffused resistor.

Alternatively, in the above manufacturing method, when the semiconductor diaphragm 1 is circular, the diffusion resistors 15a to 15d are formed.
11 have a radial direction and a tangential direction, and a metal wiring connecting portion 19b with the diffusion resistance is formed as shown in FIG. The portion 19b is formed in the radial direction, and the diffusion resistance whose longitudinal direction is the radial direction forms the metal wiring connection portion 19b in the tangential direction.

Further, in the above manufacturing method, when impurities are injected into the single crystal silicon to form a diffusion resistance, a high-concentration impurity is injected into the single crystal silicon to form a diffusion lead 28 having a low resistance as shown in FIG. Semiconductor diaphragm 1
Is formed in the vicinity of the peripheral portion of the wiring to form a wiring, and the diffusion lead 28 and the electrode pad 7 are connected by a metal wiring 19 at a position apart from the peripheral portion of the semiconductor diaphragm 1.

[0030]

As described above, according to the first aspect of the present invention, since the main portion of the metal wiring is formed at a position away from the peripheral portion of the semiconductor diaphragm, the thermal stress is relieved even in a high temperature atmosphere, and the temperature drift occurs. Can be reduced.

Further, according to the invention of claim 2, since the width of the metal wiring connecting portion is formed to be narrower than the width of the diffusion resistance, the thermal stress is alleviated even in a high temperature atmosphere, and the temperature drift is reduced. You can

Further, according to the invention of claim 3, since the metal wiring connecting portion is formed in a direction in which the stress component in the longitudinal direction of the diffusion resistance is less affected, the thermal stress is relieved even in a high temperature atmosphere. , Temperature drift can be reduced.

Further, according to the invention of claim 4, a diffusion resistance and a diffusion lead are formed on the insulating layer on the semiconductor diaphragm, and a metal wiring for connecting between the diffusion lead and the electrode pad and between the diffusion leads is formed. By doing so, since the portion of the dissimilar metal does not exist in the vicinity of the semiconductor diaphragm portion, the thermal stress is relieved even in a high temperature atmosphere, and the temperature drift can be reduced.

[0034]

[Brief description of drawings]

FIG. 1 is a plan view showing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 2 is a sectional view showing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1.

FIG. 3 is an explanatory diagram showing a method of manufacturing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 4 is an explanatory view showing a method for manufacturing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 5 is an explanatory view showing a method for manufacturing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 6 is an explanatory view showing a method for manufacturing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 7 is an explanatory diagram showing a method for manufacturing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 8 is an explanatory diagram showing a method for manufacturing a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 1;

FIG. 9 is a plan view of a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 2;

FIG. 10 is a plan view of a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 3;

FIG. 11 is a plan view of a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 3;

FIG. 12 is a plan view of a semiconductor pressure sensor according to an embodiment of the present invention as set forth in claim 4;

FIG. 13 is a plan view showing a conventional semiconductor pressure sensor.

FIG. 14 is a sectional view showing a conventional semiconductor pressure sensor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor diaphragm 11 Silicon substrate 11a Seed part 14 Oxide layer 15 Polysilicon layer 15a-15d Diffusion resistance 16 Nitride film layer 19 Metal wiring 19a Metal wiring main part 19b Metal wiring connection part 20 Glass coat 28 Diffusion lead

Claims (4)

[Claims] 1. A semiconductor diaphragm having a thin-walled central portion, and a polysilicon layer and a nitride film layer are sequentially deposited on an oxide layer provided on the surface of the semiconductor diaphragm, and then laser irradiation is performed to scan the polysilicon layer. A recrystallized silicon layer obtained by melting a silicon layer, and a plurality of diffusion resistances obtained by implanting impurities into the remaining portions after etching and removing the single crystal silicon layer except for the diffusion resistance portion corresponding to the diaphragm. In the semiconductor pressure sensor provided with each of the diffusion resistances, the electrode pad, and the metal wiring connecting the diffusion resistances to each other, the metal wiring main portion is located at a position distant from the diaphragm peripheral portion. And semiconductor pressure sensor. 2. A semiconductor diaphragm having a thin-walled central portion, and a polysilicon layer and a nitride film layer are sequentially deposited on an oxide layer provided on the surface of the semiconductor diaphragm, and then laser irradiation is performed to scan the polysilicon layer. A recrystallized silicon layer obtained by melting a silicon layer, and a plurality of diffusion resistances obtained by implanting impurities into the remaining portions after etching and removing the single crystal silicon layer except for the diffusion resistance portion corresponding to the diaphragm. In the semiconductor pressure sensor provided with each of the diffusion resistances, the electrode pads, and the metal wirings connecting the diffusion resistances to each other, the widths of the diffusion resistances and the metal wiring connection portions are made smaller than the widths of the diffusion resistances. A semiconductor pressure sensor characterized by the above. 3. A semiconductor diaphragm having a thin-walled central portion, and a polysilicon layer and a nitride film layer are sequentially deposited on an oxide layer provided on the surface of the semiconductor diaphragm, and then laser irradiation is performed to scan the polysilicon layer. A recrystallized silicon layer obtained by melting a silicon layer, and a plurality of diffusion resistances obtained by implanting impurities into the remaining portions after etching and removing the single crystal silicon layer except for the diffusion resistance portion corresponding to the diaphragm. In the semiconductor pressure sensor provided with each of the diffusion resistances, the electrode pads, and the metal wirings connecting the diffusion resistances to each other, the diffusion resistances and the metal wiring connection portions include:
A semiconductor pressure sensor, characterized in that it is formed in a direction that has little influence on the stress component in the longitudinal direction of the diffusion resistance. 4. A semiconductor diaphragm having a thin-walled central portion, and a polysilicon layer and a nitride film layer are sequentially deposited on an oxide layer provided on the surface of the semiconductor diaphragm, and then laser irradiation is performed to scan the polysilicon layer. The recrystallized silicon layer obtained by melting the silicon layer and the single crystal silicon layer are removed by etching except for the diffusion resistance portion and the diffusion lead portion. A semiconductor pressure sensor comprising a diffusion lead formed by changing the above, and the diffusion lead, an electrode pad, and a metal wiring connecting the diffusion leads to each other.