JPH0583983B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a double-speed reproduction method of a PCM signal such as a PCM audio signal recorded as a diagonal track on a recording medium by a rotating head.

Background Art and Problems When recording and reproducing information signals, such as audio signals, high-quality recording and reproducing can be achieved by converting the audio signals into PCM.

There are fixed head methods and rotating head methods for converting information signals into PCM and recording and reproducing them on magnetic tape, but the rotating head method is preferred because the relative speed of the head to the tape is faster and the recording density can be easily increased. is advantageous.

In this rotary head system, except for special applications such as those for broadcasting stations, a plurality of rotary heads, for example two, are usually used, and these rotary heads are rotated approximately 360°/2=
At the same time, the magnetic tape is wound around the guide drum in the same angular range (180°), and the two rotating heads alternately wrap each magnetic tape around the guide drum.
Each track is formed to record signals.

When recording PCM audio data using this rotating head method, a signal is generally recorded as one track (hereinafter referred to as one segment) by one diagonal scan of the tape by the rotating head. ) Minutes are used as a unit time, and the analog audio signal is divided into units of time, and processing is performed to complete interleaving and correction codes within this unit time, resulting in PCM data. Record it as a book track. In other words, the interleaving is completed in one segment.

However, when data is completed in units of one segment, it has the advantage of making editing during playback and so-called variable speed playback easier, but on the other hand, playback from one rotating head is not performed well. The disadvantage is that the signal cannot be reproduced satisfactorily when the signal gets old.

In other words, one of the two rotating heads may become clogged, resulting in a fairly long burst error, or there may be variations in the characteristics of the two rotating heads, or even the direction of the rotation axis of the two rotating heads may vary. If the track widths become uneven because the heights of the tracks are different, the signal from one track may not be reproduced at all, or the error correction capability may be exceeded and the error correction may not be possible. or

Even if this happens, it can be corrected in a so-called error correction circuit using an error correction method such as so-called pre-hold, which interpolates using the previous one track's worth of data. Since all data is interpolated using previous data, signal deterioration is inevitable.

If the information signal is a video signal, if the signal of one field is recorded as one track, the signal deterioration will not be noticeable by interpolating as described above since there is a strong image correlation between adjacent fields. If the information signal is an uncorrelated signal such as an audio signal, the signal deterioration becomes relatively noticeable when the above interpolation is performed.

Therefore, when playing back a PCM signal recorded with interleaving complete with multiple segments, even if one segment is lost due to head clogging, etc., when viewed as a unit time signal of the original audio signal, The applicant previously proposed a new recording/reproducing device that prevents the signal for that unit time from being lost at all.

An example of this new recording and reproducing device is an interleave type device that completes two segments.
Let's explain this using an example that records and plays back audio signals using PCM.

FIG. 1 shows an example of a rotary head device in this case, in which there are two rotary magnetic heads.
The two rotating heads 1A and 1B are arranged with an angular spacing of 180°. On the other hand, the magnetic tape 2 is wound along the circumferential surface of the tape guide drum 3 in an angular range, for example, 90°, which is smaller than the 180° angular range. Then, the rotary heads 1A and 1B are rotated at, for example, 2000 rpm in the direction shown by the arrow 5H, and the tape 2 is transferred at a predetermined speed in the direction shown by the arrow 5T. As shown in the figure, diagonal magnetic tracks 4A and 4B are formed to record signals. In this case, PCM audio for the time length of 1/2 revolution is recorded on one magnetic track. In other words, the time is compressed to 1/2 and recorded.

In order to increase the recording density, the width directions of the gaps of the heads 1A and 1B are set in different directions with respect to the direction orthogonal to the scanning direction. In other words, the so-called azimuth angles are made different.

According to the above rotary head device, there occurs a period (in this example, a period corresponding to an angular range of 90°) in which the two rotary heads 1A and 1B do not come into contact with the magnetic tape. PCM using
By adding redundant data such as parity to data, the amount of buffer memory in the recording device can be reduced.

Next, an embodiment of a recording apparatus and a reproducing apparatus thereof according to the present invention using this rotary head device will be described.

FIG. 3 shows an example of the recording system in which an audio signal is recorded as a two-channel signal, a right channel and a left channel.

That is, in FIG. 3, the left channel audio signal S _L is supplied to one input terminal of the switch circuit 13 through the input terminal 11, and the right channel audio signal S _R is supplied to the other input terminal of the switch circuit 13 through the input terminal 12. Supplied to the terminal. This switch circuit 13 is alternately switched by a switching signal SW from a control signal generating circuit 14, and its output is supplied to an A/D converter 15.

The control signal generating circuit 14 generates various control signals as described below in addition to the signal SW based on the master clock signal from the master clock generating circuit 10.

The switching signal SW of the switch circuit 13 has the same frequency as the sampling frequency in the A/D converter, for example, 48 kHz, and is a rectangular wave signal with a duty factor of 50% as shown in FIG. 4A, and as shown in FIG. As shown, the switch circuit 13 is switched so that when this signal SW is at a high level, the left channel audio signal is selected, and when this signal SW is at a low level, the right channel audio signal is selected.

In the A/D converter 15, the left or right 1
Each channel is sampled at a sampling frequency of 48kHz. Control signal generation circuit 1
The signal SP from 4 is this sampling signal, and the left channel and right channel audio signals are each sampled by this signal SP, and this sampled data is converted into, for example, a 16-bit PCM signal per sample.
converted to S ₀ . FIG. 4B shows the output signal S ₀ of this A/D converter, L ₀ , L ₁ , L ₂ . . . indicate one sample each of the audio PCM signal of the left channel, and R ₀ , R ₁ , R _{2 .} . . each indicates one sample of the audio PCM signal of the right channel.

The output signal _S0 of the A/D converter 15 is supplied via a switch circuit 16 to the input terminals of RAMs 17 and 18 for redundant data addition and interleaving processing. The switch circuit 16 is switched every rotation by a signal RSW (FIG. 4E) from the control signal generating circuit 14 which is synchronized with the rotations of the heads 1A and 1B.

Here, phase servo is applied to the rotating heads 1A and 1B in the following manner.

That is, a synchronized signal SS equal to the rotation period of the heads is obtained from the control signal generation circuit 14, and this is supplied to the phase comparator circuit 19, and the pulse generator 20 generates one pulse per rotation of the heads 1A and 1B. A signal PG from the rotary head 1 is supplied to this phase comparator circuit 19 to compare the phases of the two, and the comparison error output is supplied to the motor 21 that rotationally drives the heads 1A and 1B.
A and 1B are controlled to rotate in phase synchronization with the signal Ss. Since the signal RSW has a constant phase relationship with the signal Ss, the phase of the signal RSW is synchronized with the rotational phase of the heads 1A and 1B.

In this case, when the rising and falling points of the signal RSW are taken as phase 0°, the period from 90° to 180°
At HA, head 1A scans tape 2, 270°~
The servo is applied so that the head 1B scans the tape 2 during the period HB of 360° (=0°).

The switch circuit 16 is switched to one output terminal and the other output terminal by the signal RSW.
The period TB for one revolution when RSW is at low level is:
The signal So is supplied to the data input terminal of the RAM 18, and the period TA when the signal RSW is at high level is the signal So.
is supplied to the data input terminal of RAM 17.

On the other hand, from the control signal generation circuit 14
Write control signal RW of RAM17 and 18,
The read control signal RR is obtained and these signals RW
and RR through switch circuits 22 and 23
It is selectively supplied to control terminals of RAMs 17 and 18. Switch circuits 22 and 23 also signal
It is switched by RSW, and like the switch circuit 16, it is in the state shown in the diagram during the period TA, and during the period TA.
In TB, each state can be switched to the opposite state from the state shown in the figure. Therefore, in period TB, the signal
So is written to RAM18 for one rotation period by the write control signal RW, and in the period TA, the signal
So is set to RAM17 by write control signal RW.
will be written for the same period.

In this way, the right channel and left channel audio signal data for one rotation period are alternately written into the RAMs 17 and 18. Here, the output signal So of the A/D converter 15 is divided into unit time lengths equivalent to one track, and these are divided into
D ₁ , D ₂ ... (Fig. 4C), for every two unit time signals, that is, the signals D ₁ , D ₂ , D ₅ ,
D ₆ ... is in the RAM 17, and signals D ₃ , D ₄ , D ₇ , D ₈ ...
... is written to RAM18. Here, the number of samples included in each of the signals D ₁ , D _{2 . .} . per unit time is 1440. That is, as shown in FIG. 4B, it consists of 720 samples of the left channel audio signal from L ₀ to _{L 159} and 720 samples of the right channel audio signal from R ₀ to R ₁₅₉ .
There are 720 samples, for a total of 1440 samples.

In this way, it was written to RAM17 and 18.
For PCM data, heads 1A and 1B are on tape 2.
Parity is generated and added in periods PA and PB of 90° before periods HA and HB, which are opposite to each other. recorded in 2.

In this case, during periods TA and TB, the rotary head 1A,
Two tracks 4A, 4 formed by 1B
B contains two unit time signals [D ₁ , D ₂ ], [D ₃ ,
D ₄ ], [D ₅ , D ₆ ]..., the even numbered data and the odd numbered data are the even numbered data of one unit time signal and the other, as shown in Figure 2. The even-numbered data of the signals of the unit time are the same on one track 4A, and the odd-numbered data of the signal of one unit time is the same as the odd-numbered data of the other signal of the unit time. The correction code is recorded on one track 4B of each track, and the correction code is completed within the signal recorded on each track, that is, one segment of data. In other words, the interleave completes two segments, and the correction code completes one segment.

That is, the output signals of RAMs 17 and 18 are sent to the parity generation addition circuit 2 through the switch circuit 24.
5. The output signal of the parity generation/addition circuit 25 is then returned to the input terminals of the RAMs 17 and 18 via the switch circuit 26.
Switch circuits 24 and 26 are also switched in synchronization with switch circuits 16, 22 and 23 by signal RSW. Then, from the control signal generation circuit 14 to the parity generation addition circuit 25, as shown in FIG.
A control signal CP that is at a high level during periods PA and PB as shown in FIG. This is how it is done. In other words, the data written to RAM17 during period TA is
When TB is reached, switch circuits 23, 24, and 26 are in the opposite state to the state shown in the figure, so RAM1
7 is supplied to a parity generation/addition circuit 25 through a switch circuit 24. In this circuit 25, the signal CP is output during periods PA and PB.
Since is at a high level, an error correction code is generated and added to the input data during this period, and the added data is written into the RAM 17 again via the switch circuit 26.
In this case, during the period PA, for example, even-numbered data 1E of the signal D ₁ and even-numbered data 2E of the signal D ₂ are read out from the RAM 17 and sent to the encoder 2.
5, an error correction code is generated and added to one segment of data consisting of data 1E and 2E, and during period PB, the odd numbered data of signal _D1 , the odd numbered data of signal _D2, 2O
An error correction code is generated and added to one segment of data consisting of.

FIG. 5 shows the code structure of an audio PCM signal recorded as one track, that is, one segment, such as data 1E and 2O, and redundant data such as error correction codes.

In the figure, one vertical column is one block, and block addresses from 0 to 127 are assigned.
128 blocks are arranged horizontally.

Error correction encoding is performed using 8 bits as 1 symbol, so 1 sample data consists of the upper 8 bits.
It is divided into bits and lower 8 bits, which are shown with suffixes A and B, respectively.

A first error correction code C ₁ is applied in the vertical direction of this two-dimensional array, and a second error correction code C ₂ is applied in the horizontal direction. The error correction code C ₁ is a Reed-Solomon code on GF (2 ⁸ ) of (32, 30), and the code sequence is interleaved to complete two blocks.

For example, 32 symbols L _0A , L _0B , L _2A , L _2B , . . . L _290A , L _290B , located at even-numbered addresses in each block address 0 and 1.
L _292A , L _292B , . . . L _580A , L _580B , P ₂₀ , P ₂₁ form one code sequence of error correction code C ₁ .
In addition, 32 symbols R _0A located at odd-numbered addresses in the block of block addresses 0 and 1,
R _0B , ...R _290A , R _290B , ...R _580A , R _580B , P ₁₀ ,
One code sequence of error correction code _C1 is formed by _P11 . The four parity symbols P ₁₀ , P ₁₁ , P ₂₀ , P ₂₁ obtained at this time are the addresses 29 to 29 in the odd-numbered block of block addresses.
32.

Also, 128 blocks are 32 blocks every 4 blocks.
Divided into 32 pieces and extracted from each 4 blocks.
the second error correction code C ₂ by the symbols
A code sequence is formed. This error correction code
C ₂ is a Reed-Solomon code on GF(2 ⁸ ) of 32,24, and the block address is from 0 to 127.
An error correction code C ₂ is generated by 32 symbols located at the same intra-block address of every 4 blocks of 128 blocks (for example, block addresses of 0, 4, 8, . . . 120, 124).
One code sequence is formed.

That is, four blocks of interleaving are performed on the error correction code _C2 , and parity symbols of the error correction code _C2 are located in 32 blocks with block addresses 48 to 79.

In this way, the error correction codes C ₁ and C ₂ are generated in the period PA, and the added data 1E and 2E are read out in the immediately following period HA when the head 1A is in contact with the tape 2, and this data is transferred to the head 1A through the recording processor 27. As shown in FIG. 3, data 1E is recorded in the first half of track 4A, and data 2E is recorded in the second half.

Similarly, data 1O and 2O to which error correction codes C ₁ and C ₂ are added in period PB are head 1 immediately after that.
During the period when B is in contact with tape 2, HB is read out,
This is supplied to the head 1B through the recording processor 27, and as shown in FIG. 3, data 2O is recorded in the first half of the track 4B, and data 1O is recorded in the latter half. The parity symbols for 32 blocks will be recorded in the shaded area 6 at the center of the tracks 4A and 4B.

The same goes for RAM18, and the data stored in this RAM18 during period TB will be stored in the next period.
During periods PA and PB of TA, an error correction code is generated in the parity generation/addition circuit 25, added to the data, and returned to a predetermined address in the RAM 18 to be stored. And the period of period TA
In HA and HB, data D ₃ and
The even-numbered data 3E and 4E and the odd-numbered data 3O and 4O of _D4 are allocated to the first and second half of tracks 4A and 4B and recorded in the same manner as described above (see FIG. 4H).

In this case, data is time-compressed to 1/2 in the process of writing to and reading from RAMs 17 and 18.

In the recording processor 27, a block synchronization signal, segment address data, block address data, etc. are added to one block of data, and a signal that makes the PCM data suitable for recording and reproducing, such as a DC component as low as possible, is added. Processing is also carried out to modulate the signal into such a signal. FIG. 4I shows the structure of one block of data.

The operations of the RAMs 17 and 18 described above are shown in FIGS. 4D and 4E, respectively.

Next, we will explain the reproduction of a PCM audio signal recorded in such a manner that the interleave is completed in two segments and the correction code is completed in one segment.

FIG. 6 shows an example of the reproduction system. Further, FIGS. 7A to 7G are time charts for use in explaining the reproduction system.

During this reproduction, as well as during recording, the heads 1A and 1B are controlled to rotate in synchronization with the signal S _SP of one rotation period from the control signal generating circuit 3. That is, the output signal PG from the pulse generator 20 that generates one pulse per rotation of the motor 21 is supplied to the phase comparison circuit 32, and this signal and the signal S _SP from the control signal generation circuit 30 are phase-compared. , the phase of the motor 21 is controlled by the phase comparison output. In this case, the switching signal RSW _P (FIG. 7C) of the RAMs 40 and 41 (obtained from the control signal generation circuit 30) is at a high level for data processing during reproduction, and the period TC and low level is one rotation. The heads 1A and 1B are controlled to be in contact with the tape 2 during the rotation angle periods HC and HD of 90° shown in the figure, respectively, within the period TD corresponding to one rotation.

That is, a reproduced signal is obtained from the head 1A during the period HC as shown in FIG. 7A, and a reproduced signal is obtained from the head 1B during the period HD as shown in FIG. 7B. The reproduction head outputs thus obtained are supplied to one and the other input terminals of the switch circuit 34 through amplifiers 33A and 33B, respectively. This switch circuit 34 is switched by the head switching signal SH, and during its high level period, it is in the state shown in the figure, that is, it selects the output signal of the amplifier 33A, and during its low level period, it selects the output signal of the amplifier 33B. The state can be switched alternately. The rising and falling points, which are the switching points of the head output switching signal SH, may be at any point as long as the heads 1A and 1B are not in contact with the tape 2.

In this way, a signal is obtained from the switch circuit 34 in which the outputs of the heads 1A and 1B are alternately and consecutively arranged, and this signal is transmitted to the digital signal restoration circuit 34.
5, it is returned to a digital signal of "0" and "1", and is supplied to the RAM write control signal generation circuit 36.

In this circuit 36, a write address for the two RAMs 40 and 41 and a write timing signal _RWP are generated based on address data for each block.

The switch circuit 38 is used to switch between the write period and the error correction period of the RAMs 40 and 41. This is a high level during the periods HC and HD from the control signal generation circuit 30, and the 90° rotation angle after the period HC. 90° after period PC & period HD
Signal WC that becomes low level for a period of rotation angle PD
(D in FIG. 7). In other words,
The switch circuit 38 operates during the high level period of the signal WC.
In HC and HD, there is a low level period on the circuit 36 side.
In the PC and PD, each is switched to the output end side of the error correction circuit 37. The output of this switch circuit 38 is sent to the RAM via the switch circuit 38.
40 and 41 are selectively input.

On the other hand, the write address and write timing signal _RWP from the circuit 36 are selectively supplied to these RAMs 40 and 41 via a switch circuit 42. Also, from the control signal generation circuit 30
A read control signal _RRP for the RAMs 40 and 41 is obtained, and this read control signal _RRP is selectively supplied to the RAMs 40 and 41 by a switch circuit 43. The output signals of the RAMs 40 and 41 are selectively transmitted to the correction circuit 37 by the switch circuit 44.
is supplied to the input terminal of the switch circuit 4.
5 is selectively supplied to a modification circuit 46.
And these switch circuits 39, 42, 43, 4
4 and 45 are switched by the aforementioned switching signal RSW _P.

That is, in this case, the switch circuits 39, 4
2, 43, 44, and 45 are in the state shown in the figure during the period TC when the signal RSW _P is at high level.
During the period TD when RSW _P is at a low level, the state is switched to the opposite state to that shown in the figure.

Therefore, the output signal of the head 1A is written to a predetermined address of the RAM 40 during the periods HC and HD of the period TC according to the write address and write timing signal from the circuit 36. Then, in periods PC and PD after periods HC and HD, respectively, the switch circuit 38 enters a state in which the output of the correction circuit 37 is written into the RAM 40 by the signal WC. At this time, the switch circuit 44 is in a state where the output of the RAM 40 is supplied to the correction circuit 37, and the parity C ₁ and C ₂ are used in the correction circuit 37 to detect and correct errors.
The corrected data is then written to RAM 40 again. Similarly, data is written in the RAM 41 during the periods HC and HD of the period TD, and the data is corrected during the periods PC and PD, and the corrected data is written into the RAM 41 again.

The corrected reproduced data written in the RAMs 40 and 41 is expanded twice by the read control signal from the control signal generating circuit 30 and read out. That is, the switch circuit 43 uses the signal RSW _P to switch the RAM 41 during the period TC.
In the period TD, the RAM is switched to the RAM40 side, so that the RAM that is not in the write state is always in the read state, and in the period TC.
Data is read from the RAM 41 and from the RAM 40 during the period TD.

Note that during recording, 1
By controlling the addresses, the sample data dispersed within the segment is returned to the original array of sample data when read from the RAMs 40 and 41 during playback.
Moreover, the samples of the left channel and the samples of the right channel are alternately continuous.

The read data is selectively switched by the switch circuit 45 to form a continuous signal as shown in FIG. Errors are corrected in this correction circuit 46. For this modification, for example, average value interpolation or pre-hold techniques are used.

The output of this modification circuit 46 is such that data of the left and right channels appear alternately for each sample.
This is returned to an analog signal in the D/A converter 47. This signal returned to an analog signal is supplied to a switch circuit 48, and this switch circuit 48 generates a switching signal SW similar to the switching signal SW during recording.
The left channel audio signal S _L ′ and the right channel audio signal S _R ′ are alternately switched to one output terminal and the other output terminal by SW _P , respectively, to the output terminals 50A and 50B via amplifiers 49A and 49B, respectively. It is something that can be obtained by being recycled.

Time charts of the operating states of the RAMs 40 and 41 during the above reproduction are shown in FIGS. 7E and 7F.

As described above, the audio signals for the two left and right channels are converted into PCM and recorded and reproduced using the interleave method that completes two segments and the correction code method that completes one segment.

By the way, in the above-mentioned recording and reproducing devices, 2x speed playback, 3x speed playback, etc. are used to search for information and find the beginning of a song.
There is a demand for double speed playback such as double speed playback. In the case of the rotary head method, the rotary head is 1 when playing at double speed.
At N times speed, one track is scanned every N-1, such as every other track or every second track.

In this case, if the PCM signal is recorded in a one-segment complete format with interleaving and correction codes, one segment of data can be obtained even if only one track information is obtained every N-1 during N-times speed playback. If this is obtained, the signal for one segment can be completely reproduced.

However, if the PCM signal is recorded with interleaving completed in multiple segments as described above, only one segment of data out of the multiple segments in which the data is completed can be read out during double-speed playback. In the above example, 1
In terms of the time length of the segment, only 1/2 of the data can be obtained. Therefore, the conventional 1
The double-speed playback method for PCM signals recorded in segment-contained format cannot be applied as is.

However, in the case of this interleaving method that completes multiple segments, data for the time length of one segment can only be obtained by half, but data for the time length of two segments can be obtained, so use this. This enables double-speed playback with high performance.

OBJECTS OF THE INVENTION The present invention aims to provide a good double-speed reproduction method for a PCM signal recorded by a rotating head with interleaving completed in multiple segments.

Summary of the Invention The present invention uses a rotating head recording system, and when a PCM signal recorded with interleaved multiple segments is played back at a speed N times the normal playback speed, the original analog output is used as the playback output. When viewed, the interval of a temporally continuous signal is made to be a plurality of time units, and the PCM data is read out at the same clock pitch as during normal playback.

Embodiment As an embodiment of the method of the present invention, a case where a PCM audio signal recorded by the above-mentioned two-segment complete interleave method and one-segment complete correction code method is reproduced at double speed and triple speed will be explained. This will be explained below.

FIG. 8 shows an example of double speed playback.

In this example, the scanning locus at the center position in the width direction of the gap of the rotary head is a straight line connecting the widthwise center of the track and the center position in the longitudinal direction of this track, as shown by the arrow in Figure A. made to intersect. In other words, the rotating head scans only on one track (hereinafter referred to as on-track).
It will be done like this. As a technique for tracking in this manner, for example, a technique is used in which the tracking position is controlled using a control signal recorded and reproduced by a fixed head at one end in the width direction of the tape and a signal indicating the rotational phase of the rotating head. be able to.

In double-speed reproduction of this on-track, the two rotary heads 1A and 1B alternately scan every other track formed by the same rotary head, for example, tracks 4A ₁ , 4A ₂ . . . during recording. Therefore, the head 1A with the same azimuth as at the time of recording will move to tracks 4A ₁ , 4A 3 , 4A ₃ , as shown by solid line arrows in FIG. 8a.
When scanning tracks 4A ₅ . . . , reproduction signals are extracted, but heads 1B with different azimuths scan tracks 4A ₂ , 4A ₄ .
When scanning, the reproduced signal is attenuated due to azimuth loss, and the data cannot be retrieved correctly. Therefore, as shown in FIGS. 8B and 8C, correct signals can be obtained from the rotary head output only from the rotary head 1A.

In this example, the reproduction signals of the heads 1A and 1B are processed in the reproduction system of FIG. 6 in the same manner as described above. That is, the output of the head 1A is determined by the signal RSW _P and the signal WC shown in FIG. 8D and E.
During the period HC during which the head 1A scans the tape 2 by 90 degrees at the beginning of the period TA, the data is stored in the RAM 40 as shown in FIG. are respectively written to RAM 41, and are written to the PC for a subsequent period.
The error will be corrected.

On the other hand, the output of the head 1B is similarly written to the RAM 40 or 41 during the 90° rotation period HD when the head 1B scans the tape 2, and the error is corrected during the subsequent period PD. Since the head 1B cannot be reproduced correctly, a flag is set for all samples of the output of this head 1B to indicate that they are errors.

In the first half of periods TB and TA, signals for one unit of time earlier are read out from the RAMs 40 and 41, and in the latter half, signals for one unit of time later are read out. , among the data for each one unit time, only the even-numbered data is correct, and the odd-numbered data is erroneous and an error flag is set.

When these signals are supplied to the error correction circuit 46, even-numbered data 1E, which is correct data,
From 2E . . . , interpolated values 1O', 1O' . . . of odd-numbered data are formed by average value interpolation and pre-hold. Therefore, from the error correction circuit 46,
As shown in FIG. 8H, data D ₁ ', D ₂ ', D ₅ ', D ₆ ' for a unit time which approximates the original data are obtained with a clock pitch equal to the output during normal reproduction.

In this way, from the error correction circuit 46, the temporally continuous signal length when viewed from the original audio signal is 2 units of time, and the data of these 2 units of time is transmitted every 2 units of time. can get. In other words, the playback data is obtained at the same clock pitch as during normal playback, but every 2 units of time,
By thinning out data for 2 units of time, 2
Double speed playback is achieved.

According to this example, the temporally continuous signal length,
In the case of an audio signal, the length of one syllable is two units of time, so the clarity is improved compared to the conventional case where one syllable is one unit of time. Furthermore, the data is obtained at the same pitch as normal playback, making it easier to listen to.

Further, in this case, the rotary head is on-track and the correction code is completed in one segment, so that the correction ability for the output of the rotary head is large.

In addition, in the above example, the playback output of head 1B is
This RAM without reading from RAM40, 41
When reading data from the corresponding addresses of 40 and 41, a specific value such as 1 is used instead of the data.
It is also possible to output data with all 16 bits of the sample being "0" and to set an error flag.

FIG. 9 shows an example of triple speed playback. In this example as well, the rotary heads 1A and 1B are tracked in an on-track state, and the scanning loci at the center position in the width direction of the gap are as shown in FIG. In this case, the head 1A is shown by a solid arrow, and the head 1B is shown by a broken arrow. This tracking control is also performed in the same manner as described above.

In this triple speed reproduction, as is clear from FIG. 9A, the corresponding azimuth tracks of the two rotary heads 1A and 1B can be scanned directly. However, two rotating heads 1A,
Since the tracks scanned by head 1B are every second track 4A ₁ , 4B ₂ , 4A ₄ , 4B _{5 .} . . , the outputs of heads 1A and 1B are obtained in one revolution as shown in FIG. One set of data from heads 1A and 1B is half of the original audio data for 4 units of time, and 2 units of time's worth of data is thinned out between each set of data. There is.

The outputs of the rotary heads 1A and 1B are written and corrected in the RAMs 40 and 41 by the output RSW _P and the signal WC (D and E in FIG. 9) in the same manner as described above (see F and G in the same figure). In this example, when reading, the output of head 1B is not read, but a specific value is output in place of that sample data, and an error flag is set for that sample.

Then, in the same way as for 2x speed playback, the RAM
Among the data read from 40 and 41 as data for one segment time, only the even-numbered data is correct, and as the odd-numbered data, data with a specific value that is incorrect is obtained together with an error flag.

Therefore, from the error correction circuit 46, the head 1
An output with a clock pitch equal to the normal reproduction output obtained by interpolating odd-numbered data with respect to the output of A is obtained.

In this case, the signal obtained from the error correction circuit 46 has a temporally continuous signal length (one syllable) of 2 units of time when viewed from the original audio signal, and the data of these 2 units of time is 4 units of time. You will get it every hour.

It is easy to understand that the same effects as in the case of the above-mentioned double speed reproduction can be obtained in the case of this triple speed reproduction.

Next, Fig. 10 shows another example of double speed playback. In this example, the rotating head is not on track, and the scanning locus at the center position in the width direction of the gap is shown by the arrow in Fig. 10. In this way, the interleaving is performed over two tracks located at mutual boundaries of a plurality of segments (hereinafter referred to as off-tracks). This is equivalent to advancing the rotational phase of the rotary head by 90 degrees with respect to the on-track case shown in FIG.

In double-speed reproduction of this on-track, the two rotary heads 1A and 1B scan as shown by the solid line arrow and the dotted-line arrow, respectively, in FIG. A part of the track will be scanned. Therefore, signals from the corresponding azimuth tracks are obtained from these rotary heads 1A and 1B, as shown in FIGS. 10B and 10C. Furthermore, the output of head 1A and the subsequent output of head 1B provide two segments of data that are interleaved. However, it is two segments every two segments.

Therefore, when the playback outputs of these heads 1A and 1B are processed by the playback system shown in FIG. 6, the process is almost the same as normal playback, although the processing is performed every two segments, as shown in FIGS. 10D to G. The error correction circuit 46 obtains temporally continuous data for two units of time every two segments, as shown in FIG. In this case, the data is not interpolated, but the reproduced outputs of heads 1A and 1B are used, and are obtained at the same clock pitch as in normal reproduction.

In this example as well, one syllable takes two units of time, and the reproduction output can be obtained at the same clock pitch as in normal reproduction, and the same effects as the double-speed and triple-speed reproduction described above can be obtained. Furthermore, in this example, data is not interpolated, so aliasing can be prevented from occurring. Note that when interpolating data, pre-hold (0
Of course, higher-order interpolation processing may be used instead of the average value interpolation (first-order interpolation) or average value interpolation (first-order interpolation).

Note that in the above example, the recording positions of the even-numbered data and the odd-numbered data of the temporally later one segment of the two segments of data written to the RAMs 17 and 18 may be reversed. For example, data 2E is recorded in the first half of track 4B, and data 20 is recorded in the second half of track 4A.

Furthermore, it goes without saying that the present invention can be applied not only to the PCM recording of audio signals but also to the PCM recording of other analog signals.

Furthermore, over two or more N segments, even-numbered data and odd-numbered data of each one segment's worth of data may be allocated to separate segments (tracks). In other words, interleave with N (N is an integer greater than or equal to 2) complete segments.
PCM signals may also be recorded. however,
In this case as well, if the correction code is completed in one segment as described above, there is an effect that the reproduced signal can be reproduced satisfactorily.

Furthermore, in the case of an interleaving method in which two or more segments are completed, if signals for two or more units of time are recorded on one track, a playback signal in which one syllable corresponds to multiple units of time can be obtained. can get.

Effects of the Invention In this invention, when interleaving is recorded with multiple segments completed, the signal obtained during double-speed playback is one in which the interleaving is not completed.
Although only one segment can be obtained, by using the fact that one segment contains signals for multiple units of time of the original signal, using an audio signal as an example, it is possible to obtain a signal output that spans multiple units of time for one syllable. , the clarity of the reproduced signal is improved.

Furthermore, since the clock pitch of the output data is the same as that during normal reproduction, in the case of an audio signal, there is an effect that the reproduced sound is easier to hear.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining an example of a rotary head device used in the present invention, FIG. 2 is a diagram showing its recording track pattern, FIG. 3 is a system diagram of an example of its recording system, and FIGS. FIG. 5 is a diagram showing a time chart for explaining the method, FIG. 6 is a system diagram of an example of the reproduction system, FIG. 7 is a diagram showing a time chart for explaining the method, and FIG. 8 is a diagram showing the method of the present invention. FIG. 9 is a diagram for explaining one example, FIG. 9 is a diagram for explaining another example of the method of this invention, and FIG. 10 is a diagram for explaining still another example of the method of this invention. 1A and 1B are rotating heads, 2 is a tape, 3 is a guide drum, 17, 18, 40 and 41 are
RAM 30 is a control signal generation circuit.

Claims (1)

[Claims] 1. When a signal recorded by one diagonal scan of a rotating head on a recording medium is defined as one segment, PCM of an analog signal divided into units of time equivalent to one segment. The PCM signal is recorded from a recording medium in which interleaving is completed in multiple segments so that one segment is formed by signals of different unit times.
When reproducing a signal at a speed N times faster than normal reproduction, the section where the signal is continuous in time is made to be multiple units of time, and the above-mentioned
A double-speed playback method for PCM signals in which the playback output of PCM data is obtained at the same clock pitch as during normal playback. 2. When two rotary heads are used, the output of one rotary head is discarded and the output of the other rotary head is interpolated to reproduce the PCM output at double speed. Method.