JPH0575098A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0575098A JPH0575098A JP26113291A JP26113291A JPH0575098A JP H0575098 A JPH0575098 A JP H0575098A JP 26113291 A JP26113291 A JP 26113291A JP 26113291 A JP26113291 A JP 26113291A JP H0575098 A JPH0575098 A JP H0575098A
- Authority
- JP
- Japan
- Prior art keywords
- type semiconductor
- conductivity type
- region
- semiconductor device
- reverse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 239000002184 metal Substances 0.000 claims description 10
- 238000001125 extrusion Methods 0.000 abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明の半導体装置の構造に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device of the present invention.
【0002】[0002]
【従来の技術】周知のように、半導体装置の特性改善、
特に、順方向特性、逆方向特性、スイッチング特性につ
いての改善のため、開発が進められ、種々の構造が提案
されている。2. Description of the Related Art As is well known, the characteristics of semiconductor devices are improved,
In particular, in order to improve the forward characteristic, the reverse characteristic, and the switching characteristic, development has been advanced and various structures have been proposed.
【0003】図1に従来の半導体装置についての断面構
造図を示す。図1は本発明者等が特願平3−11534
1「ショットキバリア半導体装置」により発明した構造
であり、1は一導電型半導体領域、例えば、N型シリコ
ン半導体、1′は低抵抗の一導電型半導体領域、例え
ば、N+型シリコン半導体、2は逆導電型半導体領域、
例えば、P+型シリコン半導体、3は一電極金属、4は
オ−ミック電極金属、5はトレンチ溝による凹部、6は
凸部、Aはアノ−ド、Cはカソ−ドである。FIG. 1 shows a sectional structure view of a conventional semiconductor device. FIG. 1 shows that the present inventors have filed Japanese Patent Application No. 3-11534.
1 is a structure invented by "Schottky barrier semiconductor device", 1 is a one-conductivity type semiconductor region, for example, N-type silicon semiconductor, 1'is a low-resistance one-conductivity type semiconductor region, for example, N + -type silicon semiconductor, 2 Is a semiconductor region of opposite conductivity type,
For example, P + type silicon semiconductor, 3 is one electrode metal, 4 is an ohmic electrode metal, 5 is a concave portion by a trench groove, 6 is a convex portion, A is an anode, and C is a cathode.
【0004】前記の特願平3−115341では、一電
極金属3としてショットキバリア接触を形成する公知の
金属を選択し、順方向特性を改善すると共に、逆バイ
(2)アス時には一導電型半導体領域1と一電極金属3
が形成するショットキバリア接触面eから延びる空間電
荷層を逆導電型半導体領域2が形成するPN接合からの
空間電荷層で両側からはさみ込むことにより、ある逆電
圧以上で3方向の空間電荷層が併合し、接触面eにかか
る電界強度Eが低い値におさえられ逆漏れ電流を改善す
る。なお、このような効果は接触面eがショットキバリ
ア接触を形成する場合に限らず、オ−ミック接触であっ
ても同様である。In the above-mentioned Japanese Patent Application No. 3-115341, a well-known metal that forms a Schottky barrier contact is selected as one electrode metal 3 to improve the forward direction characteristics, and at the same time, in the reverse bias (2) ass, one conductivity type semiconductor. Region 1 and one electrode metal 3
By sandwiching the space charge layer extending from the Schottky barrier contact surface e formed by the two sides with the space charge layer from the PN junction formed by the opposite conductivity type semiconductor region 2, the space charge layers in three directions are generated at a certain reverse voltage or more. In combination, the electric field strength E applied to the contact surface e is suppressed to a low value to improve the reverse leakage current. It should be noted that such an effect is not limited to the case where the contact surface e forms a Schottky barrier contact, and is the same when the contact surface e is an ohmic contact.
【0005】しかして、セルサイズCW内における有効
なチャネル幅を決定する相隣る逆導電型半導体領域2の
最近接距離Wとすると、現在の半導体製造技術では、順
電流有効領域比 α=W/CW<0.2〜0.4 程度と
ならざるを得ない。従って、必要とする順電流を決定す
る最近接距離Wを確保するためにはセルサイズCWは極
めて大きくなる。即ち、特性面で優れていても半導体チ
ップの形状が大きくなり、高価な半導体装置となる。However, assuming that the closest distance W between adjacent opposite conductivity type semiconductor regions 2 that determines the effective channel width within the cell size CW, the forward current effective region ratio α = W in the current semiconductor manufacturing technology. /CW<0.2-0.4 is unavoidable. Therefore, the cell size CW becomes extremely large in order to secure the closest distance W that determines the required forward current. That is, the semiconductor chip has a large shape even if it is excellent in characteristics, resulting in an expensive semiconductor device.
【0006】[0006]
【発明の目的】本発明は前記せる従来装置の問題点を解
消し、逆漏れ電流、及び順電圧降下が小さく、高速でか
つ、低損失の半導体装置を順電流有効領域比αの大きな
構造で得ることを目的とする。SUMMARY OF THE INVENTION The present invention solves the problems of the conventional device described above, and provides a semiconductor device having a small reverse leakage current and a small forward voltage drop, a high speed and a low loss with a structure having a large forward current effective area ratio α. The purpose is to get.
【0007】[0007]
【実施例】本発明の実施例を図2の断面構造図に示し、
図1と同一符号は同一部分をあらわす。2aは凸部6の
上部に形成された第1の逆導電型半導体領域、2bは凸
部6の底部及び側部の下方にわたり形成された第2の逆
導電型半導体領域であり、第1の領域2aと第2の領域
2bがはさむ凸部6の側部に一電極金属3によりショッ
トキ又はオ−ミックの接触面e′を形成する。EXAMPLE An example of the present invention is shown in the sectional structure view of FIG.
The same reference numerals as in FIG. 1 represent the same parts. Reference numeral 2a denotes a first reverse-conductivity type semiconductor region formed on the upper portion of the convex portion 6, 2b denotes a second reverse-conductivity type semiconductor region formed below the bottom portion and the side portion of the convex portion 6, A Schottky or ohmic contact surface e ′ is formed by the one electrode metal 3 on the side of the convex portion 6 sandwiched by the region 2a and the second region 2b.
【0008】具体的には、N型シリコン半導体基板にト
レンチ溝を公知の方法で形成し、凹部5及び凸部6を設
けて、第1の逆導電型半導体領域2a、及び第2の逆
(3)導電型半導体領域2bの位置にボロン原子をイオ
ン注入法又は気相拡散法でP+領域として形成する。次
いで、一電極金属3を蒸着法により形成した。Specifically, a trench groove is formed in an N-type silicon semiconductor substrate by a known method, a recess 5 and a protrusion 6 are provided, and a first reverse conductivity type semiconductor region 2a and a second reverse ( 3) Boron atoms are formed as P + regions at the position of the conductive type semiconductor region 2b by the ion implantation method or the vapor phase diffusion method. Then, the one-electrode metal 3 was formed by the vapor deposition method.
【0009】第2の逆導電型半導体領域2bは凸部6の
底部及び側部の一部に及んで形成することが望ましい
が、少なくとも底部の角部に形成する必要がある。The second opposite conductivity type semiconductor region 2b is preferably formed so as to extend to a part of the bottom and side portions of the convex portion 6, but it is necessary to form it at least at a corner portion of the bottom portion.
【0010】各部の形状については、第1の領域2aと
第2の領域2bの最近接距離WL、相隣る第2の領域の各
2b間の最近接距離L、接触面e′から延びる零バイア
ス時の空間電荷層の深さWbi、絶縁破壊時の空間電荷層
WB、第2の領域2bにおけるWbiの位置f点での接線
が接触面e′となす角度θとすると、WL及びLが2Wb
iより小さいか、又は、少なくとも2WB以内であり、θ
を60度≦θ≦180度に形成することが好ましい。こ
のようにして、アノ−ドA及びカソ−ドC間に、第1の
領域2aと、それぞれの第2の領域2bによりはさまれ
た2つの金属と半導体の接触面e′をもつ一導電型半導
体1を基体とする半導体装置を形成する。即ち、図2に
おける凸部6の左右それぞれに、接触面e′をもつ、図
1と同様の動作原理による半導体装置を形成できる。Regarding the shape of each part, the closest distance WL between the first region 2a and the second region 2b, the closest distance L between each 2b of the adjacent second regions, and zero extending from the contact surface e '. If the depth Wbi of the space charge layer at the time of bias, the space charge layer WB at the time of dielectric breakdown, and the angle θ formed by the tangent line at the position f of Wbi in the second region 2b with the contact surface e ', WL and L are 2 Wb
smaller than i or at least within 2 WB, θ
Is preferably formed so that 60 ° ≦ θ ≦ 180 °. Thus, between the anode A and the cathode C, one conductivity having a first region 2a and two metal-semiconductor contact surfaces e'sandwiched by the respective second regions 2b. A semiconductor device having the type semiconductor 1 as a base is formed. That is, it is possible to form a semiconductor device having a contact surface e'on each of the right and left sides of the convex portion 6 in FIG.
【0011】図1の接触面eと図2の接触面e′を同一
面積にすると、図2の本発明構造においては順電流有効
領域比αを図1の従来構造の2倍にできる。When the contact surface e of FIG. 1 and the contact surface e'of FIG. 2 have the same area, the forward current effective area ratio α in the structure of the present invention of FIG. 2 can be doubled as compared with the conventional structure of FIG.
【0012】一導電型半導体表面を凹凸状とするトレン
チ溝の形成においては、複数個の短冊状配列トレンチ溝
により、前記の順電流有効領域比αを2倍とすることが
できるが、図3の平面構造図のように、複数個の島状配
列トレンチ溝の形成により、セルの3次元寸法の工夫に
より、有効領域比αを4倍以上とすることも可能であ
る。In forming a trench groove having an uneven surface of one conductivity type semiconductor, the forward current effective area ratio α can be doubled by a plurality of strip-shaped array trench grooves. It is possible to increase the effective area ratio α to 4 times or more by devising the three-dimensional size of the cell by forming a plurality of island-shaped array trenches as shown in the plan structure diagram.
【0013】以上のごとく、本発明構造は、図1での説
明による逆漏れ電流抑制効果をそ(4)こなうことな
く、接触面e′の拡大、即ち、セル内有効面積の増大が
できる。同一順電流に対し、接触面e′の電流密度を減
少でき、e′がショットキ接触である場合には、その順
電圧降下を低減し得る。又、電流密度を図1の従来構造
と同等とした場合にはチップ寸法を小さくでき、従って
安価な半導体装置を得る。As described above, the structure of the present invention (4) does not impair the reverse leakage current suppressing effect described in FIG. it can. For the same forward current, the current density at the contact surface e'can be reduced, and if e'is a Schottky contact, the forward voltage drop can be reduced. Further, when the current density is made equal to that of the conventional structure shown in FIG. 1, the chip size can be reduced, so that an inexpensive semiconductor device can be obtained.
【0014】又、接触面e′をオ−ミック接触とした場
合は、第1の領域2a及び第2の領域2bの形成にもと
づき一導電型半導体領域内に電子ポテンシアル高さに応
じた電気特性を示し、接触面e′をショットキ接触とし
た場合と同様の順方向、逆方向の整流特性を観測でき
た。When the contact surface e'has an ohmic contact, the electrical characteristics corresponding to the electron potential height in one conductivity type semiconductor region are formed based on the formation of the first region 2a and the second region 2b. The rectification characteristics in the forward and reverse directions similar to those when the contact surface e ′ was Schottky contact were observed.
【0015】図2の断面構造におけるトレンチ溝、即
ち、凹部5の形状は台形、長方形に限定されず、又、第
2の領域2bの形状や各部の距離、寸法関係も実施例に
限定されるものではない。その他の変形、変換、付加等
の変更についても本発明の要旨の範囲で本願権利に包含
される。The shape of the trench groove, that is, the recess 5 in the sectional structure of FIG. 2 is not limited to the trapezoid or the rectangle, and the shape of the second region 2b, the distance between the respective portions, and the dimensional relationship are also limited to those of the embodiment. Not a thing. Other modifications, conversions, changes such as additions are also included in the right of the present application within the scope of the present invention.
【0016】[0016]
【発明の効果】以上、説明したように、順方向特性、逆
方向特性、及びスイッチング特性の優れた半導体装置を
順電流有効領域比を増大した構造で得ることができ、シ
ョットキ又はオ−ミック接触面の電流密度の低減、又は
チップサイズの減少による経済化を達成でき、パワ−用
をはじめ各種の産業機器に利用される半導体装置に適用
し、その効果極めて大なるものである。As described above, a semiconductor device having excellent forward characteristics, reverse characteristics, and switching characteristics can be obtained with a structure having an increased forward current effective area ratio, and Schottky or ohmic contact can be obtained. The current density of the surface can be reduced or the chip size can be reduced to achieve economy, and the present invention can be applied to semiconductor devices used in various industrial equipment such as power applications, and the effect is extremely large.
【図1】従来の半導体装置の断面構造図である。FIG. 1 is a cross-sectional structural diagram of a conventional semiconductor device.
【図2】本発明の実施例を示す断面構造図である。FIG. 2 is a sectional structural view showing an embodiment of the present invention.
【図3】(5)本発明の実施例を示す平面構造図であ
る。FIG. 3 is a plan structure diagram showing (5) an embodiment of the present invention.
1 一導電型半導体領域 1′ 低抵抗の一導電型半導体領域 2 逆導電型半導体領域 2a 第1の逆導電型半導体領域 2b 第2の逆導電型半導体領域 3 一電極金属 4 オ−ミック電極金属 5 凹部 6 凸部 A アノ−ド C カソ−ド e、e′接触面 f 接点 CW セルサイズ W 相隣る2の最近接距離 WL 2aと2b間の最近接距離 Wbi 零バイアス時の空間電荷層の深さ WB 絶縁破壊時の空間電荷層幅 L 相隣る2bの最近接距離 θ 角度 DESCRIPTION OF SYMBOLS 1 1 conductivity type semiconductor area 1'Low resistance 1 conductivity type semiconductor area 2 Reverse conductivity type semiconductor area 2a 1st reverse conductivity type semiconductor area 2b 2nd reverse conductivity type semiconductor area 3 1 electrode metal 4 Ohmic electrode metal 5 concave part 6 convex part A anode C cathode e, e'contact surface f contact CW cell size W closest distance of two adjacent phases WL closest distance between 2a and 2b Wbi space charge layer at zero bias Depth WB Space charge layer width at dielectric breakdown L phase Closest distance between adjacent 2b θ angle
Claims (1)
ンチ溝を形成した半導体装置において、凸部の上部に第
1の逆導電型半導体領域、凸部の底部又は側部の一部を
含む底部に第2の逆導電型半導体領域を形成し、第1と
第2の逆導電型半導体領域がはさむ凸部の少なくとも一
つの側部にショットキ又はオ−ミック接触を形成する金
属層を設けたことを特徴とする半導体装置。1. A semiconductor device in which a trench groove is formed to make a surface of one conductivity type semiconductor uneven, and a first reverse conductivity type semiconductor region is included in an upper portion of the protrusion, and a part of a bottom portion or a side portion of the protrusion is included. A second opposite conductivity type semiconductor region is formed on the bottom, and a metal layer for forming a Schottky or ohmic contact is provided on at least one side of a protrusion sandwiched by the first and second opposite conductivity type semiconductor regions. A semiconductor device characterized by the above.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3261132A JP2826914B2 (en) | 1991-09-12 | 1991-09-12 | Semiconductor device |
US07/870,268 US5262669A (en) | 1991-04-19 | 1992-04-17 | Semiconductor rectifier having high breakdown voltage and high speed operation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3261132A JP2826914B2 (en) | 1991-09-12 | 1991-09-12 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0575098A true JPH0575098A (en) | 1993-03-26 |
JP2826914B2 JP2826914B2 (en) | 1998-11-18 |
Family
ID=17357541
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3261132A Expired - Fee Related JP2826914B2 (en) | 1991-04-19 | 1991-09-12 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2826914B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999052152A1 (en) * | 1998-04-07 | 1999-10-14 | Hitachi, Ltd. | Semiconductor device and power converter |
JP2010206014A (en) * | 2009-03-04 | 2010-09-16 | Nissan Motor Co Ltd | Semiconductor device |
JP2012049562A (en) * | 2011-11-04 | 2012-03-08 | Renesas Electronics Corp | Semiconductor device |
US8928071B2 (en) | 2001-10-26 | 2015-01-06 | Renesas Electronics Corporation | Semiconductor device including a MOSFET and Schottky junction |
JP2015076592A (en) * | 2013-10-11 | 2015-04-20 | 住友電気工業株式会社 | Silicon carbide semiconductor device and manufacturing method of the same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60227476A (en) * | 1984-01-03 | 1985-11-12 | ゼネラル・エレクトリツク・カンパニイ | Inverted mode insulated gate gallium arsenide field effect transistor |
JPS6212169A (en) * | 1985-07-09 | 1987-01-21 | Matsushita Electronics Corp | Semiconductor device |
JP3061342U (en) * | 1999-02-09 | 1999-09-17 | ビッグボーン商事 株式会社 | Handbag with pocket for mobile phone |
-
1991
- 1991-09-12 JP JP3261132A patent/JP2826914B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60227476A (en) * | 1984-01-03 | 1985-11-12 | ゼネラル・エレクトリツク・カンパニイ | Inverted mode insulated gate gallium arsenide field effect transistor |
JPS6212169A (en) * | 1985-07-09 | 1987-01-21 | Matsushita Electronics Corp | Semiconductor device |
JP3061342U (en) * | 1999-02-09 | 1999-09-17 | ビッグボーン商事 株式会社 | Handbag with pocket for mobile phone |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999052152A1 (en) * | 1998-04-07 | 1999-10-14 | Hitachi, Ltd. | Semiconductor device and power converter |
US8928071B2 (en) | 2001-10-26 | 2015-01-06 | Renesas Electronics Corporation | Semiconductor device including a MOSFET and Schottky junction |
US9099550B2 (en) | 2001-10-26 | 2015-08-04 | Renesas Electronics Corporation | Semiconductor device including a MOSFET |
JP2010206014A (en) * | 2009-03-04 | 2010-09-16 | Nissan Motor Co Ltd | Semiconductor device |
JP2012049562A (en) * | 2011-11-04 | 2012-03-08 | Renesas Electronics Corp | Semiconductor device |
JP2015076592A (en) * | 2013-10-11 | 2015-04-20 | 住友電気工業株式会社 | Silicon carbide semiconductor device and manufacturing method of the same |
Also Published As
Publication number | Publication date |
---|---|
JP2826914B2 (en) | 1998-11-18 |
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