JPH0565062B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal input circuit, and more particularly to a signal input circuit formed of a CMOS integrated circuit for inputting signals to an electronic circuit.

[Conventional technology]

Conventionally, in a signal input circuit formed by a CMOS integrated circuit, for example, when inputting a binary power supply voltage (plus V _DD and minus V _SS ) to an electronic circuit, as shown in FIG.
+V _DD and - supplied from 9 and 120
In response to a power input of V _SS , a P-channel transistor 8 and an N-channel transistor 9 are coupled and connected, and +V _DD is output from a terminal 121 via a control signal input from a terminal 118.
Alternatively, an open input circuit in which a binary power supply voltage of -V _SS is input to the electronic circuit, or another example of a signal input circuit is as shown in FIG. and a pull-down input circuit with a pull-down resistor 10 between the terminal 126 and the terminal 12, as shown in FIG. 4b.
A pull-up input circuit, etc. in which a pull-up resistor 13 is provided between the input terminal and the input terminal 7 is generally used. Generally, the configuration of the signal input circuit formed by these CMOS integrated circuits is determined at the time of designing the CMOS integrated circuit.

[Problem that the invention seeks to solve]

The conventional signal input circuit described above is determined to be either an open input circuit or a pull-up input circuit (pull-down input circuit) when designing the CMOS integrated circuit, and no circuit changes are required after the integrated circuit is actually manufactured. It is possible. However, recently, a method has been developed in which pull-up and pull-down resistors are switched when designing a master pattern for the element layout of an integrated circuit, but even with this method, it is difficult to actually change the circuit at the end of integrated circuit manufacturing. It's impossible.

On the other hand, integrated circuits used in microprocessors, which have become particularly popular recently, have a wide variety of uses, so signals connected to input/output terminals that exchange data with other integrated circuits are used. There are a wide variety of types of signals, and it has become necessary to form the configuration of the input terminals in accordance with the types of signals. However, as mentioned above, in conventional signal input circuits formed using CMOS integrated circuits, the circuit configuration is determined at the time of integrated circuit design, so the input signal level etc. often do not match after the fact. In such a case, a buffer for level conversion must be provided outside the integrated circuit, which complicates the configuration of the signal input circuit and increases costs.

[Means for solving problems]

In the signal input circuit of the present invention, a specific resistor is inserted between a junction point between the lanes of the P-channel transistor and the N-channel transistor and a predetermined signal input terminal. an input circuit formed by connecting a predetermined positive power supply and a predetermined negative power supply to the sources of the transistors; and an input circuit formed by connecting predetermined positive power supplies and negative power supplies to the sources of the transistors, and to gates of the P-channel transistors and the N-channel transistors, and a control circuit that sends out a control signal to control on/off of the N-channel transistor.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention. As shown in FIG. 1, this embodiment has resistors 1, P
an input circuit 4 including a channel transistor 2 and an N-channel transistor 3; and a control circuit 5.
It is equipped with.

In FIG. 1, P-channel transistor 2
The source and substrate of , and the source and substrate of N-channel transistor 3 are individually connected, and the drain of P-channel transistor 2 and the drain of N-channel transistor 3 are connected, and the source and substrate of N-channel transistor 3 are connected to each other. - The source of transistor 2 and the source of N-channel transistor 3 are supplied with a positive power source and a negative power source via terminals 102 and 103, respectively. Furthermore, a resistor 1 is inserted in series between the terminal 101 forming the signal input terminal and the junction of the drain of the P-channel transistor 2 and the drain of the N-channel transistor 3.
The output terminal of the control circuit 5 is commonly connected to the gates of the transistor 2 and the N-channel transistor 3. Note that the signal inputted from the terminal 101 is configured to be transmitted as is to the inside of a predetermined electronic circuit via the terminal 105.

Now, when the control signal from the control circuit 5 is at H level, the N-channel transistor 3 is turned on and the P-channel transistor 2 is kept off, so the terminal 101 is a pull-down input. Operates as a terminal. That is, when the external signal inputted through the terminal 101 is at the L level, the potentials at both ends of the resistor 1 are at almost the same level, so almost no current flows, and only when the external signal goes to the H level. Terminal 101
A current flows into the negative power supply via the resistor 1.

Conversely, when the control signal from the control circuit 5 is at L level, the P-channel transistor 2 is on and the N-channel transistor 3 is off, so the terminal 101 operates as a pull-up input terminal. . Therefore, through the action of the control circuit 5 that controls on/off of the P channel transistor 2 and the N channel transistor 3,
The signal input circuit of this embodiment can be used as a signal input circuit for both a pull-up input circuit and a pull-down input circuit.

Next, other embodiments of the present invention will be described.

FIG. 2 is a circuit diagram of another embodiment of the present invention.
As shown in FIG. 2, in this embodiment, resistors 1,
P-channel transistor 2 and N-channel transistor
An input circuit 4-1 including a transistor 3, and an input circuit 4-2 including a circuit configuration similar to that of the input circuit 4-1.
~4, the control circuit 6, and the ROM (Read Only
Memory) 7. Input circuit 4-1
, the source of P-channel transistor 2 is grounded, and the source of N-channel transistor 3 is supplied with a negative power supply via terminal 109. This also applies to the other input circuits 4-2 to 4-4. The operation of the input circuits 4-1 to 4-4 is as follows.
It is similar to the input circuit 4 shown in FIG. 1, and has external signal input terminals 105, 106,
107 and 108 are provided, and each terminal is determined to be either a pull-up input terminal or a pull-down input terminal according to a control signal sent from the control circuit 6.

Several methods can be considered for controlling via the control circuit 6, but for example, if a control signal input from the outside to the control circuit 6 via terminals 117 and 118 is decoded in the control circuit 6. , when the number of inputs is n (positive integer), it is possible to select the configuration of the signal input terminal as either a pull-up input terminal or a pull-down input terminal in 2 ⁿ combinations. Furthermore, it is also possible to control the configuration of the signal input terminals via the control circuit 6 by utilizing a part of the ROM 7 provided in advance inside the integrated circuit.

〔Effect of the invention〕

As explained above, the present invention can control whether a pull-up input circuit or a pull-down input circuit is controlled by controlling the on/off of the P-channel transistor and the N-channel transistor forming the input circuit via a predetermined control signal. This has the advantage that it is possible to provide a highly flexible signal input circuit that can be switched and used.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention, FIG. 2 is a circuit diagram of another embodiment of the present invention, and FIGS. 3 and 4 a and b are respectively a diagram of a conventional signal input circuit. It is a circuit diagram. In the figure, 1...resistance, 2, 8, 11, 14...
...P channel transistor, 3,9,12,1
5...N channel transistor, 4,4-1~
4...Input circuit, 5, 6...Control circuit, 7...
MOR, 10...Pull-down resistance, 13...Pull-down resistance.

Claims (1)

[Claims] 1. A specific resistor is inserted between the junction between the lanes of the P-channel transistor and the N-channel transistor and a predetermined signal input terminal, and the resistor is connected to the source of the P-channel transistor and the N-channel transistor, respectively. An input circuit formed by connecting a predetermined positive power supply and a negative power supply, and respective gates of the P-channel transistor and the N-channel transistor, are connected to turn on the P-channel transistor and the N-channel transistor. 1. A signal input circuit comprising: a control circuit that sends a control signal for controlling /off.