JPH0563134A - Lead frame for semiconductor device - Google Patents
Lead frame for semiconductor deviceInfo
- Publication number
- JPH0563134A JPH0563134A JP22193991A JP22193991A JPH0563134A JP H0563134 A JPH0563134 A JP H0563134A JP 22193991 A JP22193991 A JP 22193991A JP 22193991 A JP22193991 A JP 22193991A JP H0563134 A JPH0563134 A JP H0563134A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- inner lead
- bonding
- flat width
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置用リードフ
レーム（以下、リードフレームと略す）に関し、特にイ
ンナーリード先端の断面形状に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a semiconductor device (hereinafter abbreviated as a lead frame), and more particularly to a cross-sectional shape of a tip of an inner lead.
【０００２】[0002]
【従来の技術】従来のリードフレーム、特にエッチング
加工で製造したリードフレームにおいては、多ピン小ペ
レット化になると図３で示した様に、インナーリード２
の長さが長くなり、ファインピッチになる。よってリー
ドフレームの加工が難しくなり、インナーリード２の先
端の表面平坦幅４を広くする為に、インナーリード２先
端の裏面平坦幅５が狭くなっている。2. Description of the Related Art In a conventional lead frame, in particular, a lead frame manufactured by an etching process, the inner lead 2 is formed as shown in FIG.
The length becomes longer and the pitch becomes finer. Therefore, the processing of the lead frame becomes difficult, and the back surface flat width 5 at the tip of the inner lead 2 is narrowed in order to widen the surface flat width 4 at the tip of the inner lead 2.
【０００３】[0003]
【発明が解決しようとする課題】この従来のリードフレ
ーム、特にエッチング加工した多ピンリードフレームで
は、インナーリード先端の表面平坦幅を広く確保する
為、インナーリードの裏面平坦幅を狭くした逆台形の断
面形状になっている。よってリード側にボンディングを
行う時、インナーリードが不安定の為にボンディングの
圧力により、リードが傾きボンディング接着不良を起こ
すという問題点があった。In this conventional lead frame, in particular, a multi-pin lead frame that has been etched, in order to secure a wide surface flat width at the tip of the inner lead, an inverted trapezoidal shape in which the back flat width of the inner lead is narrowed is used. It has a cross-sectional shape. Therefore, when performing bonding on the lead side, there is a problem that the lead is inclined due to the pressure of the bonding due to the instability of the inner lead, resulting in defective bonding adhesion.
【０００４】本発明の目的は、リード側にボンディング
を行う時、インナーリードが不安定のためにボンディン
グの圧力や振動によって生ずるリードの傾きを低減し、
ボンディング接着不良を低減できる半導体装置用リード
フレームを提供することにある。An object of the present invention is to reduce the inclination of the lead caused by pressure and vibration of the bonding due to instability of the inner lead when performing bonding on the lead side.
An object of the present invention is to provide a lead frame for a semiconductor device that can reduce defective bonding and bonding.
【０００５】[0005]
【課題を解決するための手段】本発明のリードフレーム
は、ボンディングを行う箇所以外のインナーリードに表
面の平坦幅より裏面の平坦幅を広くした部分を設け、し
かも、隣りのインナーリードと、その表面の平坦幅より
裏面の平坦幅を広くした部分の位置が合わない様にチド
リにしたインナーリード先端の断面形状を有している。According to the lead frame of the present invention, the inner lead other than the bonding portion is provided with a portion in which the flat width of the back surface is wider than the flat width of the front surface. It has a cross-sectional shape of the tip of the inner lead which is formed as a puddle so that the position of the portion where the flat width of the back surface is wider than the flat width of the front surface does not match.
【０００６】[0006]
【実施例】次に本発明について図面を参照して説明す
る。図１は本発明の一実施例の部分拡大平面図，Ａ−Ａ
1 線およびＢ−Ｂ1 線におけるインナーリード先端の断
面図である。The present invention will be described below with reference to the drawings. FIG. 1 is a partially enlarged plan view of one embodiment of the present invention, AA.
It is sectional drawing of the inner lead front-end | tip in 1 line and BB 1 line.
【０００７】本発明のリードフレームは図１（ｂ），図
１（ｃ）に示したように、ボンディングを行う箇所３以
外のインナーリードに表面の平坦幅４より裏面の平坦幅
５を広くした部分を設け、しかも隣りのインナーリード
とその表面の平坦幅４より裏面の平坦幅５を広くした部
分の位置が合わないようにチドリにしたインナーリード
先端の断面形状を有している。効果としては従来のリー
ドフレーム（図３）と比べて裏面の平坦幅５を広くした
部分を設けている為にインナーリードが安定し、リード
側ボンディング時にインナーリード２が傾いてひきおこ
されるボンディング接着不良が低減する。In the lead frame of the present invention, as shown in FIGS. 1 (b) and 1 (c), the flat width 5 of the back surface is wider than the flat width 4 of the front surface of the inner lead other than the portion 3 where bonding is performed. It has a cross-sectional shape of the inner lead tip that is provided with a portion so that the adjacent inner lead and the portion where the flat width 5 on the back surface is wider than the flat width 4 on the front surface do not align with each other. As an effect, the inner lead is stable because the flat width 5 of the back surface is widened as compared with the conventional lead frame (FIG. 3), and the inner lead 2 is tilted during the lead side bonding and the bonding bonding is caused. Defects are reduced.
【０００８】図２は、本発明の他の実施例の部分拡大平
面図，Ａ−Ａ1 線およびＢ−Ｂ1 線におけるインナーリ
ード先端の断面図である。本実施例は第１の実施例に比
べてインナーリード２先端表面４のボンディングする箇
所３の平坦幅をインナーリード２幅より広くしている
為、リード側のボンディング性が向上するという効果が
ある。FIG. 2 is a partially enlarged plan view of another embodiment of the present invention, which is a sectional view of the tip of the inner lead taken along the line AA 1 and the line BB 1 . Compared to the first embodiment, this embodiment has a flat width of the bonding portion 3 on the tip surface 4 of the inner lead 2 wider than the width of the inner lead 2, so that the bonding property on the lead side is improved. ..
【０００９】[0009]
【発明の効果】以上説明したように本発明は、ボンディ
ングを行う箇所以外のインナーリードに、表面の平坦幅
より裏面の平坦幅を広くした部分を設け、しかも隣りの
インナーリードとその表面の平坦幅より裏面の平坦幅を
広くした部分の位置が合わない様にチドリにしたインナ
ーリード先端の断面形状を有している為に、リード側ボ
ンディング時にボンディングの圧力と振動によって生じ
るリード傾きを低減し、その結果ボンディング接着不良
が低減するという効果を有している。As described above, according to the present invention, the inner lead other than the bonding portion is provided with a portion in which the flat width of the back surface is wider than the flat width of the front surface, and the adjacent inner lead and the surface thereof are flat. Since the cross section of the tip of the inner lead is formed in a puddle so that the position of the flat width of the back surface wider than the width does not match, the lead inclination caused by bonding pressure and vibration during lead side bonding is reduced. As a result, there is an effect that defective bonding adhesion is reduced.
【図１】本発明の一実施例の部分拡大平面図およびＡ−
Ａ1 線並にＢ−Ｂ1 線におけるインナーリード先端の断
面図である。FIG. 1 is a partially enlarged plan view and A- of an embodiment of the present invention.
It is a cross-sectional view of the inner lead tip in B-B 1 line A 1 Sen'nami.
【図２】本発明の他の実施例の部分拡大平面図およびＡ
−Ａ1 線並にＢ−Ｂ1 線におけるインナーリード先端の
断面図である。FIG. 2 is a partially enlarged plan view of another embodiment of the present invention and FIG.
-A is a cross-sectional view of the inner lead tip in B-B 1 line 1 Sen'nami.
【図３】従来の半導体装置用リードフレームの一例の部
分拡大平面図およびＡ−Ａ1 線並にＢ−Ｂ1 線における
インナーリード先端の断面図である。FIG. 3 is a partially enlarged plan view of an example of a conventional lead frame for a semiconductor device and a cross-sectional view of an inner lead tip taken along line AA 1 and line BB 1 .
１ アイランド ２ インナーリード ３ リード側ボンディング部 ４ インナーリード先端の表面平坦幅 ５ インナーリード先端の裏面平坦幅 ６ ワイヤー ７ ペレット 1 island 2 inner lead 3 lead side bonding part 4 surface flat width of inner lead tip 5 back surface flat width of inner lead tip 6 wire 7 pellet
Claims (1)
ボンディングを行う箇所以外のインナーリードに、表面
の平坦幅より裏面の平坦幅を広くした部分を設け、しか
も、隣りのインナーリードと、その表面の平坦幅より裏
面の平坦幅を広くした部分の位置が合わない様にチドリ
にしたインナーリード先端の断面形状を有していること
を特徴とする半導体装置用リードフレーム。1. A lead frame for a semiconductor device,
The inner lead other than the bonding area is provided with a portion where the back side flat width is wider than the front side flat width, and the position of the neighboring inner lead and the portion where the back side flat width is wider than the front side flat width. A lead frame for a semiconductor device, characterized in that it has a cross-sectional shape of a tip of an inner lead that is formed in a puddle so as not to match.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22193991A JPH0563134A (en) | 1991-09-03 | 1991-09-03 | Lead frame for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22193991A JPH0563134A (en) | 1991-09-03 | 1991-09-03 | Lead frame for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0563134A true JPH0563134A (en) | 1993-03-12 |
Family
ID=16774530
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22193991A Pending JPH0563134A (en) | 1991-09-03 | 1991-09-03 | Lead frame for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0563134A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7190065B2 (en) | 2003-06-02 | 2007-03-13 | Seiko Epson Corporation | Circuit substrate, semiconductor module and method of manufacturing circuit substrate |
| JP2008198727A (en) * | 2007-02-09 | 2008-08-28 | Sumitomo Metal Mining Package Materials Co Ltd | Lead frame and its manufacturing method |
| JP2011086811A (en) * | 2009-10-16 | 2011-04-28 | Apic Yamada Corp | Lead frame, substrate for electronic component, and electronic component |
-
1991
- 1991-09-03 JP JP22193991A patent/JPH0563134A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7190065B2 (en) | 2003-06-02 | 2007-03-13 | Seiko Epson Corporation | Circuit substrate, semiconductor module and method of manufacturing circuit substrate |
| JP2008198727A (en) * | 2007-02-09 | 2008-08-28 | Sumitomo Metal Mining Package Materials Co Ltd | Lead frame and its manufacturing method |
| JP2011086811A (en) * | 2009-10-16 | 2011-04-28 | Apic Yamada Corp | Lead frame, substrate for electronic component, and electronic component |
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