JPH0552526B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] A table that converts a key input into the address of a processing unit corresponding to the key is configured in a rewritable memory, and even if the same key is input, different processing units are Regarding the key pointed to, the address of the table is rewritten by the currently executed processing section to the address of the next processing section. This speeds up generation of the processing unit address for the next key input.

[Industrial application field]

The present invention relates to a key processing method that activates different processing units depending on how many times the same key is input.
This attempts to speed up addressing by rewriting the key processing unit address table for each process.

[Conventional technology]

In a word processor, if you want to move the character string displayed as ``Aiu'' to another location as shown in Figure 5a, move the cursor 11 to the position and press the ``Set'' key 12, then move the character string to a different location. Indicate the beginning of the string, then move the cursor 11 to the position and press the "Set" key 12 again to indicate the tail end of the character string to be moved. Thereafter, move the cursor 11 to the destination position and press the "move" key 13. As a result, the character string "Aiu" appears at the destination position as shown in the figure.
moves.

In this case, the first operation of the set key instructs the "start position of the movement range", and the second operation instructs the "end position of the movement range". This is easier than using the set key for specifying the start position and the set key for specifying the end position because the same key can be used, and it is more convenient to operate. However, since they are both the same key,
Correct key input processing cannot be performed unless it is determined how many times the key has been input.

[Problem that the invention seeks to solve]

Generally, a table is used to convert a key input into an address in the memory of its processing unit (program), but since only one address on the table can be given to one key, even if the same key is input, Conventionally, when the meaning is different, as shown in Figure 5c, the input is the first or second time in each key processing section.
It determines whether it is the third time and performs processing according to the determination result.

However, if the program checks the number of key inputs and selects a process according to the number of key inputs, the process inside the key processing section becomes complicated and the processing efficiency decreases.

The present invention eliminates the need for determining the number of key inputs described above by rewriting the key processing unit address table.

[Means for solving problems]

Figure 1 is a basic configuration diagram of the present invention, where 1 and 2 are processing units that are activated when the same key is input for the first and second time, and 3 is a table that converts key input (key No.) into a processing unit address. It is. In the present invention, this table is constructed from a rewritable memory (RAM), and its contents are rewritten by the key processing section at the end of each process.

[Effect]

For example, assuming that key No. a points to the area (table address) in which processing unit address A of table 3 is stored, if address A is changed to A ₁ or A ₂ , then when A = A ₁ , The processing section ₁ whose processing section address is A1 is activated, and when A= _A2 , the processing section 2 whose processing section address is _A2 is activated even if the same key input is performed. Address A in this table
is changed from A ₁ to A ₂ by processing unit 1, and from A ₂ to A ₁ by processing unit 2 (the same key can be pressed up to twice), and so on for the next scheduled processing unit. By rewriting it to an address, there is no need to judge the number of times the key is pressed.

〔Example〕

FIG. 2 is a flowchart showing one embodiment of the present invention, in which a shows the general flow and b shows the overall flow.
c is a flow showing the contents of the first processing section, and c is a flow showing the contents of the second processing section. Using the addresses in Figure 1, address A in table 3 is rewritten from A ₁ to A ₂ when the first processing of b is completed, and it is rewritten when the second processing of c is completed.
This means rewriting A ₂ to A ₁ and returning to the beginning.

By doing this, you will not need to make several judgments in the flow of a, and after searching the table and finding the processing unit address, you can immediately move on to the key process (in this case, the process of b or c). I can do it.
In detail, it is necessary to check whether the process is allowed or not, that is, check the validity of the key input before proceeding to the process, but this point will be described later.

Incidentally, in the case where the first key operation is performed but the second key operation is not performed and the operation is aborted, the processing unit address A may become _A2 in the example of FIG. If the corresponding key is pressed in this state, the process will be performed from the second operation and an error will occur. ,
Therefore, even if input is interrupted, it is necessary to return to the beginning.
This return process can be performed as part of the IPL process when the power is turned on or as part of the cancel key process that is pressed at the time of interruption.

By the way, in the example shown in FIG. 5B, if you press the set key 12 and then press the move key 13 when you should have pressed the set key 12 again, it is an operational error.
In this case, some kind of mechanism is required that does not accept keys other than the set key 12, or at least does not accept the movement key 13. Conventionally, this is done using a management program, but Table 3
This management program can also be simplified by setting a valid flag to .

FIG. 3 shows an example using the validity flag F described above. This valid flag F is attached to the processing unit address B and has, for example, an 8-bit configuration. 4 is a register having the same bit configuration as this flag F, and each bit indicates each state of the device. For example, as shown in Figure 4a, the bit in state 1 is 1 (valid) when the set key 12 is operated for the first time, and the bit in state 2 is 1 when the set key 12 is operated for the second time. be. By providing such a validity flag, it is possible to easily determine whether a key input is valid or invalid.
That is, when the set key is input for the first time, the valid flag attached to the corresponding processing unit address in table 3 is set to 1 in state 1, and the software of the device writes the same valid flag (00100000) to register 4. Therefore, when we compare the flag part of the readout output of table 3 with the contents of register 4 (taking an AND for each bit), we get 1 in state 1, and from this we can judge that the key input is valid. . The same goes for the second set key input, and in this case, the AND result 1 is obtained at the position of state 2.

By the way, if address B is the address of the processing section of movement key 13, this valid flag F is in state 1,
It is conceivable to make two 1's placed in the position of 2 (because movement is valid when set twice), but if you do this, you can AND each state 1 and 2 individually, and then AND them collectively. It is complicated because it is necessary to take Although Figure 3 shows that the AND is performed by hardware (AND circuit 5), it is actually processed by software, so
The above method takes time to process. Therefore, in this example, these are combined into state 3 to simplify the AND processing.

That is, if the bit in state 1 is 1 and the bit in state 2 is also 1, both of them are returned to 0, and the bit in state 3 is set to 1 as shown in FIG. 4b. This is done using software included with the device. That is, the key processing unit 1 in FIG. 1 rewrites the contents of the address in table 3 (processing unit address and valid flag) at the end of its processing, but at this time, the software attached to the device changes the contents of register 4 to state 1. and 2 make it 1. With the second key input, the processing unit address and valid flag (state 2 is 1) for the key are read out, and the flag is compared with the contents of the register 4 (states 1 and 2 are 1). Since a match is found in state 2, this key input is valid and the process is carried out, but at this time, the software attached to the device sets register 4 to 1 in state 3 (since states 1 and 2 are 1).

When the movement key is pressed, the processing unit address B of table 3 and its valid flag (which is also set to 1 in state 3 according to the above) are read out, and register 4 is read out.
is compared with the contents of In this way, register 4 and valid flag F are only in state 3, that is, only 1 bit out of 8 bits is 1, so it is easy to AND, and if the result is 1, the key input is valid, and if it is 0, it is 1. If so, you can easily determine that it is invalid. still,
The position of state 3 may be arbitrary, or if state 3 is not provided and states 1 and 2 are 1, only state 1 is set to 1 and state 2 is set to 0 (of course, the valid flag of processing unit address B in table 3 You can also leave it like that).

Another example of determining whether the input of a certain key satisfies the input conditions for that key is the input of a four-digit character code. In other words, when displaying a character that is not on the keyboard, a method such as inputting the ASCII code of the character using the numeric keypad is used, but in this case, the character code is 4 digits, so the character code cannot be entered until the number has been entered 4 times. It becomes complete. You can easily check the number of inputs by incrementing the counter each time you input a number, and when it reaches 4 times, setting a flag in register 4 with the valid flag position of the processing unit address corresponding to the display key set to 1. be able to.

〔Effect of the invention〕

As described above, according to the present invention, a table of processing unit addresses for each key is configured in a rewritable memory, and the processing unit currently processing transfers the corresponding area of the table to the next scheduled processing unit. The process of rewriting the address has the advantage of speeding up addressing when the next key is input.

[Brief explanation of the drawing]

Fig. 1 is a basic configuration diagram of the present invention, Fig. 2 is a flowchart showing one embodiment of the invention, Fig. 3 is a block diagram showing another embodiment of the invention, and Fig. 4 is an explanatory diagram of its operation. , FIG. 5 is an explanatory diagram of a conventional key processing method. In the figure, 1 and 2 are key processing units, 3 is a key processing unit address table, and 12 and 13 are keys.

Claims (1)

[Claims] 1. In a key processing method including a table 3 for converting a key input into an address of a processing unit corresponding to the key, the table is composed of a rewritable memory, and the same key This key processing method is characterized in that for keys that instruct different processing units 1 and 2 depending on whether the input is an input, the address in the table is rewritten by the preceding processing unit to the address of the next processing unit. 2. The table 3 has a flag F section along with the address of the processing section, and indicates the type of the key by setting a predetermined flag in the flag section. The predetermined 1 is set on condition that the key is input multiple times.
2. The key processing method according to claim 1, wherein two flags are set.