JPH05508723A - Active storage in reduction processors - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] Background of invention of active storage device in reduction processor Computers were invented in the 1940s. Since then, it has developed at a revolutionary speed. I've been doing it. Nevertheless, today's computers are nearly identical to their early predecessors. The same structure is being developed.

Many improvements have been made in the hardware. Introduction of VLSI lithography techniques Due to improvements in technology, what was called a supercomputer five years before Han's arrival was one-chip. Can now be manufactured with Tsupu. Line width has become exponentially thinner and is now 1 micron. It is as follows. The number of active transistors and clock speeds have increased by several orders of magnitude. However, things Line widths will probably be limited to #0.2 microns due to physical constraints.

Throughout the same period, computer architecture has changed in the use of silicon. There was no change. On the contrary, many computers aim for higher speeds and use an optimal amount of The above silicones have been used.

Due to both of these facts, the evolution of single processor computational speed over the next five years will stop. Parallel processors have been introduced and will grow Complexity increases hardware costs, and for many programs Gramming costs increase by orders of magnitude.

Looking at the relationship between each other, hardware costs are decreasing, but new systems Programming costs will increase considerably and will eventually reach prohibitive levels.

Computers are complex assemblies of various units in terms of both software and hardware. It is the body. Various frameworks and stages in the development of the system (on-the-spot Standards developed (and established) were created. Due to this irregularity, There are many interfaces.

Because of all these interfaces and frameworks of different nature and format, the user It becomes difficult for the user or programmer to use the machine (requires a lot of knowledge) ), and could introduce unintended errors due to complexity.

However, recently, so-called reduction processors have been developed.

A reduction processor executes a program with a certain structure that contains arithmetic expressions. Ru.

This structure is then reduced to many glue reduction steps. Therefore, the program Systems do not run in a predetermined order like in other types of computers.

There are several difficulties in developing a reduction processor that exceeds a limited size. There was a problem.

Development of programming languages Early computer development led to the creation of several programs that were adapted to this type of computer. logging languages (e.g. Fortran, Kobol, Algal, Basic, Pascal, etc.). These languages are called imperative languages and are is primarily a traditional computer (i.e., developed by John Fono Neumann). which should be executed in sequence by a computer (designed based on the principles developed). A program is usually given as a series of commands or instructions. It is called a conventional language because of the fact that it can The growing inconvenience of these languages for a range of other languages (LISP, ISWIM.

5chene (a type of LISP), ML, Hope, 5ASL, etc.) It has been developed. What drove the development of these languages was the concept of simplification; The machine also has no influence on the design.

It took some time for functional languages to gain traction. Functional languages run slowly One reason is that

These function programs are now executed by this type of computer. Recent developments have shown that in some cases, execution speed has for traditional (imperative) language programs executed by modern computers. It takes a lot of effort to develop functional languages that are close to or the same as This was due to the increasing inconvenience of imperative formal languages. Around 1970, people He started talking about the software crisis. Programs are becoming increasingly complex and often It contained many errors, was difficult to read, difficult to understand, and especially difficult to modify. one One reason is that high-level imperative languages would make programming easier. Although the waiting time was high, these languages were not as high standard as expected. That's true. Imperative languages are still based on early computer concepts, i.e. It is suitable for Iman-type computers, and the programming level is It's still pretty close to machine level. Functional programming languages are It has several features that alleviate some of the drawbacks of the Ramming language.

For additional information and understanding, see “FunctionalProgramming 　Llsing　5standard　ML”人ke　WikstroOm.

See Prentice Hall, I 987.

In order to fully understand the purpose and advantages of the present invention, it is necessary to take a functional approach to the calculations. It is important to understand what this includes. In particular, the historically mainstream imperative It is important to understand this in comparison with the approach.

The term "functional approach" means that programs are written and memorized in a functional language. and run on a computer containing hardware specifically suited for such languages. It means that. Equivalently, the term "imperative approach" means that the program A computer written and stored in an imperative language and containing hardware suitable for imperative languages. means that it runs on a computer.

However, programs written in functional languages can be stored on conventional computers. It is also possible to execute

Conversely, a program written in an imperative language is different from a program written in a functional language. It can also be executed on any computer suitable for execution.

It can be seen as a definition and calculation rule for -sets of properties (target). The definition is in the declaration section. Yes, calculation rules (i.e. reduction or rewriting rules) are used by the computer during execution. Functional languages provide a high-level interface to computers. It allows the programmer to extract details related to the computer's hardware. Become so.

As an added benefit, functional programs are often shorter and more compact than traditional imperative programs. Easier to understand than program. One of the major drawbacks of functional languages is that functional programming In order for a program to run on a conventional computer, it must be translated into a conventional language. That's true. This is done in a computer or interpreted program. Ta. Several advantages of functional abuchi allow you to write functional programs in an effective way. memory, due to the fact that there is no dedicated /%-ware for the task to be performed. It is clear that this will be hindered.

definition The following is a list of terms used herein and their meanings.

Element... Partial list of larger items in the data structure... Element (each element (can be a list) Insert list: A part of the list, the whole of which is written in one closure. Small enough to be remembered. Allows you to express arbitrarily long lists.

Closure: A hierarchically structured entity that defines a process.

Every closure grows a root that uniquely defines the closure.

Reduction operations in reduction machines are done on closures.

The entire state of the machine is transformed by beam induction.

Object storage: Memory containing storage cells that store objects. parable Associative memory.

Memory cell: A cell in object memory. Remember cell closure and transfer to other storage cells May also refer to other stored cell closures.

Cell closure: Contents within a memory cell, Memory self-yield...Field closure element within memory cell...Memory self-yield data element closure identifier stored in the field - a closure cell element that uniquely points to the closure. Prime criterion closure: A closure that cannot be further reduced, that is, the cell closure in question is reduced. a closure identifier that points to some other cell closure that may be reduced in the way that should be Cell closure that does not contain.

Goal: Execution, that is, the closure father to be reduced. Parent: Value/specified field. a closure with at least one closure identifier in Son: Specifies a son with a closure connected to other closures via a closure identifier .

A son can also be a father, and a father can also be a son. The son has a father of 2Å or more. fathers may raise sons 2 Å or larger.

Closure position: Indicates whether the closure is a root or a node.

Root...Topmost closure cell node in a closure tree...-a closure that is not a root in a closure tree Cell where - Memory including closure position Self-yield type... Cell type code in a le closure, a bit pattern that represents the nature of the object. parable instruction code.

Lazy: Cell closure indicating executable, deferred evaluation, or inactive elements of Identifier: a special type of closure used to indicate the purpose stored in a storage cell element.

Environment: Objectives can be classified by giving them the same environment. Value/Specification: simple value (i.e. direct expression), nothing, indication for another closure ( (i.e. indirect expression) Core cell: structural arithmetic device according to the present invention. Core cell is a structure containing closure simplification Can perform calculations.

Numerical ALU: Numerical ALU that can perform basic numerical and logical operations, the core cell is Uses a numerical ALU for numerical calculations.

Full register: A register that extends through all branes within a core cell.

Core word...Full register content limit register in core cell...Value/ Extends through a limited amount of branes of dimensions that contain closing cell elements of the specified type. register in the core cell.

Element word: Contents of a limit register or having the same wavelength as the limit register Some contents of the full register num word: part of an element word that represents a value or specification Tag (tag) word: has a tag that indicates the characteristics of the expression in the nameword part of element word Reduction: According to the rules of the specific programming language used. write the closure To replace/reconstruct.

Behavior: time as an alternative to a series or a series unified at one point structure. “1” can in principle be an action. Mathematics in set theory such as In analogy with Mr empty set J for Used in altered form.

Purpose of invention It is an object of the present invention to provide a computing device that has a declarative programming language. Ru.

Another object of the present invention is to provide a computing device that works as a duxitan processor. It is.

Yet another object of the invention is to simplify and provide the programmer with all hardware-related details. A programming language that extracts data from parts, takes less time to write, and has fewer errors. An object of the present invention is to provide a computing device having a word.

Yet another object of the invention is to provide a language, such as a programming language, an The objective of the present invention is to provide a computing device having a communication system and communication protocol.

Yet another object of the present invention is to implement a functional language that has unification as its combination method. The objective is to provide a computing device that can

The above object is substantially achieved by configuring a computing device, and the computing device includes:

b) Multiple memory cells each cultivating information that can improve computational performance. at least one active storage device connected to said active storage device; boat means, and c) At least one environmental means connected to said at least one boat means .

Preferably, the computing device comprises a signal sequence applied to the boat means and an active storage means. A sequence stored in at least one storage cell in (a storage sequence is an undefined sequence element) and, if the results of the comparison show clear differences, Rewrite the comparison series to ``no J'', that is, something that represents a contradiction, and in other cases, use the above comparison series. It is desirable to include means for rewriting columns into a particular series. The means of comparison is a list of a certain number Comparisons can be made for groups that include at least two of the elements. It will be possible.

A signal sequence is a time-varying sample with individual sampling periods. It is preferable that the signal sequence is given as a grouped signal, and the signal sequence is a group of elements. a list, where each group contains a duration and at least one signal amount during that time. including. The predetermined number of list elements in each group is such that each pair is a combination of time and signal amount. It is appropriate to provide two pairs, including combinations.

one of said boat means being synchronized with at least the other, said boat means being synchronized with said boat means during each duration; Means may be provided for parallel display of signal amounts from the boats. separate boats The above signal amounts can be extracted simultaneously and compared with each other.

The storage cell means is stored in a computer program in the form of an explicit or implicit encoding of an abstract syntax. It is desirable to provide an active storage structure adapted to store the gram. this place In this case, the syntax represents some abstract objects with the help of expressions, and each storage cell The means may include one at a time in the form of suitable data and/or program structures. Can memorize at least part of a syntactic expression.

Each type of expression also has its corresponding type, indicating that it is in program form. can exist.

In this case, every program form is reduced to itself, and the following The formula remains as is. This allows for any kind of other language. It becomes possible to write interpreters and compilers using

The rewriting means cooperating with said storage cell containing the syntax expression are arranged in accordance with predetermined rewriting rules. Rewrite syntactic expressions.

Summary of the invention The computing device according to the present invention is a declarative program that is created using hardware and is also a machine language. Preferably, the computer has a programming language. However, all electric Similar to child devices, today the wiring of computing devices according to the invention also depends on interpreters or could be simulated on a general-purpose computer equipped with a compiler. like this An example of a machine is a machine based on the M68000 processor (eg 5un3). be. However, according to the invention, the machine has unification capability. There is a boat equipped with power.

Performing a reduction The executed program can be represented by a directional graph of closure (in this case, the program Each part of the gram is represented by a closure). During execution, the direction graph of the closure is It is gradually reduced (reduced) according to the language reduction rules used.

Program execution ends when there are no more viable closures. direction of closure The rough can be thought of as a book structure (each node of the tree is a closure, and the top node is called the root). ). In this case, performing a reduction typically involves simplifying the inverted tree structure, In other words, by simplifying the part of the tree that is farthest from the roots and working toward the roots. Therefore, it is carried out. This type of execution is called request-driven execution. That is, professional The execution of a part of the program that depends on the execution result of other parts of the program is It will be postponed.

Brief description of the drawing For a more complete understanding of the invention, as well as other objects and advantages thereof, reference should be made to the accompanying drawings. Please refer to the following related statements.

FIG. 1 is a schematic diagram of a computing device according to the invention.

FIG. 2 is a diagram showing a signal train on a boat.

FIG. 3 shows a schematic block diagram of an embodiment of a computing device according to the invention.

FIG. 4 shows the seeds in the storage cells of the object storage in the embodiment shown in FIG. This diagram schematically shows how each field is used.

FIG. 5 shows an example of how functions can be stored in storage cells of object storage.

FIG. 6 shows one embodiment of a boat leading to the environment.

FIG. 7 shows an embodiment of a so-called H-boat.

8A, 8B and 80 illustrate the embodiment of the computing device shown in FIG. 3 shows various registers within the structural arithmetic unit.

FIG. 8D shows an embodiment of the structural arithmetic device.

Figures 9A-9F illustrate various data storage formats in a structural arithmetic unit.

Figures 10A to IOH, IIA to IIG, and 12 to 128 are according to the present invention. An example of the operation of a computing device according to the present invention is shown schematically in FIG. It includes an active memory U1, hereinafter referred to as active object memory. multiple memory cells The memory is active as each memory cell contains an opportunity to improve computational performance. Ru. Each object storage cell is divided into several storage fields It is desirable that an associative search via object memory is performed on the contents of the memory field. It may be done accordingly. One storage cell can store one cell closure.

One cell closure can store specifications for other cell closures as closure elements. function is stored as a closure (tree) tree containing several cell closures specifying each other. can be done. These characteristics are further illustrated below.

Object storage provides the internal behavior of the computing device according to the invention. object In the object memory, some internal operations PRI, PR2, . . . . PRn is stored in a different location, ie in a different storage cell. Many buttons ports U2-US are connected to active object storage U1. multiple boats U The input signal RW, 2 to RWIIs for 2 is provided by a sensor or Information cannot be provided by devices external to the computing device, i.e. devices in the real-world environment. You will be able to do that.

behavior Behaviors are structures of basic elements that can change over time. Therefore, Behavior is a time structure, but it does not indicate why the structure changes. Time structure A structure can be thought of as a state of an assembled process. The computing device according to the invention is particularly Conforms to declarative programming languages below (referred to as H). Declarative languages are imperative languages. As with words, there is no explicit identification of states and transitions. Instead, all behaviors are specified by the current situation. Therefore, the term behavior refers to the temporal structure, i.e. A series or an alternative to a series. It also refers to the empty set in mathematical set theory. Used in altered traits for all possible values compared to usage.

The boat converts the input signal into a format compatible with active object storage, such as digital converts the input signal into a format that can be compared with the information in active object storage. provide. This information is local to the boat in question and is or several alternative behaviors PR1, PR2−=PRn.

Boat Ui (i is 2 to 5) is each part of the real world environment given as a behavior. , whose behavior is constituted by an endless temporal sequence of values. system The columns can be stored in a tree structure within the computing device, as described below. This way An example of such a sequence is shown in FIG.

The sequence of sampled signals changes over time. That is, sample The processing period is selected by the computer program, as is clear from Figure 2. can be distinct whether given by the surroundings or the environment . The signal sequence is given here as a list of element pairs. Each element pair has a duration and It consists of the signal amount between that time. It is also possible to have two or more signal amounts per time interval. It is. This could be for example handling more than one signal amount per duration. multiple signals, each with the possibility of handling one signal volume per boat or duration. This can be achieved by parallel boats. In this case, each boat is synchronized with each other.

Unification of behaviors According to the invention, the inputs and outputs through the boat to its surroundings or environment are Internal behavior on both sides, within the computing device and external on its surroundings or environment. This is accomplished by unifying the processes given the behavior. active object A program written in the functional language H given in memory can produce local behavior. to be accomplished. Real-world behavior describes one protocol in real time.

Therefore, the boat of a computing device heading towards a surrounding object is the actual surrounding object seen from the computing device. Register the behavior. It is a protocol written within a computer. unified in the file. The following describes how this is done in a computing device according to the invention. Explain. Both the internal and external behavior of the computing device are thus Modeled in a similar manner. Therefore, this method allows the computing device to operate in real time. It's a very nice way of doing things that makes it very suitable for playing.

In this way, the computing device converts the signal sequence applied on the boat towards the surrounding objects into an active driver. A small number of memory cells (in most cases, multiple memory cells) in an object's memory. at least one comparability for comparison with the series stored in the cell).

Alternative internal behavior that does not match the behavior of the real-world environment during unification operations will be deleted. The correct program is to use an alternative behavior that is You should only have one of these, and this behavior is Must match behavior. None of the alternative internal behaviors If it does not correspond to the real-world environment on the boat in question, the unification behavior will result in nothing. It is considered a programming error.

H boat The above description of the human power/output boat is based on data other than the dual-ring structure. It can be generalized to handle data structure inputs and outputs. In this case, Unify internal behavior with external behavior by unifying duration and signal amount Instead of doing so, it is possible to do a unification of the bit pattern. The input signal is A digital signal is fine. In addition, the input signal is a data structure such as an H language program. Or you can express the program structure. For example, the storage cells in one boat of storage cells The field can be unified to the bit pattern at the input of that boat.

Example: Internal structure, apply ($1 and $2) is the bit at its input Since it can be unified by a pattern, the final unified internal structure can be created by applying y) (+1ist (12)) (this is shown in Figures 11A and 11B). This is the structure shown in . Here $1 and $2 represent arbitrary bit patterns . $1 is unified with the bit pattern representing the instruction code for "+", and $2 is It is unified with the bit pattern representing "1ist (12)".

The program is activated via the H-boat (which receives the H-language code). Can be loaded into object memory. H ports can also be used between processors. The processor can transfer programs and/or data.

The transfer program code is first identified as data and its immediate execution is prevented. It will be done. The H-boat is also known from the prior art as a computing device according to the invention and therefore It can also be used as an interface between computers and other types of computing devices.

object memory In the embodiment of the computing device shown in FIG. As will be seen, there are a number of storage cells 2, each divided into several storage fields. including. The exact structure of object memory is not part of the actual invention, so details will not be explained. An object memory that can be given as an object memory The memory is set forth in co-pending PCT/SE No. 91100513.

structural arithmetic device Each storage cell in object memory can store a cell closure containing several closure elements. Ru. 1. Sufficient convergence is provided to connect each bit cell in the storage cell to the structural arithmetic unit 3. The object memory 1 is stored via the memory bus array BUS, -BUS. It is connected to the structure calculation device 3 mentioned above. Each bit of each storage cell is connected via an array of buses. and connected to corresponding bits of all other memory cells. The structure calculation device 3 is a simple An option where the closure to be reduced is temporarily moved during the reduction operation. It may be a specific part of the object memory 1. However, as explained below, It is also possible to have a specific structure of operation is possible.

The exact structure of the arithmetic unit 3 is not part of the actual invention and will not be described in detail. . The device preferably provided as the computing device 3 is the co-pending application PCT/SE 91. 100514.

The computing device shown in FIG. 3 is a memory bus array BUS.

〜BUS, so in practice all data calculation devices perform their calculations. Direct access to equipment. In this way, the computing unit 3 and the boat are active objects. be regarded as belonging to an object memory, i.e. as a special cell within it. I can do it.

central control unit A central control unit CU controls both the object storage and the device 3. Similarly inside Several boats 4, 5.6 and 11 controlled by a central control unit CU are equipped with connected to station 3. Boats 4,502 are unified boats connected to the environment It is shown as. 11111E+ by the sensor or computing device, and External devices 7, 8, such as devices for calling and/or controlling the same, are respectively attached to each boat. It is connected. Boat 6 is an H-boat connected to another computing device 9, which transfer the program to be installed on the computer's computing device; Boat 11 is another computer location 12 (e.g., connected computing device 1-6.10゜11, same type as CU) This is an H-boat connected to a

Some computing devices of the type shown in FIG. directly internally connected to the transmission between the temporary storage closures (not shown) of the multi-parallel computing device can be configured. In this way, global discoverability can be maintained. death However, depending on the field of application, two or three computing devices or multi-parallel computing devices can be 11 so that each computing device acts as an individual computing device and cause programs and/or data to be exchanged between them during processing; It is convenient. Hbaud) 11 is an interface to another type of processor It can also be used as When the H port transmits a program, the transmission is data transmissions and computing devices treat them in the same manner.

Numerical ALU It is also possible to connect extra devices IO to device 3 for performing special operations of special types. can. An example of such a device is a numerical arithmetic unit, hereinafter referred to as a numerical ALU.

However, the extra equipment can be used for comparison purposes and other purposes. Technically, numerical ALU is Almost any ALU in general, but a number particularly suitable for the computing device according to the invention The value ALU is described in co-pending application PCT/SE 91100515 and includes device 3. The active memory 3 contains a signal sequence applied to one of the boats (for example 4) and the other boat. Compare at least one series given to at least one of the has at least one comparability. This comparability depends on the duration ring time) and a signal quantity. It can be stored in memory or directly equipped by the boat. But extra It is also possible to make a simple comparison in the device 10. There are also two external behaviors. When comparing vias, if the comparison gives a difference (i.e. If the duration or signal amount is not equal), the comparison series is set to nothing. Will be rewritten. In other cases, the comparison series is ill and cannot be rewritten to the same specific series. It will be done.

Thus, active object memory], 3 is an explicit or implicit encoding of abstract syntax. It has a structure capable of storing and executing computer programs of the form. Structure Sentences describe a number of different abstract objects with the help of representations. Each memory cell A file contains at least a syntactic representation in the form of suitable data and/or program structures. You can also memorize part of it at once. The syntax is explained in more detail below.

object memory ability Object memory 1 develops intelligence considerably superior to ordinary RAM type memory. So This is an associative, ``reading'' provided by ordinary RAM type memory, r-book. It is possible to provide more than one service.

As mentioned above, object memory is a memory that each contains several storage fields. It is divided into two cells. The service provided is of a high standard. For example, specific discover all occurrences of a data element anywhere in an individual storage cell and The particular data element discovered in the entire object memory (i.e. within the entire object memory) ), it is possible to rewrite it with a new value using only one memory instruction. of Since object memory is associative, this rewriting operation will affect the number of memory cells affected. Regardless, it could be done in two physical memory cycles.

memory cell An embodiment of a storage cell 2 is shown schematically in FIG.

It is capable of storing two types of elements and has a memory field specifically adapted to the element to be stored. Including Rudo. In Figure 4, these fields have the same names as the elements to be stored. The previous is given.

Each storage cell is configured to store at least some of the following list of properties: ing.

- Mark indicating whether the expression (formula) in the above cell should be simplified.

・A map indicating whether the expression is a member of a tree representing its various properties. -k.

・A mark that indicates how the expression is generated.

- A mark indicating whether the expression results in many repeated behaviors.

・The representation is the only list with other list members stored in different storage cells. A mark that indicates whether it is part of the

The first type of elements (hereafter referred to as attribute elements) describe different states of the storage cell. Ru. One element of this type is when a cell is "idling" with LASY (in this case, The rest of the cell's contents are considered passive information, i.e. ready for action) or “waiting” (cell evaluation is deferred, waiting for results before it can be executed). ).

Other attribute elements are TYPE and UD-code (par, seq, apply.

1ist, unifY, etc.).

The second type of elements (hereinafter referred to as object elements) are identifiers, environments or objects. describes the value. Namely 1, mtL Rano! element+tlDENTIFIER,EN There are VIRONMENT and VALUE/DES. These object elements are the core registers provided in the plane HEAD and NUM (Figures 7B and 7C). (see figure). Each of these elements is an element work (which is split into an unm word and a tag word) .

tag word A second type of closure element has tag words that characterize the name word. On the tag There are two types of tags: indirect tags and direct tags. Indirect tags are used for identifiers and environments. Direct tags are used for things like simple values.

Examples of indirect tags are cls canon and open. The tag word is cl s means that the numword represents a closure that may be reducible. do. For tag words, it means that the num word represents a closure that is an insertion list. Taste.

Examples of direct tags are disCr, C0nt, 1'nuSed and nothing. be. If the tag word is discr, it means the number word is an integer. do. If the tag word is cont, the num word is a floating point value. means.

If the tag word is unused, it means that the name word lacks meaning. Taste. If the tag word is nothing, the name word represents nothing. , that is, if the identifier field in a storage cell contains an identifier element, then the storage cell The state of the cell can be transferred to the structural arithmetic unit 3 (hereinafter referred to as core cell). memory self Each yield VALUE/DES contains an identifier indicating another cell closure, and You can give a link to the cell closure of . The environment field defines the environment of the closure. It may contain an identifier indicating the root closure of the given branch or tree. However, the environment Other uses of the field are also possible. The environment includes all generated cell closures The generators of a structure can be tracked by remembering the identifiers of the generators in the environment. Wear.

For example, a subtree (where all symbols growing the same name are the same) ) can be classified by having the same environment.

In this way, the entire structure can be closed by one tree in just one operation, via the roots. It can be accessed from the package.

The designated function can be viewed as a directed link from father to son. i.e. , the closure element uniquely represents the cell closure. Thus, it has an associative purpose memory. The behavior of the machine can be represented as a directional graph of closure.

Therefore, given the environment of one closure, finding the root closure within this environment Can be done. The radical closure of the environment is specified in the field WHE RE of its memory cell. A specific mark (for example, "1") is provided. The nodal closure of the environment is the field WH The ERE is provided with another mark (for example, "0").

example an expression that is a combination of two parallel values, idt = list (par (123) of the memory cell that stores par (456) An example is shown in FIG. The first parallel combination par (123) is the identity The second parallel combination par (456) is the ID (identifier) xdz. has the identity id. Encloses a cell closure with identity ld2 in water. The root memory cell is tagged with cls and displayed in the LASY field eXeC , has l″ set in the WHE RE field, and has the TYPE field Create display 1ist and enter id in the first two VALUE/DES fields. Grow t and xds. The tags for these fields indicate that their contents are canonical. (canonjcal) canon because it is indirectly linked to the closing cell It's a mark. A nodal storage cell containing a cell closure with identity id is , has “0” set in the WHERE field and is displayed in the TYPE field. ar and separate values stored in the first three VALUE/DES fields 1.2 and 3. Therefore, the tags for these fields are It is

A nodal storage cell containing a cell closure with identity tds has a WHERE field. has “0” set in the field, has display par in the TYPE field, Separate values stored in the first three VALUE/DES fields 4.5 and It has 6. Therefore, the tags for these fields are also discr marks. .

The boat as an interface to the outside world As mentioned above, the processing device according to the invention has one or several ports for data input/IOH power to it. Ru. Each boat is a device that provides communication to the external environment of the processing equipment. The boat is on Connects to the conversion interface (not shown) in object memory 1 (see Figure 3). It is desirable that it be continued. The boat preferably has four registers that are similar in function. storage cell and is compatible with object storage cell 2 (see Figure 4), therefore, the It can be seen as an extension of object memory. Boat input/output through unification perform an action.

internal behavior Object memory is a process where each boat is given one behavior. gives the internal behavior of the server.

Behavior is a semantic meaning of temporal structure and can be expressed as a closure structure. time Structure can be seen as the state of a process made up of a never-ending time series of values. stomach.

external behavior The input signal to the boat may be a sensor or external to the processor, i.e. the real environment. It can be given by a device located in The boat stores input signals as objects. Convert to a digital format suitable for the format, that is, a closure representation. This close The wrapper representation is a time structure that has commonality with the internal behavior of the processor, that is, a behavior. It is a.

Therefore, from the processor's perspective, this time structure can be viewed as an external behavior. Can be done.

Inputs and outputs through the boat are given processes on both sides of it, i.e. By unifying the internal behavior of a processor and the external behavior of its environment. carried out. Both internal and external behavior are modeled in the same way. It will be done. This makes the processor extremely suitable for real-time operation. This is an excellent method.

An example of external behavior, ie, time sequence, is shown in FIG. Extracted beliefs The number series changes over time. In other words, the sampling period is clear from Figure 2. It could be very different. Here, the signal sequence is given as a list of element pairs. available. Each pair includes a duration and an amount of signal during that time. The signal amount is expressed in gi, The duration is denoted by ti (where i is a number from 1 to 6).

A boat to the environment, such as boat 4 in FIG. 3, can be connected to a sensor 7, for example. child The interface on the board can handle all types of signals from a general point of view. can. However, these types of interfaces are complex and often cause a disturbance. Therefore, a desirable interface has the following properties: Should.

1. The signal is measured at regular time intervals. The measured signal remains constant until the next measurement. It is considered that

2. A fixed period determined by the boat, determined by the machine program. time at regular intervals determined by a program or an external signal. can give.

3. The measurement signal is given to the machine in digital form.

4. The digitized signal is logical or can represent an integer or floating point number. encoded in digital format.

In this way, the computing device according to the present invention can insert and output values just like a normal processor. Neither. In the processor of the present invention, the board is a program in the processor. and the environment for the processor. The computing device conforms to the functional type term MH.

The interface accepts signals on one side of the processor program as signals on the other side. It is like being given a series of events that appear as a structure. The environment is a physical part of the architecture, and the processor also sets part of it. This is a boat or Since they are done from both sides of the interface at the same time, they are both pictures of the same event. So, the closer a computing device is to accurate real time than it can get, the more it will draw real time. It turns out.

Programs are stored in active object storage and generate internal behavior. P Execution of a program involves both the program within the computing device and the environment. based on looking at the same real-time sequence of events in the

The program generates a long, never-ending list of value and duration pairs (i.e. each signal value is Describes the interface as (lasts for a duration). Therefore, during each interval contains a pair of signal values and durations, and the interface Describe the signal value. Given all these pairs in succession, the boat can Convert Hevia to a list of the same format.

Input and output to the computing device is accomplished by unification. This means that each This means that the duration and signal values within the interval are produced similarly on both sides of the boat.

The program can specify specific signal quantity values.

Otherwise, by using a specific symbol, e.g. $, to indicate all possible values. Therefore, the signal amount value can be left unspecified.

A correct program will use only one of the alternative behaviors left after the unification operation. This behavior is the behavior on the boat in question. must match. Instead, none of the internal behaviors are implemented on the boat in question. If it does not correspond to the world environment, the unifying behavior will result in nothing. ), which is considered a programming error (nothing indicates a contradiction). to mean). Two or more alternative behaviors may remain after the unification operation. , is considered a programming error.

When an internal behavior identifies a particular signal value (also called a signal amount), this characteristic The constant signal value is output to the environment. An internal behavior leaves the signal value unspecified and Signal values are input from the environment.

If an internal behavior specifies a specific duration within an interval, the environment specifies a specific duration within an interval. Allow for long periods. When an internal behavior leaves the duration unspecified, the environment Determine duration.

The mechanism is thus symmetrical.

Including quantity.

written in the ram.

3. The environment may describe such intervals in various ways as described above.

4. The boat defines the amount of signal on both sides of it. This means that the signal amount is not determined. means that it must be done.

The program of the computing device is the duration or amount of signal on the boat side directed to the computing device. Set. The output is made for a fixed duration and/or the amount of signal is is sent to the boat's conductor on the side facing towards.

Examples of environmental boat implementation One embodiment of a boat for inputting and/or outputting intervals is shown in FIG.

The boat is connected to the structure arithmetic unit 3 or object memory l using the bus array DU. directly connected. Each bus of the bus array DU is a bus that carries, for example, 38 wires. represents the The boat is controlled by a solid unit CU. boat identifier regis Contains data ID. The identifier stored in register P+o is in object memory l. It can be used as an identifier. i.e. the boat in object memory Can be used to link to cell closure. This identifier is It is only used internally. The port can also be used similarly to the register PID. Identifier register CE, which can be including. Boats are also each inherently A number of storage cells C that operate similarly to the storage cells in the object storage l E ou, CE L-IT, CE, 1. Contains tT and CEID.

Each storage cell has at least three closure elements (e.g., during, duration and signal amount) can store at least three storage fields for storing .

At least the last two closure elements above are VALUE/DES (value/designation) type storage Can be stored in the field. The table field can be omitted.

However, in the embodiment shown in FIG. ing code) in the TYPE field along with the TYPE 'apply ( '@) format. The function name is the first VALUE/DE of the boat storage cell. Stored in the S field (all function names (e.g. +-*1) are TYPE' appty) o during code is an identifier indicating a function definition. obtained, it is stored in object memory.

The identifier id can also be stored in the VALUE/DES field. This knowledge The besshi links the boat structure to the duration structure in object storage.

If the field containing the identifier is not required, the three ALUE/DES fields Only the code is needed in the sixth @ embodiment. But marked as unused The fourth VALUE/DES field entered into the boat register of the computing device. It can be compatible with other memory cells.

However, the extra device for VALUE IN10UT is installed in the fourth VALUE/DES. You can also connect a resistor. This allows one group of values, i.e. persistence A boat-to-boat is formed for time and two types of signal amounts.

Each storage cell within the boat also has an attribute field.

At least the pre-LAS storage cells are connected to buses W@+, Wll, WTIW vl, (Each bus has, for example, 38 wires, and each register (connected bitwise to the bit cells of the data). The index ■ is the register duration The code field indicates a bus that can be connected, and the index T is the register connection time VAL. Indicates a bus that can be connected to the UE/DES field, and the index V is the signal amount V of the register. The ALUE/DES field indicates a bus that can be connected, and the indicator ffE indicates the remaining register. This shows a bus that can be connected to the VALUE/DES field. Indicator 2 is towards the environment It indicates the previously connected bus, and the index l may indicate the conversion interface (Fig. 2 shows a bus connected to the active object store 1.3 via (not shown).

TMPH field containing '9 and a during code which is actually omitted. Note that it is possible to have a first VALUE/DES field that (their information is always the same, this fact is realized in the central control unit CU) ). Therefore, there are two VALUE/DBS fields (one for duration and one for duration). and another boat with storage cells for signal quantities (not shown). It is possible to

The four storage cells of the illustrated embodiment of the boat are the next preceding closure, the actual closure, and the next Store the closure of and an identifier for future closures. A memory cell occupies a predetermined location. in which case their entire contents are transferable between them. Ru. The appropriate structure for each bit cell in the register is the same structure as the bit cell in structure 3. Co-pending applications PCT/SE91100512 and PCT /SE 911005 I3.

However, by changing the names of the three first storage cells (this is (controlled by the position CU) It is also possible to arrange them so that

The boat may include a number of storage cells (for example one).

The time counter and time comparator board includes time counter T0゜1. nothing. It is controlled by a clock signal CLOCK, from the central control unit CU. , which measures time. It is an external reset signal, a reset from the control unit CU. Can be reset by any of the set signals. Time counter Tool,,l T is connected to a first selector 5ELI, which first selector is connected to the central control unit CU The output of the time counter Tcoa is controlled by the time storage cell. Connect directly to bus WTt that can be connected to the field or time comparator Tc Connect to amp's first power source. The second human power of time comparator T COMF is outside part time output. The output of the time comparator is also sent to the 1iIfrIIJ device CU. be transferred.

The boat also has an external value input output boat bin VALUE lN10UT. Ru. That bin is a converter C0NV, for the output signal (e.g. digital/analog connected to a converter). Bin VALUE lN10UT bin is a variable for input signal. converter (for example, an analog-to-digital converter that samples the input signal) is also connected to. The sampling time is the output of the time comparator TeOMF Or time counter T0OLIN? (not shown) by a reset signal to can be given. Memory cell CEDu1CEL1. T, and CENtXT A selector connected to a bus WVI that can be connected to a signal quantity register of If signals are to be sent to or from the boat, the central controller C The selection operation is performed under the control of U. The control unit CU should first be connected to the environment Reads the contents of a register in a storage cell that contains the register, and determines whether the value in the register is does it contain the specific symbol $, meaning that it can be exchanged with any possible value? I'll check if it is.

In that case, the control unit CU sets the boat selector associated with the register accordingly. Control.

It is also possible to form more complex boats. For example, VALUE lN10 The signal amount of UT is determined by the input value conversion circuit C0NV and the output value conversion circuit C0NV. It can be converted using the expression stored in 0NVOυD. The conversion function can e.g. each can be several integrals over different types of signal quantities, signal values, etc.

Takes two values within each duration, one at the beginning of the duration and one at the end. , one of which is stored directly in the VALUE/DES field, and the slope calculator (as shown) It is also possible to supply two measured values and a duration (without any). slope calculation device The output can be, for example, an extra VALUE/DES file (-A, de (not shown) or t ) VALUE can be stored in the extra selector device for IN10UT.

Signal amount output The information to be retrieved is provided in storage cells CE, . Therefore, the cell is information during duration, signal amount has. The amount of signal in this register is well known and therefore should be retrieved . The signal amount is retrieved from the signal amount register in the storage cell, and the signal amount is taken from the signal amount register in the storage cell and is outputted via a selector SEL acting as .

Signal amount input Information on memory cell CEDI+ is during Duration, i It is. The signal amount in this register is not yet known, and the register prepared to receive it. The signal amount is taken from the input/output boat signal amount, A /D converter C0NV, II digitizes the memory cell CE: DU. Supplied to the signal quantity register.

The information in the storage cell CE, whose duration is set by the computing device program, is , during duration, signal amount It is. Therefore, the duration is known. Time counter T Coua is continuous It is reset by the central control unit tcU at the beginning of the interval. Counter T Co1t ? The successively increasing time of It is compared with the time comparator Tco□. The duration is when these times are the same finish.

Storage cell CE becomes empty and storage cell CEsmxt is filled during this duration. be done. When moving to the next period, the contents of memory cell CEDI+ are changed to memory cell CELA. Transferred to IT, storage cell CE□. The signal amount within is transferred to storage cell CEI,o.

Duration is set by the environment The information of memory cell CE□ is during $, signal amount It is. Therefore, the duration is unknown and the environment determines this. time counter The data TC0ff1lA is reset by the external 11m at the beginning of the duration.

The continuously increasing time in the time counter Tco is the value of the memory cell CEDl. Supplied to the time register. When the environment gives the next external reset, the duration is finish. Therefore, the external reset signal controls the selector SEL+ while Separate connection to the time counter directly or by a zero signal from the time counter do.

During this duration, storage cell CE LA,A becomes empty and storage cell CE□1 becomes empty. It is filled. When moving to the next period, the contents of memory cell CE0 are changed to memory cell CELA. The contents of storage cell CE□,A are moved to storage cell CHD.

simple example A simple example is shown below to explain the operation of the boat. We now have two different sequence, (the first sequence is a predetermined signal amount per second (e.g. value ``17'') and the total has a predetermined duration (e.g. 1 second), and the second sequence all has a predetermined signal amount (e.g. 1 second). 1.2, 3.4, etc.) but does not have a given duration) shall be taken as a thing.

The boat used is called boat 1. The closure display is unified (port , ``internal behavior'') Here, ``internal behavior'' indicates all alternative series a tt operation i.e. aft　(seq　(during　(is　17)　during　(Is) $) It is a large data structure in the ``during'' format.

Now, if the input signal sequence can be unified with the above structure, the input is received and an appropriate action is taken. You can take the work. One example of a received sequence is ((Is 17) (IS 0) (Is 17) (Is 99) (Is 17)), which corresponds to the above internal behavior. This is a series that can be unified with the first series of vias. Another series received is ((2S 1) (4S 2) (Is 3)), which is unified with the second series of internal behaviors. Ru. An example of a sequence that is not received is (Is2). The reason is, The signal amount, that is, the signal amount given to the two series of internal behaviors and Because I can't.

Example of H port The H-boat embodiment shown in FIG. 7 performs two separate calculations according to the invention. It connects computing devices to each other. Half of the H port belonging to the IIf computing device Minute is TYPE] Yield TYPE 11.4 pieces (7) VA L U E/D ES Field V/　D　z, V/　D　I! , V/D 11 V/D I<o and an identifier register ID-++. Half of the H boats belonging to the second computing device is TYPE field TYP E! ! , 4 (7) VALUE/DES fields Do V/D...

Contains V/Dtt, V/D, *, V/D, 4 and an identifier register Dpz+.

In the embodiment shown in FIG. 7, the TYPE fields of the two boat halves and The VALUE/DES fields are interconnected by a bus. Transmission is continuous This is done through buses.

The best operating mode since it is convenient to have as few physical internal connections as possible. is to transfer data between the boat halves through just one continuous bus. cormorant.

However, such a transfer method uses one bus per storage field to perform the transfer. The internal control circuit in the central control unit tCU becomes more complicated than if . Figure 7 shows the interface for converting parallel data to serial data (or vice versa). is not shown. This is likely to be very familiar to those skilled in the art. The explanation is omitted here.

Each half of the H-boat has a controller CU that controls the computing device to which it belongs, and a controller CU that controls the computing device to which it belongs. are connected to U, respectively. One control device CUI is the other control device CU, A synchronizing signal 5YNC is provided to synchronize with the When a transmission is to be made, the H-boat One half contains the specific signal $ in all registers except the identifier register, and is indicated by the control device. In that case 0. That signal is connected to the corresponding register in the other half. Inherit the contents of the star.

Large-capacity program data can be transferred from one computing device to another via the H port. When transferring data, the identifier must be must be changed within the receiving computing device to conform to the internal allocation. stomach. Therefore, we replace each identifier of the transferred closure with a new one and store it in the target memory. Keep in mind that the tree will move from root to leaf (this is preferable) or from leaf to root. sent.

H language behavior The programming word MH is a format There are three aspects of pta (p, t, a are three separate modeling variables). behavior. Parameters p, t, and a are parallelism and sequential time, respectively. , form an alternative behavior. They each have different parallel operations and different circumstances. and can be considered as an indicator of alternative behavior. These three as A program can accomplish several types of behavior described by special constructs in imperative languages. It is in your best interest to do so. Together they represent the core concept of H language behavior: It becomes the core. Thus, the configuration of the computing device according to the present invention is based on these three aspects. will now process behaviors that have an effect. Depending on the application field, modeling Variable a may have two or more values. In other words, several alternative events occur simultaneously. It should be noted that there is.

Structural calculation device (core cell) As mentioned above, the cell closure of the tree limited to which the reduction is to be done is transferred. It is desirable to perform the reduction operation in a specific structural operation device 3 that is used.

An embodiment of the structural calculation device 3 (core cell) will be briefly described. Representation and purpose in memory has a counterpart in a register in core cell 3. There is cooperation between the object memory 1 and the core cell.

Register in core cell Registers that can be used in the core cell embodiment are shown in FIGS. 8A to 8C. The structure of the register is shown in FIG. 8D.

A register is shown in FIG. 8A. A register is made up of several register cells. The figure shows that each cell can store one bit of information. The register is The embodiment depicted is that the registers extend through separate planes within the core cell, with each Indicates that the register cell is located in one brane.

Figure 8 shows the registers that extend through all the branes of the core cell, that is, the full registers. Indicates the data. This type of register is used for the core cell's NUM and HEAD brains. An identifier or value can be held in a register cell located in a cell. Also, core cell TYPE, WHERE, LASY and CLOS/S in the IMPLE brain The above-mentioned state can be maintained in the located register cell.

Figure 8C extends only through the NUM and HEAD branes of the core cell. Indicates a limit register, or a limit register.

FIG. 8D shows a possible structure of the register in the core cell embodiment. The core cell is , called a pace register matrix, preferably arranged in a rectangular manner. Has a register. The pace register has a main row along one of its sides. (referred to as gysta). paces, each with one main register at the bottom A column of registers is called a dependent register. The core cell also has an identifier register and and environment registers.

- Column auxiliary registers are placed on the sides of the pace register matrix.

In the core cell embodiment, the dependent registers are those shown in FIG. 8C, i.e. A limit register is fine. The remaining registers are those shown in Figure 8B, i.e. full A register is fine.

A more detailed description of the core cell hardware structure can be found in co-pending application PCT/SE 9. Located in Ilo O514. Various data storage types with reference to FIGS. 9A to 9F Explain easily with a formula. Some examples of operations are shown in Figures 10A-10H, 1 This will be explained with reference to FIGS. 1A to 11G and FIGS. 12A to 12G.

simple value As shown in Figure 9, the simple value 25, which is the result of the reduction, is in the main register. exists in a specific register of the data. This result can be part of the cell closure .

rubel structure The goal is what is loaded into the core cell to be reduced. Shown in Figure 9B A goal that contains only rubels (typically a cell that is unrelated to other cell closures) closure) is stored in the main register. An example is a simple numerical operation, i.e. , shows the addition of values 1.2 and 3. Numerical instruction (+) is the first main register Elements to be stored in the register and processed are stored in other main registers.

2 level structure As shown in Figure 9, a tree containing a two-level structure is placed horizontally in the main register. The root list which is the father stored in the direction, and vertically stored in the pace register May I have a list of my sons who were born? In this example, the list representation ((12)(3 4) A structure with) is stored in the pace register matrix. root list In other words, the first elements of the sublist, 1 and 3, are stored in the main register, and the son The list i.e. (12) and (34) is stored vertically in dependent registers. There is. An example of using this type of memory is shown below (see Figures 9A to 9H, Figure 9E). A goal tree with a three-level structure is stored in one of the auxiliary registers, as shown in and its only son is stored in the main register. Figure 9D , the root of the goal book (replacement instruction) is stored in one of the auxiliary registers, and its breath The child (list (id 1. id 2゜id 7)) is stored in the main register. ing. Each member of this list is in turn a father with a son. Figure 9E These sons are then loaded vertically into the pace register. Here, id l is replaced with the list it represents (123), and id 2 is replaced with the list it represents. (11゜12.13), and id 7 is replaced by the list (21゜12.13) that it represents. , 22, 23).

pipeline mode As shown in Figure 9F, trees stored in pipeline mode are stored in the main register. loaded with the star's goal list and loaded with the auxiliary register's goal father . There are instructions stored in both types of registers and elements to be processed. pipera In-mode operation is preferably used when simplifying numerical expressions. one advantage The point is that intermediate results can be temporarily stored in core cells rather than in purpose memory. .

Therefore, the root list of the goal tree depends on the level of the tree structure and the action to be performed. Therefore, it is desirable to store them in separate locations in the core cell registers.

H language configuration and related hardware A language specifically adapted to the computing device according to the invention is called the H language. to the question of complexity Traditional answers tend to increase complexity by hiding all the complexities. and to make simple matters visible. The computing device according to the invention Use methods. All unnecessary software levels have been removed. The H language is Machine languages, programming languages, operators for everything in machines used as a communication system and communication protocol. However, all electronic equipment Today, the wiring of computing devices according to the invention is to some extent interpreted. can be simulated on a computer equipped with a computer or compiler. This way An example of such a machine is 5un3. However, this machine is not given the possibility of unification. You must have a boat that can be used.

Traditional logical programming languages have resolution and unification as their main semantic properties. are doing. The computing device according to the invention with the H language is capable of handling resolution and free variables. Patterns for unification in pattern matching and reduction languages Use matching. Eyes in the H language stored in the field of memory cells Target develops the characteristics of parallel existence, serial existence and alternative existence.

The roots of the goal tree are unity, att, appl)', in a sense pa reducibles such as r- and lice (which are often reducible to “nothing”) It is a kind of closure. In function apply (also called @), the first The elements are instructions (+ - * /during) or functions that are directly interpreted by the hardware. This is an identifier that indirectly indicates the closure structure used as a definition, and the rest of the elements are Arguments for instruction/function definitions. As mentioned above, the computing device according to the present invention , which processes a declarative language called H defined by abstract syntax and semantics. It looks like this.

Syntax describes several different abstract objects with the help of representations.

The following basic expressions: port, nothing, alt(list ), par (list), 5eq (list), unify (list) , during (list), cont (v), period (V) ( Here (1ist) is the data element in the destination storage cell containing the formula to which it belongs (el,...e,), where ■ represents a real number) can be used. Wear.

Each storage cell in wired applications of the invention has a limited number of VALUE/DE Since we grow the S field, the list can be stored in several storage cells. object The structure of object memory can be simulated by a program on a general-purpose computer. simulated storage cells contain a varying number of storage fields. It should be noted that you can have or have.

Port: Represents a physical port, that is, a series of It is an indirect element of kind.

NOTHIRLG: A special type of value that represents a contradiction.

Alt...The storage cell containing this formula contains a list element that can be considered an alternative element. .

Par --- The storage cell containing this expression contains list elements that are considered parallel elements .

≦3-...The memory cell containing this formula contains list elements that are considered serial elements .

[Jnify...The memory cell containing this formula is considered to be an element that should be unified. Contains a list element.

During or @...The memory cell containing this formula is A list giving the duration is required. Contains elements.

cont...have an infinite number of minimal behaviors along a distance with length V indicates the amount of space.

period: some extremely short behaviors during a period with duration V indicates the duration of time.

The elements of the above list are stored as values in the VALUE/Dll:S field.

The rewrite function is integrated into a central control unit CU that cooperates with the storage cells. Therefore, This control device implements the rewriting rules. It is rewritten according to the given rewrite rules. Rewrite the syntax expression.

The central controller is preferably a logic gate array, which is used to read stored formulas. , and are connected to provide rewriting operations according to built-in rules. the spot In this case, only part of the tree is needed. Built-in prototyping by acting on combinatorial inputs The structure of a logic gate array that provides a combinatorial output according to Carver Mead, Lynn Conway’ Introduction to VLSI Systems" Addison Wesley Publishing g Company, 1980.

Rewriting rules The rewriting rules are as follows.

(i.e. value nothing is omitted) C@　--e@　) nothing then nothing in a different way Zurakaga flothil’1g then nothing seq ce,,, em) -+ seq cel,, e,) Another way in or if el is the same unify (el,,,,em) -If any of el to e++ is different from the others Become then nothing unify (e + e t e a,, -e -) - unify (el ex)es,.

nothing then nothing When the tree structure stored in the object memory is pasted, the tree structure At least a portion of the information is transferred to the arithmetic device 3. Process this structure in device 3 Other possibilities are discussed below in connection with the specific embodiment of the arrangement of FIG.

The control unit CU reads the TYPE field of the cell closure stored in the unit 3 and Rewrite (i.e. rearrange) the contents of the cell closure in device 3 according to the rewrite rules ), and transfers the rewriting result to be stored in the object storage 1 again. Rewriting When the result is reduced to a value or nothing, the control unit CU constitutes a global exploration of object memory, and a memory frame that represents the father of a reduced structure. Replaces the contents of the field with the value resulting from the reduction.

The following illustrates how to operate using these syntax rules.

Syntax rules not shown in the examples below are very similar to those shown, so Those skilled in the art will be able to easily understand these by referring to them.

Example 1 The first example shown in Figures 10A-10H is a reducible closure. unify(par(l par(1) 3) par(t par(1') 2) 1 (this is a reducible closure for which some parallel unifications should be made) is the unification of parallel values given as . This reducible closure is a parallel structure of unification. It should be rewritten as a structure.

Figure 10A shows the first reducible closure. Figure 10B shows that this reducible closure is This shows how it is stored in object memory. The various parts of the reducible closure are stored The memory cells to be stored are marked in FIG. 10A. The difference between element closure and cell closure The sag is marked in Figure 10B. The cell closure that grows the identifier ld is cl s is tagged (attached). TYPE code in TYPE field unify, identifiers idz, +dj, j (the cell closure that grows L is its A TYPE code par exists in the TYPE field. A center that develops the identifier id+ The file closure has the identifier id as its first two VALUE/Dll:S closure elements, and develop cell closure with id4. These cell closures are tagged by canon has been done. The cell closure with identifier 1d2 has a separate tag djscr. First and third VALUE with values / DES closure element and identifier ids and a second VALUE/DES closure element indicating the cell closure tagged with canon. include. The cell closure with identifier xdx comprises an integer, so discr is the tag The first VALUE/DES closure element is has identifier id4 The cell closure consists of the first and third VALUE/with separate values with the tag discr. DES closure element and a cell that grows the identifier ids and is therefore tagged with canon Contains a second VALUE/DES closure element indicating closure.

As shown in FIG. 10c, a storage cell with a cell closure having an identifier id+ The content of is first loaded into the core cell so that its identification Place the child in the identifier register as idl containing the closure TYPE code unify. Then, the VALUE/DES element as the goal is placed in the main register.

As shown in Figure 10D, sons with identifiers idz and id4 are in pace register. the first VALUE/DBS element is mapped with an identifier. The remaining VALIJE/DES elements are placed in the main register and the remaining VALIJE/DES elements are placed in the register in the column facing the direction. These sons' TYPE Co-Fpar are also the main loaded into a register. The TYPE code is a register located in the TYPE brain. loaded into the tasel.

As shown in the 10th Effl, the contents of the pace register are replaced by 90°, and The result is placed in the first vertical column of pace registers or the main register, and the second vertical Direction columns are placed in rows of pace registers parallel to the main register. identification regis TYPE code par and unify in the main register and main register. exchanged. This is done automatically by the control device. In this way, the page The register would include a father with three sons placed in a row.

Each son is loaded back into object storage using the instruction make. That of As a response from the object memory, the remembered son's identifier is given and the main Memorized in the register. The control unit CU, which is a kind of gate array, or especially the CLOS/ S　IMPLE　-Detects the contents of the registers in the TYPE plane and writes them there. Gives commands according to discovered information (i.e. switches and gates control). Sons are named in sequence after idl Names that have already been reserved will not be used. The order of the names is not important, so feel free to do so. stomach.

As shown in Figure 10F, the first son obtains the identifier id2 and the first son obtains the identifier id8. The second son containing the element closure that occupies gets the identifier xd4, and the third son gets the identifier id get something.

has an element closure associated with a cell closure with identifiers 1dz, ida, lda The father who does so retains his identifier xd+ and is stored in object memory. .

Figure 10G shows reducible closure par(un if y(11) un 1fy(par(1) par(1)) A storage cell storing un1fy(2,3)) is illustrated.

The reducible closure itself is shown in Figure 10H. Figures 10G and 10H are Since it is shown in the same manner as Figures 10A and 10B, no explanation is necessary. .

In Figure 10G, the cell closure unifY that grows the TYPE code unify The cell closure that grows is given the eXec notation in the LAZY field and the identifier id It is also shown that the cell closure with + is given a wait notation. stop The lever is that the cell closure marked with 114XeC has the identifier id + Means it should be executed before cell closure to reduce its contents to a value.

The closure of Figure 10H is loaded back into the core cell at a later point for further processing. can. For example, the cell closure with identifier idz is its VALUE! /D Since the values 1 and 1 in the BS display are the same, the value IJf- will be raised, and the identifier j The cell closure that grows ds must have the values 2 and 3 of its VALUE/DBS element the same. Therefore, it becomes nothing.

Each unification in the preferred embodiment compares the comparator values and controls the result of the comparison. This is done in the numerical value ALU which is given to the control unit CU. Therefore, in that case, the control device configures its logic gate array to feed the information of the core cell first main register. do. When the reduction becomes canonical (simple value) or nothing, it is the second All storage files of object storage operable to store element closures of the type is distributed globally over the field, and each indirect representation for the reduced closure is a direct representation of the above value. This example shows the cell closure containing the insert list. The hardware instruction 1iSt eXpansiorl. This type of command is It is an auxiliary step in the action.

The machine performs demonstration instruction replication called ex, type. this life The command has the following format: %formula%))) can be any kind of instruction, including values and lists, with .

This format is shown in Figure 11A and its cell closure is shown in Figure 11B. Ru. Figures 11A and 11B are not displayed in the same manner as Figures 10A and 10B. Since it has been done, it should be obvious.

As shown in FIG. 11c, the cell closure with identifier id1 is The TYPE code is loaded into the main register of the core cell that grows the loaded into the star. The contents of the second main register are marked with the indirect element open Therefore, the cell closure idz to which it is linked is clear from Figure 11D. Kana is loaded vertically into the pace register as a son.

The hardware instruction 1ist expand then reads the individual value of the third main register. 7 to the position beside id4 in the third base column and above the second main register. Move the list part of the second column to the third column and move the lowest element (value 3) to the third main column. register and give it the TYPE code tist (Figure 11E). 2nd method Since the contents of the in-register have individual values, they have the tag "discr".

A new list expansion is then performed and the contents of the third column on the third main register are column and type 1ist into it. 3rd main register, which is a separate value The contents of is tagged as discr, as is clear from FIG. 11F.

Next, the list in the fourth column is stored in object storage using the hardware instruction make. be remembered. Since it is idle, it is recorded in the storage cell with identifier id2. The identifier idz is stored in the fourth main register as shown in FIG. 11G. is returned to the core cell so that it is stored in the star.

After that, further reduction is performed on ex and type, and the normal result is When given, the reduction result is reloaded into object storage.

Practical example - 1st method Returning to Figure 3, the basic idea of the present invention for boat operation is that each duration Environments 7 and 8 are used as unification in which the signal amount of and Active Object Memory 1.3.

To understand the manner of operation, the following example is given. Contains an input port and an output port The machine provides the squared input signal amount to the output. Therefore, this machine The program to be stored in a") Here, “machine behavior” is the sequence of all possible pairs of inputs and outputs, i.e. In other words, it refers to alt operations that indicate the following types of large data structures.

C に■ Blood m concave (is 3) blood m title (Is 9))...) (瓜(剋MU dent (ig 2) 剋Mu sho(lsa 4)) The input port transfers its value. Once started, the reduction action performed in the core cell will change to nothing. Continuously delete all branches in a change operation, i.e. branches that are not compatible. Ru.

The next Noriduction rule is executed in the core cell. That is, an expression of the form (2 symptoms (blood mucus (qkl t) 0... blood muko (qkn tk)...) nothing or depending on the comparison of signals from the environment and its representation. Side heat (store and (Fumiyoshikan) ((ill　tl)・1. Mushimasa Gensako ((Zl□t1))C 1 Blood plate 1 qkl tk)... Insect-filled melon (qkn tkl...) Take the same amount of time. To start and stop all during operations at the same time Synchronization is required. Another way to rewrite the above equation is to use signals from the environment and the equation Depending on the comparison of nothing or MMC blood (sm (qll-...qxn) tl) (blood) (qkl) ・・・q)cn)tk)・・・・) It is to be rewritten as By using the first rewriting rule in the above example, the following Runi -> Ic style denu @ 工 h1) ...1 tate @ n%) and the equivalent of seq.

The input value is not unified with the corresponding value of the machine. That is, if they are not the same, The result is nothing.

This propagates all the way to the alt action, and the entire branch is removed from the alt expression. It will be done.

contact with the outside world Whether external signals are defined or machine values are defined or not Configure the boat so that it can exchange values to and from the machine according to The advantage of the machine is that it has a simple input boat/output boat system as described above. This is not limited to. Therefore, alternately read and write the boat to that machine. I can write a program to do this. An example of this is the following program It is mu.

concave” (port-machine behavior 0) i.e. (Shi-1 shi 14 tl (hook) 11 tpot l (Mushihiromu output) In this machine behavior, the environment is one value. and during the next interval the machine responds by giving its square. this The method provides complete control over the flow of data in a simple manner.

Device 3 communicates with the boat and continuously stores input from the boat in object memory. It is supposed to be done. The input is an expression like %formula%) given as. When this formula is reduced, the protocol of the central controller CU is This formula can be changed to nothiog or formula % formula depending on the comparison between it and the signal from the environment. %) Rewrite it to . The expression rlew t+ is the new duration, ne! Wq+ is a series of value pairs (second (see figure) is the new signal amount at the i-th interval.

If the signal at the boat has the form shown in Figure 2, then the value q of the signal is The corresponding quantity q in the unify expression is different, or the value tl of the signal is different from the corresponding quantity q in the unify expression. is different from the correspondence t1, the above formula is rewritten to nothing in device t3. . If not, it is rewritten to the unify expression seq expression.

As mentioned above, you can feed a specific signal $ to the unify expression, which can have any value. Indicates that the person intends to do so.

If the value t or q+ (i is any integer) in the formula is $, the corresponding newt+ Alternatively, neWq+ is rewritten by inserting the measured value.

Correspondingly, the signal from the environment is undefined, while the values t1 and For certain values of q and q, the signal strength is The digital/analog converter Contest is given as q, and the other 5 eq set neJf+ and mouth e! Wq+l equals the value 1 of the unify expression, and q, becomes the same as

Additional H language constructs All possible behaviors that can exist can be described according to the system described above. It is. Unfortunately, programs can become extremely large. Things like this Larger language constructs may be inserted to handle the situation. Those things The most important ones are symb and lambda.

and appty.

The complete syntax in H language is the following syntax expression:% expression%) These syntax expressions are given as operators in encoded form in the TYPE field of the storage cell. It will be done.

Therefore, each expression is an operator stored as a formula in an object storage cell, and ( Each element in list) is a list element indicating a behavior, n is an integer, ■ is a real number It is. Each element is a storage field in a storage cell containing the above formula to which the list belongs. can be memorized.

The formula cont(v) (where v is a real number) is an infinite number of differentials along a distance with length V. Indicates an amount of space that has a small amount of behavior.

The expression period(v) (v is a real number) is an infinite number of extremely short periods of duration V. is the duration of the behavior.

The formula delta is a behavior that has spatially minimal (atomic) expansion and infinite duration. A is shown. The formula aettat represents the temporal expansion of the minimum (atomic) and the infinite spatial expansion. have

expressing quantities as a combination The integer expansion of the space can be encoded as a delta par in the following way.

0l-z() 21Xz (delta dslta) At 5% (delta1 delta deltat delta delta) An integer expansion between can be similarly encoded as a concavity of defeat.

Thus, the integer (diser(n)) is a kind of uniform combination of atomic units delta It is expressed as

A very important use of quantities is as elements in during operations. This behavior In , quantities are used to refer to both time and space. Therefore, delta A time correspondence of delta called t is used.

delta is atomic in space but infinite in time; delta is spatially It is infinite, but atomic in time.

The above expressions are stored in object storage in a manner similar to syntactic expressions.

The program as a "language", the expression machine with a' is all inserted expressions Almost Ilr/! I-wise reduce it to that value. For example, the formula apply (* par(24)) directly reduces to the value 6. This causes the program to You cannot access it as soon as it is tolled. run that program It is not possible to break it down into parts and perform calculations on those parts.

To enable such strategies, passive constructs corresponding to the base language are introduced. . These are called program formats. They are reduced to themselves (canonical) and Therefore, it remains as it is. Therefore, it can be broken down into several parts.

The function plusrevarg can be defined as follows.

(If given in the program format corresponding to the above program, 'appxy (+par (24)) gives ten arguments set in reverse order par (42) ).

Standard functions are used to convert stored program formats into corresponding programs. The number eval is used. In this way, the program is copied and the blip (bl) ip) is removed. Then the program naturally reduces further to that value.

1 animal 1! (1! grave h(eval)'J4u! (+ m(24))) turtle escape 1y( 10W(24)))-6 Due to the possibility of decomposing the program format, the program can be This makes it easy to “reason over” for any kind of other language using a machine that has the H-language as its base language. It becomes easier to write interpreters and compilers that use

As a general rule, all constructors (e.g. delta, par) is a verbal element (delta, par) that specifies the program format. For example, deca, par) has a second format preceded by 4''.

It is important to note that only the actual constructs are in program form, not the entire tree. Ru. To specify the entire tree as a program, all generation functions must be marked with “”. need to be marked.

The list of program formats (having a') does not include anything. If so, the expression is converted to nothing.

forming a program The mechanism required to make a definition such as the definition of sqr is as described above. death However, we need a convenient mechanism for forming programs as combinations of small definitions. It is.

We want to establish the program as a main formula with some auxiliary definitions. child This is done with the help of can(list).

■ and n are the same integers) Coil (Yet ex es,,,e,) This structure is equal to the first element V has a new value. However, if the list is empty or one of its elements is missing, Whether the visible element is a combined value for a free variable or a constant value for nothing It can be used as a compulsion.

The rewrite rule for can is Regarding all rules, this rule is active memory 1.3 and central #1! Between II device CU It will be incorporated as a cooperation between

Na[ Something is a forward motion if something else is not a forward motion. To show that neither of the above configurations is available, the "negative" aspect of the expression is often The construction for the ``negative'' aspect of the expression is much simpler than the ``positive'' aspect of the expression. pri is added.

The reduction rule for pri is that the value of Chengzue is the first element that is different from nothing. That is. If there is no such element, the animal is nothing. Ru. Therefore pri (nothing nothing 9 nothing 78)=pri　(e+　ex), if el is not forward motion, then e, It can be interpreted that the following will be used.

The pri configuration is similar to the alt configuration. It is a - group behavior, but only In reality, behaviors are in ordered sets. The first behavior is squirrel The first behavior is the second behavior, and the second behavior is the second behavior.

Priority orders used in traditional languages and machines for process scheduling It is important to note that similar to the concept of place, pri has nothing. It is. Instead, it is used to fulfill negation through failure.

The rewriting rules for prf are as follows.

Nagi0 ->ru3tMng 匡(viewthij19z　---nothing,)　->nothin9凪(n othingl---n13thij19-1@to, , , @n) ->@ This rule also applies to all rules between active storage 1.3 and central control unit CU. Incorporated as a collaboration.

Scope rules A range is a literal environment in which all occurrences of the same symbol represent the same semantic entity. . Range rules determine whether a generating function introduces new ranges and, if so, what new ranges it introduces. Describe the method. The H-language has the following scope rules.

1. Generation functions par, seq, alt, @ and unify are new Do not introduce ranges. This means that all occurrences of the same symbol in an expression refer to the same entity. It means to represent.

2. The generation function lambda (alternative pattern) introduces a new dependent range. top All occurrences of the symbol in that rule that are not mentioned in the range belong to the new range Ru.

means that the same symbol appears in the rule generation functions surrounding the hide generation function. represents the same entity.

ide When extension programs occur, it is necessary to use the same symbols with different meanings. It becomes important. This can be done by providing a generating function (hide) that introduces a separation range. It will be realized.

The most important concept of hiding is mainly the use of purpose and the definition of that purpose. used to separate The user of the computing device according to the invention can You will find in the concepts of program packages, libraries and implementations.

The H language defines a hide generation function hide(e). it's behavior Define. Free functions used inside and outside the function are separated. i.e. each other becomes invisible. This feature of the H language generally depends on the data format and some Unlike other kinds of languages that export symbolic names. Such names are I can not use it. This means that the wide symbolic domain is actually can be extensive and can be seen within a complete or limited set of them.

A typical program package is m(ILJkqS　S　　),-(,,,l0cJII　1amntatio n, , , ); It grows patterns starting with pkg. Define the rules that apply and leave the rest undefined. This is for alternative rules It is simply a definition of a rule whose local symbol is unknown.

The library supports H language concepts using parameters to select one or several rules. It is a package that can be stored. It is executed as follows. In other words, the back side of h is empty. ( Base 1 (laaida-rule a-, a-speclauabda”r The ulm b--b-spec library is an alternative that includes rules. pattern" rulea" is used to select program a 5peC. It can be any Although it may be defined as a generation function, it is generally an abstraction or a rule.

As demonstrated above, the H language specifies the necessary software engineering concepts. This is an elegant way to determine The H language has a new language generation function for this purpose. There is no need to introduce it.

Note that only "old de" affects how ranges are handled.

ambda The expression lambda (e g e pi ... e p-) has element e and ep+" ...This is a rule that expresses the replacement of e, . e.

(e　e　mrgl　”　”　””e　mrgl) corresponds to each ep+ If we unify e, , , , it will be replaced by e in the reduction operation, otherwise If not, it is an application that is replaced by nothing.

Assume that a numerical instruction is executed. + for numerical commands.

-, *, /, during, etc. The command is followed by an argument.

In this example, addition of numbers in a list is performed.

The machine is The format apply (+1ist (12)) is called apply. Perform a reduction.

Its application is shown in FIG. 12A and its cell closure is shown in FIG. 12B. No. Figures 12A and 12B are drawn in the same manner as Figures 10A and 10B. There is no need for an explanation.

As shown in Figure 12C, the cell closure with identifier id+ has that identifier The TYPE code is coded in the main register of the core cell, and the TYPE code is in the identifier register. loaded into. Numerical instructions (+) are marked as 1nstruction. . The contents of the second main register are tagged as indirect elements, so it is The linked cell closure is in the pace register as evident from Figure 12D. Loaded vertically as a son.

Next, list expansion is performed, and the second main register individually grows the identifier idt. This is because the machine performs the same operation no matter which of the 2.3.4 elements the list has. . Since there is only one element in the new list, the machine marks 1ist as the As shown in Figure 12F, an indication that the main register contains a value in disr. Replace with

The main register then has an instruction mark (+) and two separate values, which include Therefore, the control device in which the command is stored controls the numerical ALU to issue the command (addition). and store the result of the numerical operation in the first main register as shown in Figure 12G. be transferred as a normal value. The notation appty in the TYPE code field is applicable to the function. It should be noted that it is marked as being used. Result value, in this case The simple value 3 is distributed globally to exchange this value with each occurrence of the identifier id+ be done.

Rewriting rules Rewriting rules specify certain expressions that are the same. The rewriting direction is related to these rules.

A simpler expression occurs when following the rewriting direction. Rewriting the expression to a simpler expression When it cannot be done, it is normal. Thus, the computing device according to the present invention The position will use rewriting rules to rewrite the expression into a more regular form.

In addition to the above rewriting rules, the central processing unit CU also embodies the following rewriting rules: .

Express the expression for I, el, em are squirrels This is an element.

type cel,,, aH(Ci--, ck)-,, L) → alt (Box Cer---Cr---em)-9, Box (el,,,C,,,e, )) Here the box is par (list) to unity (list) (alt The formula for the list up to (excluding list) is e1. e,,c l + c.

It is a beamist element.

(if it is an expression) set (alt (el,,, em)) -+’alt (e,,,, , e, ) where el, , e is in any specific order With the elements given in the introduction, el-ear is given in the allocation order. available.

lambda(el,,,e,)”par(el,,,e,)app ly　('att　(bl,,,b,)a=,,a,　)→apply( Vomit 11. t・Concave (bl,,,b,　ag,,,a,)apply　(par　(bl,,, b,)at,,a,)-+nothing, in the above formula IJ) all bl and Yes, n#m or any at g bl (for ill )in the case of appxy (par < bl, -ha) am,, a, ) → bl, the above formula list smell All of them and al are skin (list) to appxy (list) is the formula that leads to n's or all a, =b.

If (for i>1) appty (seq (t)+, , b,) a=,, a,) te no bl and Yes, n#m or any at #bl (for i>1 )in the case of appty (seq cbl,,,b,)am,,a,)→bl, above expression list smell All of them and al are It is an expression from par (list) to 'appxy (list), n#m or all al=I)1 If (for i>1) Converts the expression in value format (without the “′”).

Only the tallest structures are removed.

eval-*+,’type(a) → type(a), where type is pa unifY from r (list) (list) (alt (except for list)) express the expression for vinegar contains an element S, which element S is a storage file belonging to a different storage cell of the storage cell. may be stored in fields, the storage cells of which may be arranged in various ranges, All identifiers S are within each range exhibiting the same behavior.

Discr pulses The expression discr(n), where n is an integer, is a parallel behavior with n atomic behaviors. Indicates hevia. The expression pulses(n), where n is an integer, has n atomic behaviors. This shows the temporal chain of A.

The following rewriting rules should be used:

To demonstrate how the extended syntax can be used, an alternative Reading and writing programs can be provided in a simpler form. First, individual The value of l.

The notation 5quar (sqr) for 2 and 3 can be expressed by the following short program. Defined as

1 breath (anal lie (aqr) lice to n eyelids (113L! lie package (42) - lie package (93)] (stored in the closure tree of object memory 1).

"Machine behavior" can be written as a unique seq.

! 41;! (”””9(”　”)”””;(”Ayu Takumi (symb(sqr) ”) (during (is r) ri, , , ) This seq operation is not rewritten to the above alt operation during execution. It will be done.

Even the program is the same length as the input data. Handle this in a sophisticated manner. How to do it (some functions and standard alternatives in hardware) or as software loaded with the program in question. Ru.

An example is multiplication (X), a program where it is easy to square the value a with the help of this standard operation. It can be written as ram.

unify(syo+b(sqr) lambda(symb(a) appl y(z par(symb(a)symb(a))))) This program squares all numbers defined by the hardware.

A small The above rules may be used to write recursive programs. No hardware required expansions are omitted. This is co-pending application PCT/SE 91 This is done by using a core cell of the type described in 100514. good.

Cultivate opportunities to implement written rewrite rules and use behavioral unification. Computing device behavior with a declarative method explicitly specifies elapsed time ordering. Identified by the ordinal sequence. Temporal description is somewhat like a symbolic language.

Making programs more readable The abstract syntax is extremely simple. Unfortunately, this doesn't make it particularly readable. There isn't. More complex syntax is introduced to make programs easier to read (human (I don't want too low a complexity.)

This conversion can be done in many ways. However, in both textual and pictorial form It is natural to have it.

ault The hardware can detect that a value is incorrect, for example by using the parity pick of a calculated value. When detected by checking for faults etc., an error indication is given. the , the expression backup is used.

If such an element is not there, bachup will be nothing. .

The rewrite rules for backup are: -Track 4□->fault - Fau four (faultl　---fault,) -> fault ltl---fault k-1ek""n) -->ek Regarding all rules , these rules or active memory l.

3 and the central control unit 11CU.

Display in various languages As is clear from the above, the H language has several representations. − The H language has a core Haka which is an abstract language in which representations of sets are used. . The main language indications are as follows.

H158...This linguistic expression is the most basic one that can be used outside of formal definitions. Ru. This is completely declarative. However, it is important to develop a syntax that is readable by the user. do not have.

HI　a　l　l...This language is used to indicate hardware errors in computing devices. This is H a b a expanded by the configuration that forms the ridge. This language is Not verbal.

Instead, the result is a probabilistic value. This representation is different from all other language representations. This is the underlying root language representation. Does not have a user-readable syntax.

Hs　m　a　r　...This linguistic expression is established for integers and real operations. set, and augmented with operators for numerical and structural operations. It is Tam11. The language display Hw s * r develops a user-readable syntax. not present. This representation is an abstract language visible to the user.

Ha　a　e　l　1　...All syntax except for the most common expression using insertion syntax This is a language representation using normal ASCII characters and affix notation for .

Although the invention has been described with respect to particular embodiments, the true spirit of the invention Various modifications are possible without departing from the It will be understood by those skilled in the art that this is possible. In addition, the main aspect of the present invention Variations may be made without departing from the teachings.

FIG2” FIG. 8A All registers FIG, 8B II@Register FIG, 8C Simple I or Mechanical sashiko Lebel II 2L, bell structure FIG, 6 FIG.7 FIG, 10B FIG, 10CFIG, 10D Fl(3,10E Fl(3,10F death [ [- FIG, 10G F old 11B FIG 11CFIG, 11D To admire objects/l FIG, 12A FIG, 12B Summary book The present invention comprises a plurality of records, each of which carries information capable of causing the execution of an action. active storage means (cu, 1) comprising storage cell means (2), connected to said active storage means; at least one boat device (4, 5, 6) and said at least one port a computing device comprising at least one environment means (7, 8, 9) connected to the Place.

international search report l”--A---- PCT/SE 91100517I, lkr*mr-^ -1-, dynamic PCT/SE 9110O517

Claims (1)

[Claims] 1. In a computing device a) active storage means (cu, 1) comprising a plurality of storage cells each having information capable of causing the execution of an operation; b) at least one connected to said active storage means; said computing device, characterized in that it comprises one port device (4, 5, 6) and at least one environment means (7, 8, 9) connected to said at least one port means; . 2. In claim 1, the signal sequence applied to the port means (FIG. 2) and at least means for comparing in said active storage means the sequences which are also stored in one storage cell and have a possible undefined sequence element ($); nothing) suna In other words, a computing device characterized by comprising means (cu, 3) for rewriting the comparison series into something that represents a contradiction and, if not, rewriting the comparison series into a specific series. 3. In claim 2, the comparison means includes at least one of the predetermined number of list elements. A computing device characterized in that a comparison is made for a group containing two elements. 4. 3. A device according to claim 2, comprising means (3, during; 7, 8, 9) for providing the signal sequence as a sample signal (FIG. 2) which varies over time and has individual sampling periods, the signal sequence comprising a group of elements. A computing device, wherein each group includes a connection time and at least one signal amount during that time. 5. 5. The computing device according to claim 4, wherein the predetermined number of list elements in each group are provided in pairs, each pair including a combination of time and signal amount. 6. 7. According to any of claims 1 to 6, one of the ports is synchronized with at least another of the ports, and the amount of signals from the port is synchronized during each duration. A computing device characterized by comprising means for displaying columns. 7. In any one of claims 1 to 6, the storage cell means has an abstract syntax specification or The computer program is stored as a structure in the active memory in the form of an implicit or implicit encoding, and the syntax describes several different abstract objects with the help of expressions, each The storage cell means is capable of storing at least a portion of one said syntax expression in the form of suitable data and/or program structures. The computing device. 8. In claim 7, the various formulas also indicate that they are in program form. has a corresponding kind of expression, and every program form reduces to itself. A computing device characterized in that the formula is such that the formula remains unchanged. 9. 10. The computer according to claim 9, characterized in that it comprises means (cu) for cooperating with said storage cell containing a syntax expression and rewriting said syntax expression according to a predetermined rewriting rule. Calculation device. 10. In claim 9, the syntax is the following basic syntax expression: port, nothing, alt(list), par(list), seq(list), unify(list), during(list), coon(r) oh and period(v), where (list) is a list of data elements (e1...en), each element corresponding to a list in said storage cell. If there is space for the list, it is stored in the storage field of one of the storage cells containing the formula to which the list belongs, otherwise it is included in at least one of the storage cells that has a link to the storage cell containing the formula. , v are real numbers, and the list of during (list) has the following elements: cont(v), period(v) and and an arbitrary value ($), the expression port represents one of said physical ports and is a special kind of indirection element, nothing is a special kind of value representing a contradiction, and alt represents this expression , where the storage cell containing this formula contains the listed individual elements that are considered alternate elements, and par represents the storage cell containing this formula that is considered a parallel element. seq indicates that the storage cell containing this formula is directly unify means that the storage cell containing this formula contains listed individual elements that are considered unifying elements, and duning means that the storage cell containing this formula contains listed individual elements that are considered unifying elements. cont(v) is an infinite number of minimal lines along the distance including the length v. said computing device, wherein period denotes a spatial quantity with a movement, and period denotes a duration with an infinite number of very short movements during the period with duration v. 11. In the computing device according to the combination of claims 9 and 10, the rewriting rule is: nothing → not hingalt(e) → ealt(e1. ．． ．． nothing. ．． ．． en)→ alt(e1...en) (1.e., that is, nothing is omitted) alt(e1. ．． ．． alt(c1...ck). ．． ．． en) → alt(e1...c1...cx...en) par(e1...en) → nothing (if any of the values e1 to en is nothing) par(e1...alt( c1..ck)..ex) → alt(par(e1..c1..ex)..par (e1..ck ..en)) par(e1..en) → par(e1..en) In another way, seq(e1...en) → nothing (if any of the values e1 to en is nothing) seq(e1...alt(c1...ck)...en) → alt (seq(e1..c1..en)‥seq(e1..ck ..en))seq(e1..en) → seq(e1..en)Unify( ) not hing9unify( e) eunify (e1 e2) → e2 (if e1=e2) unify (e1 e2) → nothing (if e1 is different from e2) unify (e1 e 2 e3...en) → unify (unify (e1 e2 e3) ...en) unify (c1. ．． ．． en) → nothing (if any of the values e1 to en is nothing) unify (e1..alt(c1..ck)...en) → aalt(unify(e1..c1..en).. 12. the computing device including a plurality of unify(e1..ck..en)) 9. The computing device of claim 8, wherein said syntax includes at least one expression from the following: [there is an array], and each syntax expression is associated with said one object storage cell. is an operator stored as an expression in the list, each element in (1ist) is a list element indicating one action, n is an integer, v is a real number, and each said element is the one to which the list belongs. is storeable in a storage field in a storage cell containing said formula containing said formula cont(v) is a spatial quantity containing an infinite number of minimal actions along a distance having length v; and said formula period (v) is a duration with an infinite number of extremely short actions during a period with duration v, and while the above formula delta indicates an action with atomic space extension and infinite time extension, the above equation deltal is atomic time expansion and infinite sky The expression par(list) is a memory cell containing this expression. The formula seq(list) indicates that the storage cell containing this formula contains the listed individual elements that are considered to be serial elements, whereas The expression alt(1ist) indicates that the memory cell containing this expression contains an alternative element. The expression nothing is a special unit value that represents a contradiction, and the expression con(list) indicates a list that has at least zero but also has some behavioral elements. contains all elements in that list. is normal and different from nothing, is identical to the first element of the list, and the expression pri(list) contains a list that has at least zero but also has some action elements, and that list that is not nothing The formula unify(list) is the same as the first regular element of Indicates that the element ea contains the listed individual elements that are considered elementary, and the lambda(ea eD1...epa) indicates that the element ea is replaced by ep1...epn. The formula apply(list) is a rule that indicates that the first element is Number commands (+-*/, etc.), the remaining elements are used for numerical operations as arguments. On the other hand, if er is lambda (en ep1...epn), the above formula apply(er eargl...eargn) will be changed by e■ in the reduction operation if each ep1 is unified with the corresponding ea rgl. replaced, otherwise This is an application that can be replaced by nothibg if has an element s which becomes an identifier when the storage cells are defined to be arranged in various scopes, all identifiers within each scope represent the same action, and n is an integer. The expression discr(n) indicates a spatial property with a number of n actions, and the expression pulses(n), where n is an integer, indicates the duration of atomic actions. 13. In the computing device according to claims 12 and 13, the rewriting rule is as follows: type(e1...nothing...en) → nothing, where type is from par(list) to 'ap Express the expression for the list up to ply(list), e1. ．． en is a list element. type(e1...alt(cl...ck)...en) → alt(tyre(e1...c1...en)...type(e1...ck...en) ) Here, type is an expression for the list from par(list) to unity(list) (excluding alt(list)), and is e1, en. c1, ck are squirrels This is an element. set ( ) → nothingset (a) → 'alt (a), (the above list set(alt(e1...en)) → 'alt(ea...en), where a is an expression from par(list) to ′a pply(list) in e1. ．． en are elements given in any particular order, ea. ．． em is given in the allocation order. set(e1...en) → set(con(e1...en)) lambda(alt(e1...en)) → set(alt(e1...en)) lamba(e1...en ) → par(e1...en)hide(alt(e1...en)) → set(alt(e1...en))hide(e1...en) → par(e1...en) apply( ) → notingapply(e) → evalxeia(e)apply('alt(b1...bn)a2...am) → apply(evalmaia'alt(b1...bn)a2...am)apply( par (b1,...bn) a2...am) → nothing, (in the above expression list, all b1 and a1 are expressions from par(list) to 'apply(list), and n#m or any a1#b1 (for i>1)) a pply(Par(b1...bn)a2...am) → b1, (In the above formula list, all b1 and a1 are par(list) to 'apply (list), and n#1m or are all a1=b1 (for i > 1) apply(seq(b1...bn)a2...am) → nothing (in the above expression list, all b1 and a1 are from par(list) 'apply(list), if n#m or any a1#b1 (for i>1)) apply(seq(b1...bn)a2..am) → b1, (In the above expression list, all b1 and a1 are expressions from par(list) to 'apply(list), and n#m or all a1=b1 (for i>1)) Function evalma in converts an expression in program form (ie, with the "'") to value form (without the "'"). Only the tallest structure has the "'" removed. evalmeta'type(a) → type(a), (this Here type is from par (list) to unify (list) (excluding alt (list)) which represents the expression for the above list) con( ) → nothingcon(e1...nothing...en ) → nothingcon(e1...en) → e1pri( ) → nothingpri( nothing1...nothing) → nothingpri(not hing1...nothingk-1 ek...en) eLpar(de ltat1...de ltan)→discr(n)seq(deltat1...delt atn)→pulses(n). 14. 14. A computing device according to any of claims 1 to 13, in which each storage cell has the following enumeration: a mark indicating whether the formula of said cell is to be simplified; that is, a mark indicating whether the expression is a member of properties of the expression, and an indication of how the expression is generated. mark indicating whether the expression constitutes some repeated action, and and a mark indicating whether the expression is part of a list with other list members stored in separate storage cells. The computing device characterized by: 15. A computing device according to any one of claims 1 to 14, wherein the object memory In the storage means, a computer program is stored in the form of an explicit or implicit encoding of an abstract syntax and also the semantics of the reduction rules with respect to this syntax. The computing device characterized in that it includes means for enabling. 16. 16. The computing device according to claim 15, wherein the semantics comprises a number of rewriting rules, each rule having one expression and one group of values, each value of the group being different from the other values of the group. , meaning that it is equivalent to and interchangeable with it. 17. 17. A computing device according to any one of claims 1 to 16, wherein Computing device as described above, characterized in that it includes a storage cell with the same functional structure as the storage storage cell, but is of read-only type and is provided with predetermined functions and standard substitutes. 18. A computing device according to any one of claims 1 to 17, comprising a continuous error check. Then, the next rewrite rule backup( ) → faultbackup(fault1...fau ltn) → faultbackup(fault1... ．． faultk-1 ek. ．． ．． en) → Has backup performance that follows ek. The computing device characterized in that: