JPH05505297A - Apparatus and method for generating quadrature signals - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] Apparatus and method for generating quadrature signals Field of the Invention TECHNICAL FIELD This invention relates generally to signal generators, and more particularly to differential quadrature signals. a signal generator that provides signals and maintains these signals in exactly 90° phase relationship. related.

Background of the invention A precise 90″ phase relationship with a high degree of accuracy allows the quadrature modulated transmitted signal and Required for quadrature demodulation of the received signal. Two such quadrature systems includes a single sideband-wave mixer and a coherent detector. ideal single mixer The output of consists of the desired carrier frequency and image frequency. two ideal Image frequencies can be suppressed by using a single mixer in a quadrature modulator configuration. Wear.

Displacement from 90° results in incomplete suppression of image frequencies and modulator or demodulator equipment. This causes deterioration of performance.

In general, traditional quadrature signal generators rely on tolerances of the components that form the circuit. It has a precision tolerance of Is high accuracy of component values difficult to achieve? , the quadrature phase differs from the ideal quadrature phase.

Traditional quadrature signal generators typically handle a wide range of amplitudes and different harmonics (h a　rmoHi　c) Accurately detect quadrature states with input signals having content I had a problem with it. They are also quadrature over a wide range of frequencies and temperatures. There were problems in accurately maintaining the phase state.

Another problem is that the amplitude and shape of the phase-shifted signal differs from that of the non-phase-shifted signal. produced by generating a pair of quadrature outputs so that the amplitude and shape of the signal are equal to the amplitude and shape of the signal. Ru.

Still another problem is how to generate a quadrature signal that is well suited to drive a balanced mixer. This was due to the difficulty of realizing a biomedical device. Balanced mixers have different accompanying circuits. better supply rejection and and better accuracy.

Therefore, a formidable challenge lies in developing precise quadrature signal generation to overcome the problem conditions mentioned above. It is to devise a living organ.

Brief description of the drawing FIG. 12 is a block diagram of a phase-locked precision quadrature signal generator constructed in accordance with the present invention. It is a lock diagram.

Figure 2 shows the voltage controlled phase included in the phase-locked precision quadrature signal generator of Figure 1. FIG. 2 is an electrical circuit diagram showing a shift network.

FIG. 3 shows the exclusive OR positions included in the phase-locked precision quadrature signal generator of FIG. FIG. 2 is an electrical circuit diagram showing a phase detector.

Summary of the invention The device generates in-phase and quadrature signals from differential input signals. Differential quadrature signal The signal is generated in response to a differential input signal. 90 between the phases of said differential quadrature signal Fluctuations from ° are detected. A control signal is generated in response to this detected variation. . The phase of the differential quadrature signal is adjusted in response to this control signal.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The present invention can be advantageously utilized in transmitters or receivers requiring quadrature signals. can be done. Preferred embodiments of the invention are particularly suitable for driving balanced mixers. suitable for A balanced mixer configuration is suitable if the accompanying circuit is also balanced. It has the advantage of giving better power rejection and better accuracy. balance Differential control of in-phase and quadrature signal components by taking advantage of the mixer configuration The processing is realized by a quadrature signal generator as described in the preferred embodiment. .

Low pass filter, voltage controlled phase shift network, limiter, novel precision exclusive a digital OR phase detector, a second low-pass filter, a precision voltage-to-current converter, and The use of phase-locked loops using loop filters and loop filters is Brings improvements to biological organs. Utilizes the advanced Bj CMO8 manufacturing process This makes it possible to configure all functions of a phase-locked loop on the same integrated circuit. Become.

The B1CMOS processor combines the advantages of bipolar and CMO3 technology.

Does the invention include the attached drawings? You can understand it more clearly by looking at it. According to the invention A phase-locked loop 1 that generates differential in-phase and differential quadrature signals configured as A block diagram of 00 is shown in FIG. Differential quadrature signal, (1°1’) or and (Q/Q”) are the low power in a quadrature modulator using a balanced mixer. can be used as a normal oscillator input or to direct quadrature modulated radio signals. to downconvert to baseband in a converter receiver. Can be used. The differential input signal, (v, v’) is the filtered differential signal, (v/v ') is applied to the low-pass filter 101 to generate the signal. differential input signal, (V.

v') are each an AC signal component 1800 out of phase with each other and the same DC signal component. has. The low-pass filter 10t is present in the differential input signal, cv, v'). By filtering out any second harmonics present, the phase-shifted signal or and contributes to waveform matching of non-phase shifted signals.

Filtered differential signal, (v, v') is voltage controlled, phase shift network 10 3, the voltage control, phase shift network 103 is coupled to two pairs of differential phase shift networks 103. Generates the foot signals, (X, X') and (Y, Y'). differential phase shift The signals, (x, x'), are 1800 degrees out of phase with each other, and similarly, The differential phase shift signals, (\, Y'), are 180° out of phase with each other.

The phase difference between multiple pairs of signals is the control voltage■. It is a function of NTL. Differential phase shift signal No., cx, x') and (Y, Y') are then the same limiter 105 and 107 and differential quadrature signals, (1, I’) and (Q/Q”) , generates. Limiters 105 and 107 provide differential quadrature signals, (I, I’) and and (Q/Q') have approximately the same waveform and amplitude. correct These differential quadrature signals with a 90° quadrature relationship are used in the transmit and receive circuits. Used to drive roads. These differential quadrature signals also provide novel precision coupled to an exclusive-OR phase detector 109, the exclusive-OR phase detector 109 is The detected differential output has an average DC value that is proportional to the phase error from the quadrature phase. , (X OR.

XOR'). The second low-pass filter 111 is an exclusive OR phase detector 109, the detected differential output, (XOR, XOR'), Extract the average DC value from. The second low-pass filter 111 has two DC levels. precision to determine the difference in the opening of and convert the result to a current signal in line 114. Coupled to a voltage-to-current (V-1) converter 113. The loop filter 115 is Converts the current signal on line 114 to a voltage control signal, vCNTL, and maintain the stability of the loop. The control voltage, VCNTL’, is the voltage controlled phase shift voltage. It is fed back to the network 103 and output to the limiter 105 and i-07. , a differential quadrature signal, with precise quadrature between (1, I’) and (Q/Q’) Maintain angular phase relationships. This phase-locked loop is similar to that of traditional voltage controlled oscillators. Unique in that it uses a voltage controlled phase shifter (VPS) rather than a voltage controlled phase shifter (VCO) It is a sexual thing.

The amplitude and shape of the phase-shifted signal is the amplitude and shape of the non-phase-shifted signal. The problem of generating a pair of differential quadrature output signals so that they are identical to each other is phase locking. This is overcome by using a combination of components in the loop 1°O. Voltage The controlled phase shift network 103 stores its input amplitude and outputs multiple pairs of differential phase shifts. The fundamental wave components of the foot signal, (x, x') and (Y, Y'), have the same amplitude However, if the voltage controlled phase shift network 103 If the differential input has harmonic components, (X.

The harmonics in the X′) signal are phase shifted by more than 90° and have a shape and ’) The zero-crossing slope of the signal is made different from that of the (X, X’) signal.

The limiter has a differential phase shift signal of the limiter, (I, I') and (Q/Q'), The amplitude distortion is corrected so that the waveforms are almost the same. Voltage controlled phase shift net The low-pass filter 101 preceding the workpiece 103 also receives differential input signals, (v, v' ), which contributes to waveform matching by removing any second harmonics present in the dedicate The second harmonic distortion is the differential quadrature signal, (1°I’) and (Q/’Q ’), as well as disturb their duty cycle by 50%. Make sure that the cycles are not aligned. Matching the waveforms converts these signals into precise Used as a local oscillator in balanced mixer applications that require image cancellation. This is essential when used in

The quadrature phase shift signal in the filtered differential signal, (v, v’), is generated using a voltage controlled phase shift network 103 shown in FIG.

The phase shift is driven by a differential transistor amplifier in a double-ended configuration. This is achieved by a bridge RC configuration. Differential phase shift signal, Lapra of Yl The conversion is Y (s) = X (s) [-5RC/ (1+5RC) + 11 ( 1+5RC)] -X (s) (1-sRC)/'(1÷5RC) In this case, (1,-s RC) / (1+ s RC) is a free value in steady state. The Laplace transform for phasor 1/-2 arctanY' is -Y (s) = X (S) [SRC/” (1+5RC) -1/ (1+5 RC)] = X (s) (1-sRC)/(l+5RC) As above, this can be expressed by the facer X/90 in the steady state. Can be done. For a sinusoidal differential input signal, the differential phase shift signal, (Y, Y’) , is the differential phase shift signal, (X, X'), if w=1/RC, It is at 90°.

The problem of dividing a signal into quadrature components whose phase can vary around the ideal quadrature In order to solve the problem, PMO3) transistors 201 and 203 are linear (resistive) The voltage controlled phase shifter is biased in the region. PMOS gate voltage is can be varied to give a phase shift. PMOS transistors 201 and 20 3 also addresses the problem of accurately maintaining quadrature over a wide range of frequencies and temperatures. help solve problems. Application operates on only one frequency However, the required sensitivity depends on the tolerance of the R and C elements in the bridge. must be large enough to cover the Additionally, if the differential phase shift signal, If (x, x') is not a pure spectral line, the harmonic phase shift is 9 Unlike 0°, [-2*jan’-(n*w RC), “n” is the harmonic number ], which results in a zero-crossing phase error of several tens of degrees from quadrature when wo = 1/RC. arise. The feedback nature of the loop corrects this, but the sensitivity of the phase shifter is large enough that the loop compensates for this error due to impurity of the input vector. must be able to do so. Initially, the entire system was built on an integrated circuit and It is possible to use NPN emitter base capacitance as the voltage variable element of the phase shifter. Although considered, the typical capacitance vs. voltage relationship for this junction is C” Co/(1 +v) 0.55. The nominal sensitivity in this case is -b approximately 12°/volt, which accounts for all resistance and capacitance tolerances and temperature. Not sensitive enough to cover worst-case variations. PM operating in resistance region Further improvement in the use of OS transistors 201 and 203 as voltage variable elements full functionality with improved sensitivity and taking advantage of the advanced B1CMOS process. realized on one integrated circuit. Adjusted by voltage control signal, ■CNTL , PMO8I - the gate-source voltage of transistors 201 and 203 is Rds- It is expressed by 1/(μ*COx*W/L*(■gS−■, )). PMOS The nominal sensitivity using transistors 201 and 203 is now about 100°/volt. Become. This not only covers resistance and capacitance tolerances and temperature variations, but also , allowing phase-locked quadrature operation over a large range of input frequencies.

Precision exclusive-OR phase detector 109 is shown in more detail in FIG. Existing Improvements to the design include differential quadrature input signals, (I, I') and (Q/Q') This is due to the same delay being provided to , which detects the quadrature state This is an essential characteristic for For example, at 100Mhz, a phase error of 1 degree The error corresponds to 10ns/360=0.0278ns. Two standard current modes A code logic (CML) exclusive-OR gate is represented by XOR,]- and X0R2. It will be done. The first exclusive OR gate, XOR'1, consists of six NPNh transistors 30 1 to 306. The second exclusive OR gate, XOR2, has six NPN gates. Represented by transistors 307-312. diodes 313-316 and The current sources 317-320 are transistors (305, 306, 31, 1, 312). Provided to keep them operating in their active areas. two exclusive The OR gates, XOR1 and XOR2, are differential common mode signals, (1,1'), The upper transistor pair (NPN transistors 301-30 4) and also the bottom transistor pair (N PN transistors 311 and 312) are connected in parallel.

At the same time, the differential quadrature input signal, (Q/Q'), is connected to the second gate, XOR2 , coupled to the upper transistor pair (NPNI-transistors 307-310) of and also the lower transistor pair (NPN transistor) of the first gate, XOR1 305 and 306) in parallel. ] One signal or upper transistor pair The time to propagate to the output signal, (XOR, XOR'), detected from the input of The output signal detected from the other signal or the lower pair of human power, (XOR, XOR'), The typical delay of a standard exclusive-OR case caused by the difference in propagation time to The imbalance has been removed. Each signal now passes through the upper and lower pair and The average delay for each signal is the same.

The preferred embodiment has differential input signals, (1, I') and (Q, Q'). discloses the advantages of a novel phase detector for a novel phase detector having input signals, (I’, Q″), Wear. In this alternative embodiment, a single-ended input signal, (■″, Q″ ), has AC and DC signal components, which in the preferred embodiment are: The same exclusive OR input is coupled as an input signal, (1,Q).

The input signal, (I″′, Q″′), is a single-ended input signal, (I′, Q′′) ), has only a DC signal component corresponding to the DC signal component of . DC input signal, (I ″, Q″) are the input inputs to the same exclusive OR inputs according to the preferred embodiment. (1', Q'). Differential quadrature signals, I/Q, and signals The single-ended quadrature signals, (I″, Q″), are both AC and DC signal components. , where the phases of the AC signal components of 1 and Q are I′ and The differential quadrature signal, (1 ’, Q’), has AC and DC signal components, while the input signal, (I″).

Q'') has only a DC signal component.

] - The time it takes for the signal to propagate through the upper transistor pair and the lower transistor pair A typical time for a standard exclusive-OR gate caused by the difference in propagation time through Inter-delay imbalance has been eliminated. Each single-ended input signal, (I′, Q ″), propagates through both the top and bottom pairs and the average delay for each signal is It's the same. By using an exclusive-OR phase detector, the ideal quadrature Their phase errors can be determined in either of two ways. The first method is phase Errors are detected by determining the difference between the two outputs. The second method is phase Detects errors by determining the difference between one output and an independent DC reference signal do.

Accordingly, a novel precision quadrature signal generator has been disclosed.

This novel quadrature signal generator accurately generates a wide range of amplitudes and different harmonic components. can accurately generate precise quadrature states for input signals. Also, it is wide Quadrature can be accurately maintained over a range of frequencies and temperatures. phase shift The amplitude and shape of the phase-shifted signal are the same as the amplitude and shape of the unphase-shifted signal. It's the same. The differential quadrature signals generated can be used advantageously with balanced mixers , thereby improving transmitter and receiver performance.

Vcc FIG.2 abstract The quadrature signal generator generates a differential in-phase signal, (1, I'), and a differential quadrature signal, (Q/'Q'), with a precisely 90° quadrature relationship. phase locked loop The configuration (100) includes a voltage controlled phase shift network (103) and a novel exclusive A digital OR phase detector (109) is provided. Voltage controlled phase shift network (1 03) is a differential quadrature signal, the phase shift for (1, 1') and (Q/Q') This causes a lot of weight. The novel exclusive-OR phase detector (109) detects differential quadrature signals; Determine the phase error, - between (I, Bi) and (Q/Q'). The phase error The voltage control signal is coupled back to the voltage control phase shift network (103). The differential quadrature signals, (1°I’) and (Q /Q') to maintain a precise 90' phase relationship.

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Claims (10)

[Claims] 1. An apparatus for generating in-phase and quadrature signals from differential input signals, the apparatus comprising: The device is means for generating a differential quadrature signal in response to the differential input signal; means for detecting a variation from 90° in magnitude between the differential quadrature signals; means for generating a control signal in response to the detected variation; and means for adjusting the phase of the differential quadrature signal in response to the control signal; for generating in-phase and quadrature signals from differential input signals with a combination of Device. 2. The means for generating the differential quadrature signal further comprises: means for filtering the differential input signal to generate a filtered differential signal; Phase-shifting the filtered differential signal to obtain a differential quadrature phase-shifted signal. means for generating and limiting said differential quadrature phase-shifted signal. and generating the differential quadrature signal. The device described in. 3. The means for phase shifting is further double-ended by a differential amplifier. A voltage-controlled phase shift network that essentially includes a bridge resistor-capacitance configuration driven by a 3. The device according to claim 2, comprising a network. 4. The means for detecting further comprises: (a) first and second exclusive OR phases; a detector, each exclusive-OR phase detector having a first and a second pair of input ports; (b) said first exclusive OR position; The in-phase differential signal is combined with the quadrature differential signal in a phase detector to generate the first signal. means for generating said first and second output signals of an exclusive-OR phase detector; (d) converting the in-phase differential signal to the quadrature phase difference in the second exclusive-OR phase detector; the first and second outputs of the second exclusive-OR phase detector in combination with a dynamic signal; means for generating a force signal; (e) adding the first output signals of the first and second exclusive-OR phase detectors; means for generating a first detected output signal by: and (f) summing the second output signals of the first and second exclusive-OR phase detectors; means for generating a second detected output signal by; An apparatus according to claim 1, comprising: 5. The means for generating the voltage control signal further comprises: means for filtering and generating a direct current signal; means for comparing the DC signals to generate an error current signal; and means for filtering the error current signal to generate the control signal; An apparatus according to claim 1, comprising: 6. The means for adjusting further comprises a variable resistance device responsive to the control signal. The apparatus according to claim 1. 7. A method for generating in-phase and quadrature signals from differential input signals, the method comprising: The method includes: generating a differential quadrature signal in response to the differential input signal; detecting a variation from 90° in phase between the differential quadrature signals; generating a control signal in response to the detected variation; and adjusting the phase of the differential quadrature signal in response to the control signal; A method for generating in-phase and quadrature signals from differential input signals comprising: 8. The detecting step further comprises: (a) a first and second pair of input ports and a first and second output signal, respectively; a stage for detecting phase variations using first and second exclusive-OR phase detectors, comprising: (c) converting the in-phase differential signal to the quadrature position within the first exclusive-OR phase detector; the first and second of the first exclusive-OR phase detector in combination with a phase differential signal; generating an output signal of (d) converting the in-phase differential signal to the quadrature phase difference in the second exclusive-OR phase detector; the first and second outputs of the second exclusive-OR phase detector in combination with a dynamic signal; generating a force signal; (e) adding the first output signals of the first and second exclusive-OR phase detectors; generating a first detected output signal by: (f) adding the second output signals of the first and second exclusive-OR phase detectors; generating a second detected output signal by; 8. The method according to claim 7, comprising: 9. Apparatus for detecting variations from 90° in phase between quadrature signals, the apparatus comprising: , the device is (a) each including a first, second, third and fourth input port; first and second exclusive-OR phase detectors generating an output signal of (b) within said first exclusive-OR phase detector, said first, second and third phase detectors, respectively; and a first, second, third and fourth signal coupled to a fourth input port. to generate the first and second output signals of the first exclusive-OR phase detector. means to (d) within said second exclusive OR phase detector, said first, second and third phase detectors, respectively; and said third, fourth, first and second signals coupled to a fourth input port. combining the first and second output signals of the second exclusive-OR phase detector; means to live, (e) adding the first output signals of the first and second exclusive-OR phase detectors; means for generating a first detected output signal by: and (f) summing the second output signals of the first and second exclusive-OR phase detectors; means for generating a second detected output signal by; to detect variations from 90° in phase between quadrature signals comprising a combination of equipment. 10. Method for detecting variations from 90° in phase between quadrature signals And, (a) each including a first, second, third and fourth input port; phase using first and second exclusive-OR phase detectors that generate an output signal of a step of detecting fluctuations; (b) within said first exclusive-OR phase detector, said first, second and third phase detectors, respectively; and a first, second, third and fourth signal coupled to a fourth input port. and generating the first and second output signals of the first exclusive OR phase detector together. the stage of (d) within said second exclusive OR phase detector, said first, second and third phase detectors, respectively; and said third, fourth, first and second signals coupled to a fourth input port. combining the first and second output signals of the second exclusive-OR phase detector; stage of birth, (e) adding the first output signals of the first and second exclusive-OR phase detectors; emitting the first detected output signal by: (f) adding the second output signals of the first and second exclusive-OR phase detectors; generating said second detected output signal by; Detecting variations from 90° in phase between quadrature signals comprising a combination of How to do it.