JPH0547999A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce a mounting area, to enhance a mounting density and to improve reliability by laminating two resin-sealed semiconductor devices by opposing the rear surfaces of the devices except the rear surface side of semiconductor chips, and connecting one set of leads extended from the sealing resins. CONSTITUTION:A first vessel 3a containing a first semiconductor memory chip 2a placed on a first lead frame 1a is laminated on a second vessel 3a containing a second semiconductor memory chip 1b placed on a second lead frame through an insulating member 5. First outer leads 4 extended from the vessel 3a are connected to a wiring pattern on a printed board. Inner leads are electrically connected to each other through a solder layer 6. Further, the outer leads of the second lead frame are removed by cutting, and only the inner leads remain. Thus, a memory having a large capacity can be obtained without increasing a mounting area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method, and more particularly to its mounting.

[0002]

2. Description of the Related Art In the field of semiconductor integrated circuits, integration is advancing, and the number of pads for supplying input / output signals and power supply voltage is increasing more and more.

As the integration progresses in this way, particularly in information devices such as personal computers and large computers, the mounting area of the semiconductor integrated circuit constituting the memory increases, which becomes a cause of hindering the miniaturization of the devices. There is.

Usually, in high-density mounting on a printed circuit board, a surface mount type semiconductor device 10 as shown in FIG. 3 is mainly used.
Are arranged in a matrix, and each lead is connected to the signal wiring 20 on the printed circuit board.

However, in particular, in the case of a semiconductor device such as a memory, there is a problem that the number of connection with the signal wiring is extremely large and the occupying area of the connecting portion is large. there were.

Therefore, as shown in FIG. 4, there has been proposed one in which the first and second chips 31 mounted on the TAB tape 30 are sealed in the same sealing resin 32.

With such a structure, the mounting area is reduced, but since the bonding must be performed with the chip exposed, the manufacturing yield such as damage to the chip or peeling of the bonding portion is reduced. There is a problem of being bad. Also, there is a problem in that a completely new mounting device has to be used, which causes a cost increase.

[0008]

As described above, the conventional mounting technique has a problem in that the mounting area can be reduced and a highly reliable semiconductor device cannot be obtained.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a highly reliable semiconductor device capable of increasing the mounting density and significantly reducing the mounting area.

[0010]

According to the present invention, the backsides of two resin-sealed semiconductor devices are laminated together while leaving the backsides of the semiconductor chips, respectively, and are led out from each sealing resin. At least one set of leads is connected.

Further, in the method of the present invention, the first and second semiconductor chips are mounted on the die pads of the first and second lead frames, respectively, and bonding is performed, and resin sealing is performed while leaving the back surface side of the die pad. After that, the rear surfaces of the die pad are fixed to each other via an insulating member, and the inner leads to be connected are fixed to each other by a conductive adhesive.

[0012]

According to the above structure, since it has a laminated structure, the mounting area can be reduced to about half, and a large-capacity memory can be obtained without increasing the mounting area.

Further, the terminals which are electrically connected to each other can be connected only by stacking the semiconductor chips, and the number of connections with the signal supply line can be reduced. Furthermore, according to the method of the present invention, since the chip mounting surface side of the lead frame is resin-sealed and then the two are fixed to each other, handling is extremely easy, and a strong connection state is maintained even against impact. be able to.

Further, it can be easily formed by using conventional manufacturing equipment.

[0015]

Embodiments of the present invention will be described in detail below with reference to the drawings.

Embodiment 1 FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

This semiconductor device is a stack of two semiconductor devices, and as shown in FIG. 1, a first semiconductor memory chip 2 mounted on a first lead frame 1a.
The first container 3a accommodating a is the second lead frame 1
The first outer lead 4 that is stacked on the second container 3b that houses the second semiconductor memory chip 2b mounted on the substrate b and that is led out from the first container 3a has the wiring on the printed circuit board. It is characterized by being connected to a pattern.

The die pads of these lead frames are joined together via an insulating member 5 such as a polyimide film, while the inner leads are electrically connected together via a solder layer 6.

The second lead frame has only inner leads and the outer leads are cut off.

Next, a method of manufacturing the semiconductor device of the present invention will be described.

First, as shown in FIG. 2A, inner leads 12 are arranged around the die pad 11, and
First and second lead frames 1a and 1b in which outer leads 13 are connected to the inner leads 12 are prepared. Although the inner lead surfaces of these lead frames are plated with a noble metal, the solder layer 6 (see FIG. 1) is also formed on the back surfaces by a printing method or the like.

Next, the die pad 1 of each lead frame
The first and second semiconductor memory chips are mounted on the first chip 1 and wire bonding is performed between the corresponding bonding pad of each desired chip and the inner lead 12 via the wire 7, and then the second lead frame. Only 1b is cut off the outer lead 13 together with the tie bar 14.

Thereafter, as shown in FIG. 2 (b), resin sealing is performed so as to expose the back surfaces of the die pad and the inner leads. 3a and 3b are containers formed by resin sealing so as to protect the chip.

Thereafter, the die pads of the first and second lead frames are joined together via the polyimide film 5, and the inner leads 12 of the first lead frame are joined together.
And the inner lead 12 of the second lead frame are connected via the solder layer 6. At this time, the inner leads 12 are connected to each other by printing a solder layer on the lead portions to be connected to each other in advance and applying heat after stacking them. At this time, when heat is applied, by heating the corresponding outer lead portion of the first lead frame, all the corresponding leads are heated and the solder is melted, so that it is possible to perform collective connection. On the other hand, regarding the connection of the terminals that cannot be shared, one of them is not wire-bonded, and is left in a floating state without being connected to any pad.

Finally, by cutting the side bar and the tie bar of the first lead frame and molding the outer lead 13, the semiconductor device shown in FIG. 1 is completed.

The semiconductor device thus formed is
Since it has a laminated structure, the mounting area can be reduced to about half, and the memory capacity can be almost doubled without increasing the mounting area.

Further, the terminals electrically connected to each other can be connected only by stacking the semiconductor chips, the number of connections with the signal supply line can be reduced, and the mounting becomes extremely easy. .

Furthermore, according to the method of the present invention, since the chip mounting surface side of the lead frame is sealed with resin and then the two are fixed together, pressurization can be easily performed through the package and handling is easy. It's extremely easy.

Further, without changing any manufacturing equipment,
It can be easily formed using conventional manufacturing equipment.

Further, since the inner leads are connected to the bonding pads of the chip by wire bonding, it is possible to connect the inner leads to each other without changing the chip design. This allows the chip design to have flexibility.

In the above embodiment, the mounting method using the wire bonding method has been described, but it goes without saying that direct bonding may be used. In this case, multi-layer wiring may be performed on one chip via the insulating layer so that the bonding pad corresponding to the corresponding position on the other chip comes.

Further, although the bonding is carried out in a state where the die pads or the back surface of the semiconductor chip are exposed from the sealing resin, the resin is sealed so that only the inner leads are exposed from the sealing resin. The inner leads may be joined together. In this case, the back surfaces of the sealing resin may be joined together via an adhesive.

[0033]

As described above, according to the present invention, the back surfaces of two semiconductor devices, which are resin-sealed while the back surface side of the semiconductor chip is left, are laminated together and the respective sealing resins are formed. Since at least one set of leads derived from is connected, a large-capacity memory can be obtained without increasing the mounting area, and terminals that are electrically connected to each other are semiconductor chips. Can be connected by simply stacking, and the number of connections with the signal supply line can be reduced.

Furthermore, the mounting is easy.

[Brief description of drawings]

FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a manufacturing process of a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a diagram showing a conventional semiconductor device.

FIG. 4 illustrates a conventional semiconductor device.

[Explanation of symbols]

 1a 1st chip 1b 1st chip 2a 1st lead frame 2b 2nd lead frame 3a 1st container 3b 2nd container 4 External lead 5 Polyimide film 6 Solder layer 7 Bonding wire 10 Semiconductor device 11 Die pad 12 Inner lead 13 Outer lead 20 Wiring layer 30 TAB substrate 31 Semiconductor chip 32 Encapsulating resin

Claims (2)

[Claims] 1. A first mounted on a first lead frame
Semiconductor device having a first container for accommodating the semiconductor chip of 1) so as to expose the back surface side of the first lead frame or the semiconductor chip, and a first external lead led out from the container. And a second container that houses the second semiconductor chip mounted on the second lead frame so as to expose the back surface side of the second lead frame or the semiconductor chip. And a back surface of the lead frame or the semiconductor chip are laminated together, and at least one set of leads led out from each sealing resin is connected. . 2. A mounting process in which first and second semiconductor chips are mounted on the first and second lead frames, respectively, and bonding is performed, and resin sealing is performed while leaving the back side of the die pad. A method of manufacturing a semiconductor device, comprising a step of fixing the back surfaces of the rear die pad via an insulating member and fixing the inner leads to be connected by a conductive adhesive.