JPH0547936A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] Regarding a method of forming a contact window in the formation of a multi-layer wiring, the exposure dimension is maintained with high accuracy by preventing the reflection of light from the wiring surface of the lower layer during the exposure in forming the contact window. At the same time, it is an object of the present invention to secure a low contact resistance state of the lower wiring surface exposed in the contact window and prevent deterioration of device performance due to increase and variation of contact resistance. When forming a multilayer wiring, a low reflection film having a refractive index different from that of the interlayer insulation film is provided on the interlayer insulation film, and a photolithography means is used for the interlayer insulation film including the low reflection film to form a lower wiring surface. And a step of forming a contact window that exposes

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device,
In particular, it relates to a method of forming a contact window when forming a multilayer wiring.

In the field of semiconductor devices, a multi-layer wiring structure has become mainstream with the progress of high integration, and the number of wiring layers has been increasing. In such a multi-layered wiring, since the unevenness of the wiring formation surface is severe, when the contact window is formed in the insulating film on the wiring by the photolithography technique, the window size greatly varies due to the height difference and inclination of the wiring surface. As a result, there is a problem in that the contact resistance varies and the performance of the semiconductor device fluctuates or deteriorates, and improvement is desired.

[0003]

2. Description of the Related Art Conventionally, a multilayer wiring structure is generally formed by, for example, as shown in FIG. 2 (a) in a process sectional view of FIG.
A lower insulating film 53 is formed on the semiconductor substrate 51 on which the gate electrode 52 and the like are formed, and a lower wiring 54A is formed on the lower insulating film 53.
54B, 54C, etc. are formed, and the lower layer wiring 54A, 54B, 54C
After forming the inter-layer insulating film 55 on the formation surface, etc., first, a positive resist film 56 is formed on this substrate by a spin coating method, and on the resist film 56, transparent patterns 58A, 58B of a photo mask 57 are formed. The contact window pattern is exposed through 58C or the like. 59A, 59B, and 59C indicate exposed areas of the contact window pattern.

Next, as shown in FIG. 2 (b), development is performed to remove the exposed regions 59A, 59B, 59C, etc., and opening patterns 60A, 60B are formed in the resist film 56 so as to have dimensions corresponding to the contact windows. , 60C, etc., and then the resist film 56 is used as a mask to form the opening patterns 60A, 60B, 60
Anisotropic dry etching is performed through C, etc.
Aperture patterns 60A, 60B, 60C of the resist film 56 on 55
Etc. to form contact windows 61A, 61B, 61C and the like.

Next, the contact windows 61A, 61B, 61
A second wiring material layer is formed on the inter-layer insulation film 55 including the inner surface such as C by the sputtering method, and is patterned by the usual photolithography means. As shown in FIG. 2 (c), the contact window 61A is formed. , 61B, 61C, etc.
5 is formed by a method of forming upper layer wirings 62A, 62B, 62C and the like extending above.

However, according to the above-mentioned conventional method, upon exposure, the lower layer wiring 54A which is usually formed of aluminum or an aluminum alloy and has a high reflectivity reflects light from the lower layer wiring surface and is substantially perpendicular to the exposure light beam.
The exposed regions 59A and 59C of the resist film 56 on the 54C and 54C are larger than the design dimension as shown by the chain lines 59A 'and 59C' in FIG. 54
The exposed region 59B of the resist film 56 on B is formed by being greatly expanded and deformed to one side as shown by a chain line 59B '.

Therefore, the opening pattern formed in the resist film 56 by the development is also shown by the chain lines 60A ', 60 in FIG.
The contact windows formed by enlarging or deforming as shown by B ', 60C' and aligned with these opening patterns are also shown by dashed lines 61A ', 61B' in FIG. 2 (b) and FIG. 2 (c).
As shown by 61C ', it is formed by enlarging or deforming the design pattern.

As described above, the contact window is formed so as to be enlarged or deformed with respect to the design pattern. When the integration degree is increased and the wiring width is reduced, the contact window is formed outside the wiring. When the contact window is etched, the lower insulating film 53 under the protruding portion is formed.
Is also removed by etching, which causes a problem that the upper wiring and the lower wiring are short-circuited with the semiconductor substrate.

Therefore, conventionally, as a method for suppressing the reflection of light from the wiring surface, a method of adding a dye absorbing the reflected light to the resist has been used. According to this method, the reflection of light is suppressed. At the same time, since the amount of light transmission is also suppressed by the dye, as shown in FIG. 3 which is a schematic cross-sectional view showing the problem, the exposure regions 59A, 59C, etc. are tapered in size along with the depth of the resist film 56. . Therefore, wiring
The contact window 61C of the interlayer insulating film 55 at the lower position where the resist film 56 is thickly formed by the step of 54A and 54C is higher than the contact window 61A of the interlayer insulating film 55 at the position where the upper resist film 56 is thin. There is a problem in that it is formed small, and the contact resistance increases and varies.

Therefore, as another method, a low-reflection film such as titanium nitride is directly deposited on the lower wiring made of Al alloy or the like to reflect light from the lower wiring surface during exposure. A method of suppressing the dimensional expansion and deformation of the exposed region by this has been tried, but in this method, after the contact window is formed, the titanium nitride film exposed in the contact window is removed by the etching rate of the substrate. There is a problem in that the contact resistance is not uniform due to the in-plane distribution, and the contact resistance varies.

[0011]

As described above, in the exposure process for forming the contact window, the resist which has been conventionally used to prevent the exposure region from expanding or deforming due to the reflection of light from the lower wiring surface is used. In the method of adding a dye for absorbing reflected light, the size of the contact window is formed smaller than the design size due to the reduction of the amount of light reaching the deep part in the region where the resist film is thickly applied, In the method of directly depositing the low-reflection film on the substrate, the removal of the low-reflection film in the contact window is not carried out uniformly, and in any method, the contact resistance increases and varies to deteriorate the performance of the semiconductor device. There was a problem of letting it.

Therefore, the present invention prevents the reflection of light from the wiring surface of the lower layer during exposure when forming the contact window to maintain the exposure dimension with high accuracy, and reduces the wiring surface of the lower layer exposed in the contact window. The purpose is to secure the contact resistance state and prevent deterioration of device performance due to increase and variation of contact resistance.

[0013]

Means for Solving the Problems To solve the above problems, a low reflection film is provided on an interlayer insulating film when forming a multilayer wiring,
This is achieved by the method for manufacturing a semiconductor device according to the present invention, which has a step of forming a contact window exposing a wiring surface of a lower layer in the interlayer insulating film including the low reflection film by using a photolithography means.

[0014]

In the method of the present invention, a low reflection film such as titanium nitride having a refractive index different from that of the interlayer insulating film is provided on the upper surface of the interlayer insulating film which is usually formed of a silicate glass type insulating film. Then, when forming a resist mask for forming a contact window exposing the wiring surface of the lower layer on the interlayer insulating film on the interlayer insulating film, during exposure of the opening pattern corresponding to the contact window to the resist film, At the interface between the interlayer insulating film provided on the upper surface of the interlayer insulating film and the low reflection film having a different refractive index, the exposure light that passes through the resist film and further through the interlayer insulating film and is reflected on the wiring surface of the lower layer is exposed. The exposure light reflected from the wiring surface of the lower layer is prevented from entering the resist film from below by reflecting the light toward the interlayer insulating film side.

Thus, the resist film is exposed to light only by the exposure light beam incident from above through the photo mask. Therefore, it is possible to use a pure resist film which does not add a substance such as a dye that lowers the light transmittance as in the conventional case, so that the photomask of the photomask can be formed regardless of the partial variation of the thickness of the resist film. A photosensitive area is formed with high precision in alignment with the pattern. Therefore, the opening pattern formed in the resist film by development can be a highly accurate pattern that is not reduced, enlarged, or deformed with respect to the mask pattern.

Therefore, the contact window formed in the interlayer insulating film by the anisotropic dry etching means through this resist mask becomes a highly accurate and uniform contact window.

Further, in the method of the present invention, since the low reflection film is not provided on the lower wiring and the low reflection film is provided on the upper surface of the interlayer insulating film, the low reflection film in the contact window portion is simultaneously formed when etching the contact window. Since it is removed, the underlying wiring surface exposed in the contact window becomes a bare clean surface.
Therefore, a low contact resistance with the upper wiring is easily secured.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be specifically described below with reference to the process sectional views shown in FIG.

Referring to FIG. 1 (a), when forming a multilayer wiring by the method of the present invention, for example, silicon oxide (on a semiconductor substrate 1 on which an element having an impurity diffusion region (not shown) and a gate electrode 2 and the like is formed ( A lower layer insulating film 3 made of SiO ₂ ) is formed, and lower layer Al wirings 4A, 4B, 4C made of aluminum (Al) -silicon (Si) alloy or the like is formed on the lower layer insulating film 3 on a substrate. First, a silicate glass-based interlayer insulating film 5 consisting of a SiO ₂ film having a thickness of about 1000 Å and a phosphosilicate glass (PSG) film having a thickness of about 6000 Å is formed by vapor phase growth means, and then a sputtered film is formed thereon. By the method, a titanium nitride (TiN) film 6 having a thickness of 400 to 700 Å which is a low reflection film having a difference in refractive index from the silicate glass-based interlayer insulating film 5 is formed.

Next, referring to FIG. 1 (b), a normal positive resist film 7 is formed on the above-mentioned substrate by a spin coating method to a thickness of about 1.5 μm and subjected to a normal pre-baking treatment, and then this positive resist film 7 is formed. 7 is exposed through a photo mask 8 to a pattern corresponding to the contact window. In the figure, 9A, 9B, and 9C are light-transmitting patterns corresponding to the contact window patterns, 10 is a light-shielding film, and 11 is a light-shielding film.
A, 11B, and 11C represent exposed (photosensitive) regions having a flat area matching the light-transmitting pattern. Lower wiring 4 during this exposure
The reflected light from the surface of A, 4B, 4C, etc. is generated by the interlayer insulating film 5 described above.
The upper TiN film 6 prevents the light from being reflected from the interlayer insulating film 5 side and entering the resist film 7 from below. Therefore, the planar shape of the exposure regions 11A, 11B, 11C, etc. is the same as the resist film 7
Translucent patterns 9A, 9B, 9C of the photo mask 8 regardless of the difference in the partial thickness of the film, the inclination of the lower wiring surface (for example, 4B), etc.
And the like with high precision.

Next, as shown in FIG. 1 (c), resist development is performed, and the positive resist film 7 is formed.
In addition, the opening pattern 12 corresponding to the contact window which is highly accurately aligned with the translucent patterns 9A, 9B, 9C of the photo mask 8 and the like.
Form A, 12B, 12C, etc.

Referring to FIG. 1 (d), using the resist film 8 as a mask, reactive ion etching using (CF ₄ + CHF ₃ ) as an etching gas through the opening patterns 12A, 12B, 12C, etc.
The TiN film 6 and the underlying silicate glass-based interlayer insulating film 5 are selectively removed by (RIE) processing, and the opening patterns 12A, 12B, 12 of the resist film 7 are formed on the silicate glass-based interlayer insulating film 5.
Contact windows 13A, 13B, 13C that match C etc. with high accuracy
Etc. are formed, and then the resist film 7 is removed. here,
Since the TiN film 6 is removed at the same time as the silicate glass-based interlayer insulating film 5 in the above etching process, the contact window 13A
, 13B, 13C, etc., the surfaces of the lower-layer Al wirings 4A, 4B, 4C, etc. are bare clean surfaces.

Then, as shown in FIG. 1 (e), a pure Al or Al alloy film having a thickness of about 0.7 to 1 μm is formed on the substrate by a sputtering method as usual.
The pure Al or
By patterning the Al alloy film and the TiN film 6 therebelow, the pure Al is formed on the contact windows 13A, 13B, 13C, etc.
Or upper layer Al wiring 14A, 14B, 14C made of Al alloy, etc.
Etc. are formed, and the multilayer wiring according to the present invention is completed.

As shown in the above embodiments, according to the present invention, in the resist film formed on the interlayer insulating film, the lower layer under the interlayer insulating film is exposed in the exposure process for forming the opening pattern used for forming the contact window. The exposure light reflected by the wiring surface is prevented from entering the resist film from below the resist film, and the light contributing to the exposure of the resist film is limited to the light entering from above the resist film through the photo mask. Therefore, in the resist film, a photosensitive region is formed that is highly accurately aligned with the mask pattern regardless of the partial thickness difference of the resist 7, the inclination of the lower wiring surface, etc., and the opening pattern formed after development is formed. Also becomes a pattern that matches the mask pattern with high accuracy.

Therefore, the contact window formed by the RIE process through this opening pattern is also formed with high accuracy in alignment with the mask pattern, so that a highly accurate and uniform contact window is formed.

Further, in the method of the present invention, since a low reflection film such as a TiN film is formed on the upper surface of the interlayer insulating film, this low reflection film can be easily formed simultaneously with the interlayer insulating film 5 in the etching process of the contact window. Since it is removed, the surface of the lower layer wiring exposed in the contact window becomes a bare clean surface, and a low contact resistance is obtained.

The low reflection film is the same as that shown in the above embodiment.
Besides TiN, silicide of refractory metal such as tungsten silicide (WSi ₂ ) is also used.

[0028]

As described above, according to the present invention, when the multilayer wiring is formed, the contact window that is faithful to the design dimension according to the mask pattern and has no variation in dimension and shape is formed, and the contact window is formed in the contact window. Since the exposed lower wiring surface is a bare clean surface, it is possible to form a multilayer wiring having low resistance and uniform contact resistance between wiring layers. Therefore, the present invention greatly contributes to the improvement of the performance of the semiconductor device having a multi-layered wiring due to high integration.

[Brief description of drawings]

FIG. 1 is a process sectional view of an embodiment of a method of the present invention.

FIG. 2 is a process sectional view of a conventional method.

FIG. 3 is a schematic sectional view showing a problem of one conventional method.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Gate Electrode 3 Lower Layer Insulating Film 4A, 4B, 4C Lower Layer Al Wiring 5 Silicate Glass Interlayer Insulating Film 6 TiN Film 7 Positive Resist Film 8 Photo Mask 9A, 9B, 9C Light Transmissive Pattern 10 Light Shielding Film 11A, 11B , 11C Exposure (photosensitive) area 12A, 12B, 12C Opening pattern 13A, 13B, 13C Contact window 14A, 14B, 14C Upper layer Al wiring

Claims (2)

[Claims] 1. When forming a multilayer wiring, a low reflection film is provided on an interlayer insulating film, and a photolithography means is used for the interlayer insulating film including the low reflection film to form a contact window exposing a wiring surface of a lower layer. A method of manufacturing a semiconductor device, comprising the step of forming. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the interlayer insulating film is made of a silicate glass-based insulating film, and the low reflection film is made of a titanium nitride film.