JPH0544213B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of configuring a line/packet integrated switch that exchanges both line-switched signals and packet-switched signals in a mixed manner.

As is well known, there are two types of switching methods: circuit switching and packet switching. Both have their own advantages and disadvantages, and are said to have different application areas. In other words, the circuit switching system has the characteristics that a call connection path with the required bandwidth or speed is secured from the start to the end of each call (or call), and that the delay is small and there is no variation in delay. It is also advantageous for data communication such as facsimile and file transfer, where a large amount of data to be sent is generated continuously. but
For interactive data communications such as TSS (Time Sharing System) services and inquiry services where data is generated intermittently and in small amounts, the efficiency of line usage is poor, which is disadvantageous. On the other hand, the packet switching system is advantageous over the above-mentioned interactive data communication, as it allows data to be sent to be stored in a buffer and then queued, allowing the data to be efficiently multiplexed on the line. becomes. However, compared to the circuit switching method, the delay is large and the delay fluctuates, so it is generally considered disadvantageous for voice communications, etc.

As described above, the suitable switching method differs depending on the type of service, but currently it is common to configure a separate communication network for each service and adopt the switching method suitable for that service. It is. For example, voice communication networks (circuit-switched), telex networks (circuit-switched), data circuit-switched networks,
A separate packet switching network for data is constructed. This method has the advantage that each communication network can be optimized for the services it provides. However, on the other hand, because there are multiple communication networks that have slightly different methods or characteristics but are generally similar, there are many overlapping parts, making the operation and management of communication networks complicated, and the individual communication networks Since the scale of the communication network becomes smaller, the so-called large grouping effect cannot be obtained, and the efficiency of the communication network equipment as a whole is reduced. Additionally, if communication networks differ for each service, there will be many difficulties in providing a composite service that combines multiple services, and it will be necessary to construct a new communication network to realize new services. This results in the occurrence of gender. Therefore, if both circuit switching and packet switching systems can be realized in an integrated manner through a single communication network, and a wide variety of services can be centrally provided in a format suitable for each, the benefits will be greater. is extremely large. To this end, it is essential to realize a line/packet integrated transmission line and a line/packet integrated switch in each of the transmission lines and exchanges that make up the communication network.

Conventionally, a line/packet integrated switch has been considered to have a configuration as shown in FIG. That is, in FIG. 1, the circuit switching signal and packet switching signal arriving from the transmission line 10 are separated by the distribution switching section 11, and the circuit switching signal is sent to the link 1.
The packet-switched signal is transmitted to the packet-switched section 15 via the link 14. The line switching section 13 and the packet switching section 15 are
These are equivalent to conventional circuit switching equipment and packet switching equipment. The circuit-switched signals and packet-switched signals exchanged at each switching section are transmitted again to the distribution switching section 11 via links 12 and 14, respectively. The distribution exchange unit 11 outputs both signals to the transmission line 10 of the destination route. The distribution exchange section 11 is
The configuration differs depending on the form in which circuit-switched signals and packet-switched signals are integrated in the transmission path 10, but in any case, the circuit-switched signals and packet-switched signals on the transmission path are separated,
Or conversely, both are combined and output onto the transmission line.

However, in the configuration shown in FIG. 1, even though line switching and packet switching are apparently implemented within the same switch, they are logically completely separate and cannot be called true integration. In other words, the circuit switching section and the packet switching section must be configured separately based on the characteristics of the circuit switching signal and the packet switching signal, and there are still overlapping parts, and a decrease in efficiency is inevitable. Few of the benefits of circuit-switched/packet-switched integration described are obtained.

On the other hand, private closed communication networks, especially local area networks (LANs), which have been attracting attention recently.
Attempts have been made to provide circuit-switched signals and packet-switched signals on the same communication network.
Locally configure the telephone switch network of the exchange.
It is also conceivable to configure it like an area network. For example, as shown in FIG. 2, a configuration can be considered in which a plurality of modules (hereinafter referred to as "communication nodes") 20 accommodating a large number of terminals or inter-office trunk lines are connected by a plurality of communication loops 21. . At this time, according to the conventional local area network configuration method, for example, each communication loop 21 is provided with a frame of a fixed time period as shown in FIG. It will be established. Then, these time slots are separated into time slots for circuit switching and time slots for packet switching, and each communication node uses the time slots assigned for circuit switching to transmit circuit switching signals for packet switching. The packet exchange signals are transmitted and received using the time slots allocated for the purpose. that time,
Individual circuit-switched signals are transmitted over the loop using the same time slots every frame during a call connection;
Packet-switched signals, on the other hand, are transmitted using any suitable time slot access algorithm (eg, token passing method) well known to those skilled in the art.

In the above method, if the division between the line-switched time slot and the packet-switched time slot is fixed, even if one of the time slots is vacant, the signal of the other is cannot be used, resulting in waste and reducing overall efficiency. Also, in this case, although physically circuit switching and packet switching are integrated, they are logically completely different, and there is no difference from the method shown in Figure 1. The benefits of exchange integration are not available. On the other hand, if we adopt a so-called movable boundary method in which the division is variable, circuit switching,
It is possible to allocate the number of time slots according to the amount of traffic for each packet exchange, and it is possible to reduce the decrease in efficiency due to the occurrence of waste mentioned above. However, in that case, a control node is required that has the function of observing the traffic amount of each exchange signal and indicating the boundaries of time slots. Alternatively, if a control node already exists, it is necessary to add the above function to that node. However, even at this time, it is impossible to observe the amount of track instantly, and therefore the time
It is impossible to change the allocation of the number of slots instantaneously and to eliminate waste. This is an essential problem arising from differentiating time slots into circuit-switched and packet-switched time slots.

On the other hand, several methods have been proposed that aim at true integration of the two. One method is to apply the packet switching system even to signals, such as voice, for which circuit switching was traditionally considered appropriate, and to integrate all communications using the packet switching system. In this method, in the case of audio, digitized audio signals within a predetermined period of time are grouped together to form a packet, and the packet is transmitted to the destination using conventional packet switching techniques. A header containing control signals such as a destination address and a logical channel number is added to each packet, and the packet is transmitted to its destination while referring to this header. In this case, in order to prevent a drop in transmission efficiency due to the header, the size of one packet must be increased to some extent. For this reason, the delay due to so-called packet assembly time (the time for accumulating the amount of speech signals necessary to construct a packet of a predetermined size) increases for voice signals. Furthermore, in the packet switching system, packets are stored and transmitted while waiting for a free transmission path, so the waiting time varies depending on the packets, even if the packets belong to the same call or calls. Therefore, for communications such as voice communications that require time transparency (the property that the delay is always constant), a reception buffer is required to absorb delay fluctuations, which further increases the delay time. becomes. In a communication network that spreads over a wide area, when the caller passes through many exchanges from the caller to the receiver, the delays at each exchange accumulate, resulting in an extremely large delay, resulting in echoes or delays in the communication itself. Deterioration of call quality occurs. In order to reduce the delay, it is necessary to shorten the packet length, shorten the packet assembly time, and reduce the capacity of the delay absorption buffer. Deterioration occurs.

On the other hand, there is also a method in which circuit switching is applied to communications that are considered suitable for packet switching, and circuit/packet switching signals are integrated using the circuit switching method. For example, fast circuit switching
This method prevents unnecessary holding of the transmission line and improves efficiency by setting up a new line each time transmission data occurs intermittently during a single call, and restoring the line immediately after transmission is completed. This is a method for improving. In this method,
The most important issue is how quickly lines can be set up and restored. However, in the communication network that spreads over a wide area as mentioned earlier, the route from the sender to the recipient must be set up and restored via multiple exchanges, and the transmitted data itself has to be transferred over the transmission path. In reality, it is extremely difficult to make the time sufficiently small compared to the time occupied. Therefore, a decrease in the efficiency of the transmission line is unavoidable. In addition, when there are various required bandwidths (or speeds) for the data to be transmitted, that is, when dealing with so-called multi-traffic, the communication connection path with the necessary communication bandwidth or signal speed for each communication service is determined for each call. , control is required to secure the entire route, control to combine the secured call connection paths of multiple unit bands or unit speeds into one call, etc., and the control becomes extremely complicated, so the hardware and software of the exchange are required. This will lead to larger and more complex clothing.

The drawbacks of the conventional methods described above are enumerated as follows.

(1) There is no true integration of circuit switching and packet switching, and the benefits of integration, such as increased equipment efficiency and unified operation and management, are rarely achieved.
(In case of circuit switching and packet switching coexistence method) (2) There is a large delay for circuit switching signals such as voice signals. (In the case of an integrated method using a packet-switched method) (3) There is no time transparency for circuit-switched signals such as voice signals. (In case of integrated method using packet switching method) (4) Inefficient for communication where transmission data is generated intermittently (in case of integrated method using circuit switching method) (5) Control of multi-source traffic becomes complicated do.
(In the case of a circuit-switched integrated system) The purpose of the present invention is to eliminate all these drawbacks, truly integrate circuit-switching and packet-switching, and at the same time guarantee low delay for circuit-switched signals and time transparency. The purpose of this invention is to realize a line/packet integrated switching system that can easily cope with multiple traffic without reducing the efficiency of intermittent communication.

That is, according to the present invention, in a line/packet integrated switching circuit network consisting of a single or multiple communication loops and a plurality of communication nodes that commonly access the communication loops, the communication loops are provided with signal transmission around the loops. A frame having a period of time required is provided, the frame is divided into a plurality of time slots, and each communication node receives a circuit switched signal arriving from a subscriber terminal or a relay line to the destination communication node for each cycle of the frame. The circuit-switched mixed packets are divided into one or more circuit-switched mixed packets for each destination communication node, and the circuit-switched mixed packets are divided into time slot sizes to fill empty time slots. Each time a signal is detected, it is transmitted onto the communication loop, and the packet switching signals arriving from the subscriber terminal or the trunk line are classified by destination communication node, and one or more mixed packets for packet switching are generated for each destination communication node. The mixed packet for packet exchange is divided into timeslot sizes and transmitted onto the communication loop each time an empty time slot is detected, and at the same time each communication node is transmitted on the communication loop. Among the circuit-switched mixed packets and packet-switched mixed packets, the circuit-switched mixed packet and the packet-switched mixed packet addressed to the node are found and received, and the received circuit-switched mixed packet and packet-switched mixed packet are received. A line/packet integrated switching system is obtained which is characterized in that the signal is decomposed into individual circuit switched signals and packet switched signals and sent to subscriber terminals or trunk lines.

The present invention will be explained in detail below with reference to the drawings.

The present invention provides a plurality of communication nodes 2 shown in FIG.
Communication loop 21 with multiple (including single) 0s
It is realized on a communication switch circuitry structure that is coupled with Communication node 20 in FIG.
are a large number of subscriber terminals 22, 23, 24, respectively.
Alternatively, by accommodating the inter-office relay line 25, transmitting and receiving call signals arriving from the inter-office relay line 25 between arbitrary communication nodes, and then transmitting the call signals again to an arbitrary subscriber terminal or inter-office relay line, Overall, a large number of calls of various types can be arbitrarily and simultaneously exchanged, such as voice, data, image, or circuit-switched or packet-switched modes. Here, the circuit switching mode and the packet switching mode represent exchange forms applied to the exchange of a certain call.

Of the call signals that arrive at the node in these large numbers of calls, each communication node 20 transmits call signals in circuit switching mode at a fixed cycle common to each node, for example, 125 μsec, which is the standard coding cycle of voice signals. classified by destination communication node,
A plurality of classified call signals are grouped together to create a line-switched mixed packet as shown in FIG. 4 for each destination communication node. Furthermore, the created line-switched mixed packet is transmitted onto the communication loop within the next fixed period. By using the method described later, it is possible to always transmit circuit-switched mixed packets within one cycle. In FIG. 4, a line-switched mixed packet includes a destination communication node address field D, a source communication node address field S, an exchange mode display field M, a control signal field C, and a circuit switch signal field.
Consists of CS. Destination communication node address part D,
The source communication node address section S is literally a section that stores the address numbers of the destination communication node and the source communication node of the line-switched mixed packet. The switching mode display section M is a section that displays whether the mixed packet is for a call signal in circuit switching mode or for a call signal in packet switching mode, which will be described later.For example, in the case of circuit switching mode, "1" is displayed, while in the case of packet exchange mode, "0" is displayed. Generally, two types of mixed packets, one for circuit switching and one for packet switching, are transmitted and received between a set of nodes, so it is necessary to display such an exchange mode.

On the other hand, the circuit switching signal section CS is shown in Fig. 4 as CS1 and CS.
As shown in 2, CS3, ..., it generally consists of call signals in multiple circuit switching modes, and each call occupies a certain space in the circuit switching mixed packet every cycle depending on its band (or speed). .
This means that in circuit-switched mode calls, a certain amount of call signals according to the band arrive at the communication node at regular intervals, and the call signals do not stay in the buffer memory, etc., and are transmitted in the next cycle. This is because everything needs to be sent to the destination communication node. For example, in Figure 4, the period is 125 μsec (=
1/8 KHz), if CS1 is 64 kb/s PCM voice, 8 bits of space will be occupied in the line-switched mixed packet every cycle, and if CS2 is 192 kb/s high-speed facsimile, 24 bits of space will be occupied every cycle. On the other hand, when a new circuit-switched mode call occurs, a space for the corresponding call signal is added to the end of the circuit-switched signal section CS, and when a connected call ends, the corresponding space is added to the end of the circuit-switched signal section CS. It will be deleted from the circuit switched signal section CS, and subsequent call signals will be carried forward. That is, the length of the circuit-switched mixed packet changes depending on the origination/termination of a circuit-switched mode call. The control signal section C is a section that stores control signals related to communication between communication nodes, such as setting, recovery, required bandwidth, and notification of incoming subscriber/outgoing subscriber information for such circuit-switched mode calls. .

On the other hand, among the call signals arriving at the communication node 20, the call signals in the packet switching mode are also
They are classified by destination communication node, and mixed packets for packet exchange as shown in FIG. 5 are created for each destination communication node and sent onto the communication loop. In FIG. 5, the destination communication node address section D, the source communication node address section S, and the exchange mode display section M are as explained in FIG. The packet switching signal section PS stores classified packet switching mode call signals. Generally, there are a plurality of calls in the packet switching mode, so they are accommodated in the packet switching signal section PS in a shared manner as shown as PS1 and PS2 in FIG. The mixed packet for packet exchange constructed in this way is sent to the communication loop. However, in the case of mixed packets for packet exchange, transmission is not necessarily completed within one cycle. Therefore, each time a new cycle begins, a new destination communication node address part D, etc. is added to the beginning of the remaining packet signal part PS, and the packet is sent to the communication loop in the mixed packet format shown in Figure 5 for each cycle. do. At this time, the length of the packet-switched signal portion PS of each mixed packet generally changes every cycle depending on the amount of packet-switched mode speech signals arriving at the communication node and the congestion of the communication loop. Therefore, in general, one call signal (packet) belonging to a call in a packet switching mode may be transmitted across multiple mixed packets for packet switching, and multiple calls may be transmitted within one mixed packet. There may be several call signals (packets). That is, for calls in the packet switching mode, the packet switching signal section PS can be regarded as a packet multiplex transmission path whose communication capacity changes.

Note that depending on the amount of call signals and the congestion of the communication loop, there may be periods in which mixed packets for packet exchange are not transmitted. In packet switching mode calls, unlike circuit switching mode calls, call signals arriving at the communication node are allowed to wait in the buffer memory, so the above-described transmission method is possible.

On the other hand, control signals for setting up, restoring, etc. a call in packet switching mode are usually included in the call signal. Therefore, the portion corresponding to the control signal section C in FIG. 4 is not necessarily necessary for the packet switching mode and is not included in the configuration of FIG. 5.

As described above, each communication node sends out mixed circuit-switched and packet-switched packets onto the communication loop, and also transmits a large number of circuit-switched and packet-switched packets transmitted from other communication nodes on the communication loop. Among the mixed packets, those addressed to the own node are detected, removed from the communication loop, and taken into the own node.

According to this method, for circuit-switched mode calls, a fixed amount of call signals depending on the band or speed are sent and received every cycle using circuit-switched mixed packets, so the delay between nodes is constant. ,
Time transparency for circuit switched signals is guaranteed.
Also, 1 for call signals in multiple circuit switched modes.
By adding two headers (addresses, control signals, etc.), the header rate per individual call is reduced. As a result, efficiency is achieved even when the amount of signal for each individual call within the circuit-switched mixed packet is small. Therefore, it is possible to shorten the assembling/sending cycle of the line-switched mixed packets mentioned above, and it is possible to reduce the delay due to so-called packet assembling time. For example, in Fig. 4, if the line-switched mixed packet assembly/transmission cycle is 125 μsec as mentioned above, the line-switched signal section CS
When using 80 bits for 10 calls, 1 voice call only costs 1
In the conventional method of configuring one packet, in order to reduce the efficiency loss due to the header to the same degree,
A packet assembly time of 80 bits of audio, or 1.25 msec, is required. As described above, according to the mixed packet system of the present invention, it is possible to significantly reduce the delay time compared to the case of the ordinary packet switching system.

On the other hand, even for multiple traffic in circuit switching mode with different bandwidths or speeds, as shown in Figure 4, it is necessary to allocate a certain amount of space in the circuit switching mixed packet according to the bandwidth or speed. This eliminates the need for complex control such as securing individual bands or speeds and grouping them together.

Furthermore, according to this method, circuit switching signals and packet switching signals can be handled uniformly in the form of mixed packets. The only difference between the two is whether or not it is necessary to send and receive mixed packets at the fixed period. On the other hand, since a mixed packet is created for each of the circuit switching mode and the packet switching mode, the complexity of control can be avoided compared to a method in which both modes are combined to form a mixed packet.

Next, a method for transmitting and receiving the line-switched and packet-switched mixed packets between each communication node will be explained. First, in the configuration shown in Fig. 2 in which multiple communication nodes are coupled by a single or multiple communication loops, the time required for signal transmission around the loop for each communication loop is longer than the circuit-switched mixed packet assembly described above. Period (e.g. 125μsec)
Or configured to be an integer multiple thereof. That is, one of the communication nodes is provided with such a delay adjustment function, or a dedicated node for delay adjustment is provided. And on each communication loop,
A communication frame is provided that has a cycle equal to the circuit switching packet assembly cycle, which is 125 μsec in the previous example. Furthermore, the communication frame is
As shown in FIG. 6, it is divided into multiple time slots. Note that in FIG. 6, the frame synchronization pattern bits are omitted. Each communication node divides the circuit-switched and packet-switched mixed packets (hereinafter simply referred to as "mixed packets" refers to both circuit-switched and packet-switched mixed packets) into the size of this time slot. The mixed packets are divided and monitored from the beginning of the frame, and each time an empty time slot is detected, the divided mixed packets are sequentially sent out onto the communication loop. In addition, in the above vacant time slot,
It is assumed that empty time slots that occur due to the incorporation of mixed packets addressed to the own node into the node are also included. Therefore, one mixed packet is transmitted using a plurality of discrete time slots within one frame. Furthermore, if there are many signals to be transmitted within one frame, it is also possible to transmit the mixed packet using all available time slots.

Each time slot is provided with several indicators to indicate whether each time slot is empty/occupied and to distinguish between a plurality of mixed packets. For example, as shown in FIG. 6, at the beginning of each time slot there is an empty/busy display section I/B, a mixed packet head display section H, and a mixed packet identification section PID.
will be established. The empty/busy display section I/B displays whether the time slot is vacant or in use, and each communication node first monitors this part of each time slot when sending out a mixed packet. to find a free timeslot, then change this part of that timeslot to ``in use'', and then
One mixed packet divided into the size of a time slot is sent onto that time slot. Also, among the time slots that have transmitted mixed packets addressed to the own node, an empty indication is written in the I/B of the time slots that the own node does not use for sending out mixed packets. For example, "1" is written in the mixed packet head display section H when the time slot corresponds to the beginning of the mixed packet when the time slot sends out the mixed packet, and "0" is written otherwise. . On the receiving side, for the time slots that are displayed as "in use", the mixed packet head display section H is also observed, and
If the beginning is displayed here, the destination communication node address field D (see FIGS. 4 and 5) at the beginning of the information in that time slot is monitored. If the packet is addressed to its own node, it continues to receive the source communication node address section S and exchange mode display section M, and identifies the destination node and the line-switched/packet-switched mixed packet. Based on the results, the subsequent control signal part C, circuit switched signal part CS, packet switched signal part PS, etc. are received and distributed to a predetermined location such as a buffer memory. In this way, it becomes possible to detect and receive the first time slot of a mixed packet addressed to the own node.

Further, a number for identifying a large number of mixed packets sent from each communication node is written in the mixed packet identification section PID. For example, the slot number of the first time slot of the mixed packet is written in the PID of the time slots belonging to the same mixed packet. A specific example is shown in FIG.
In FIG. 7, one mixed packet is sent to discrete time slots #2, #4, #5, and #7.
... is divided into #n-1 and sent out on a certain communication loop. The PIDs of those time slots are
The head time slot number #2 is written, and the head of the mixed packet in time slot #2 is displayed in the mixed packet head display section H mentioned above. Needless to say, "in use" is displayed on the vacancy display section I/B of these time slots. On the other hand, on the receiving side, by monitoring the mixed packet head display section and destination communication node address mentioned earlier,
By detecting the first time slot of a mixed packet addressed to the own node and memorizing its number, the subsequent time slots can be removed at random by extracting the time slots with that number written in the PID. Mixed packets that are divided and transmitted can also be restored to their original state. At this time, the first time slot of the mixed packet
It doesn't matter what is written in the PID, but if you write your own time slot number here, this alone can indicate that it is the beginning of a mixed packet. Therefore, it is also possible to eliminate the need for the mixed packet head display section H mentioned above. Also, among the communication nodes, there is a special node that controls the operation and management of the entire exchange, and a specific time slot is fixedly allocated for communication between this special node and other general communication nodes. Time and time not used for communication between communicating nodes.
If there are slots, or if there are timeslot numbers that do not exist, an alternative way to display vacancies is to use those timeslot numbers as PIDs.
It is also possible to write it in a section. That is, by doing so, equivalent operation can be performed without the special provision of the occupancy display section I/B, and the overhead within the communication frame can be reduced.

Another method for identifying mixed packets is to connect the time slots belonging to the same mixed packet in a chain, and the PID of each time slot is
Another possible method is to write down the slot number of each preceding time slot. A specific example is shown in FIG. Figure 8 shows time slot #2 of a communication loop with one mixed packet, similar to Figure 7.
#4, #5, #7, ......, #n-1 are shown for transmission, but the mixed packet identification section PID contains the slot of the previous time slot belonging to the same mixed packet. A number is written on each. On the receiving side, if you detect the first time slot, detect the next time slot that has that slot number in the PID field, and proceed through the chain in the same way, you can create a mixed packet in much the same way as in Figure 7. It is possible to restore it. In this method, the last time slot number (#n in Figure 8) is not written in the PID (because one mixed packet is completed within one frame), so this number is used as an empty display or as a packet. It is also possible to use this instead of the first display. Also, as in the case of the example in Figure 7, if there is a time slot or a time slot number that is generally not used for communication between communication nodes, that number can be used instead of an empty display or a packet head display. be.

Still another method for identifying mixed packets is to allocate a unique and different number to each mixed packet and write that number in the mixed packet identification section PID. There are two methods of assigning a unique number to each combination of transmitting and receiving communication nodes, and a method of assigning a unique number fixedly to each combination of transmitting and receiving communication nodes, and a method of assigning a unique number to each combination of transmitting and receiving communication nodes, and a method of assigning a unique number to each combination of transmitting and receiving communication nodes.
There is a method of monitoring the communication loop and selecting an unused number as a unique number. A typical example of the former is a method in which the unique number is the destination communication node address and the source communication node address arranged as they are.

On the other hand, it is also possible to allocate a number to each combination of sending and receiving communication nodes independently of the communication node address, which reduces the bit width of the PID by about 1 bit compared to the case where the addresses are lined up as they are. I can do it. In these methods, the PID
contains directly or indirectly information regarding the destination communication node address and the source communication node address. Therefore, among the components of the mixed packet shown in FIGS. 4 and 5, the communication node address D and S can be omitted.

On the other hand, in the method of selecting an empty number that does not appear on the communication loop and using it as a unique number at the start of transmission of a mixed packet, the relationship between the unique number and the transmitting/receiving communication node address of the mixed packet is first determined by other communication nodes. However, once the declaration is successful, mixed packets can be processed using only that unique number. It becomes possible to identify. Therefore, in this case as well, addresses D and S can be omitted among the constituent elements of the mixed packet. Even in the case of these methods,
It is possible to provide a specific unique number in place of the vacancy display and omit the vacancy display section I/B. Furthermore, since the time slot at which each unique number first appears in the PID when monitoring from the beginning of the frame is the first time slot of the corresponding mixed packet, even in these methods, it is not necessary to display the packet beginning display section H. There is no need to provide it.

Note that when using this method, the mixed packet identification section
If the PID also has an exchange mode display function (for example, by adding one bit indicating the exchange mode to the PID), the exchange mode display part M (see Figures 4 and 5) in each mixed packet can also be used. No longer needed. In this case, with regard to mixed packets for packet exchange, there is virtually no need to be aware of frames, and all that is required is to find an empty time slot and send out the mixed packet along with the required mixed packet identification section PID, etc., which significantly improves control. Simplified.

Regardless of the method described above, according to the present invention, each time slot is indicated as empty in some form, and each communication node can identify an empty time slot (used for communication addressed to its own node, (Including time slots that become vacant on the own node)
The required number of packets are selected from the beginning of the communication frame and each mixed packet is transmitted. Therefore, if there is a large amount of speech signals to be sent, mixed packets can be sent using all available time slots. In other words, the transmission capacity of the communication loop can be utilized 100% without distinguishing between circuit-switched signals and packet-switched signals, resulting in extremely high efficiency. Moreover, circuit-switched mixed packets can always be transmitted in every frame. The reason is explained below. However, it is assumed here that calls in each circuit switching mode are full-duplex signals with equal signal speeds in both upstream and downstream directions.

As described above, in the present invention, each communication loop is configured such that the time required for one round of transmission is equal to the frame period or an integral multiple thereof. Therefore any time slot in the frame is
It always exists somewhere on the communication loop and circulates between communication nodes as time passes. In other words, it can be thought of as a belt conveyor circulating between communication nodes. Therefore, in each communication node, the time slot addressed to the own node that has traveled around the loop and reached the own node is now released and becomes an empty time slot, so it is always used for mixed packet transmission from the own node. can do. In other words, if n time slots are sent to the own node within one frame, there are generally several other free time slots, so at least n time slots should be used for transmission from the own node. will be possible. So now, for example, communication nodes A and B
When attempting to start sending and receiving circuit-switched mixed packets using one time slot between two nodes, communication node A monitors the time slots on the communication loop, detects one free time slot, and places the first time slot there. Attempt to send a circuit-switched mixed packet with the configuration shown in Figure 4. The control signal portion C of this circuit-switched mixed packet contains an instruction to the node B to use one time slot for the circuit-switched mixed packet. When node B receives this circuit-switched mixed packet and decodes the instruction, it also detects one free time slot and attempts to send the circuit-switched mixed packet addressed to node A. Since the above instructions are generally decoded after receiving the circuit-switched mixed packet from node A, the time slot used by the mixed packet can be immediately used to transmit the circuit-switched mixed packet from node B to node A. This is not possible, and node B also needs to search for a free time slot. From then on, node A and node B each send 1 frame to the other node.
Attempts to send time slot circuit-switched mixed packets. Then, if one of the nodes succeeds in sending using the mechanism described earlier,
In that frame, the other node will always be able to transmit. If such transmission becomes possible for all frames that exist during one round of the communication loop, then both nodes will continue to send each other circuit-switched mixed packets with one time slot in every frame, and the transmission will be completed all the way around the loop. During this period, one time slot per frame can be occupied between nodes A and B, and as a result, the right to transmit each frame necessary for circuit-switched signals can be continuously secured. The number of time slots required for transmitting and receiving circuit switching signals can be increased in the same way as described above, by the control signal section C having a negotiation between communication nodes, and based on this, both nodes acquire the required number of empty time slots. Realized. In this way, once continuous transmission and reception of circuit-switched mixed packets for the required number of time slots is established between nodes A and B, access from other nodes can be accessed without any special control. It is possible to maintain frame-by-frame transmission and reception of circuit-switched signals between nodes A and B without interference. Note that from the start of free time slot capture until the transmission of bidirectional circuit switching signals is established, there will be an empty space in the circuit switching mixed packet to be sent.

Generally, each communication node sends out a plurality of mixed circuit-switched and packet-switched packets for each destination communication node. After all the packets have been sent out, it is necessary to send out the mixed packet for packet exchange.

On the other hand, as mentioned above, the call signal in the packet switching mode is efficiently sent out on the communication loop while waiting according to the number of available time slots, so that transmission data is not generated intermittently. Even for telephone calls, the line/
The packet aggregation method is efficient enough.

In the above description, for the sake of simplicity, it has been assumed that each communication node transmits a mixed packet destined for any other node to any one communication loop. In fact, in the case of a configuration in which a plurality of physical communication loops exist, these may be logically considered as one communication loop and the same method as described above may be applied. Alternatively, the method described above may be employed in which each mixed packet is sent to one of the physical communication loops.
Additionally, in this case, if the amount of communication between specific communication nodes is large, the amount of communication required can be reduced by creating multiple mixed packets between those nodes and sending them to separate physical communication loops. A method to ensure this can also be easily configured.

FIG. 9 and FIG. 10 are schematic diagrams showing one configuration example of a communication node in the present invention. However, this example is a configuration example in which one mixed packet is sent to the same communication loop. In FIG. 9, the communication node 20 is provided with a mixed packet transmitter/receiver 30 for each of the plurality of communication loops 21,
According to any of the methods described above, among the mixed packets sent out from each node, the mixed packet addressed to the node itself is taken in from the communication loop, and the mixed packet addressed to other nodes is sent onto the communication loop.
The mixed packet assembly/disassembly circuit 31 is connected to the transmission line 1.
The circuit switching mode speech signal and the packet switching mode speech signal coming from 0 are assembled into mixed packets for circuit switching and packet switching for each destination communication node, and each is sent to one of the mixed packet transmitting/receiving sections 30. At the same time, it receives the mixed packet addressed to its own node from the communication loop 21 transferred from each mixed packet transmitter/receiver 30, decomposes it into the original circuit switching mode call signal and packet switching mode call signal, and sends it to the destination. It is sent to the transmission line 10 of The control section 32 creates/analyzes the control signal part C (see FIG. 4) of the line-switched mixed packet to be transmitted and received, processes the speech signal in the packet-switched mode, and controls the entire communication node. The clock section 33 supplies an operating clock within the communication node synchronized with the unified clock within the exchange, and also supplies various timing signals within the communication node. Clock synchronization is well known to those skilled in the art and will not be discussed in detail.

FIG. 10 is an explanatory diagram showing a more detailed configuration of the mixed packet transmitting/receiving section 30 in FIG. 9. In FIG. In FIG. 10, a signal transmitted from another node on a communication loop 21 is received by a receiving circuit 34, equalized and amplified, and regenerated into a digital signal. The frame synchronization circuit 35 detects the frame phase from the reproduced digital signal sequence, and creates a timing signal for the operation within the mixed packet transmitter/receiver 30 based on it. Based on this timing signal, the receiving time slot control circuit 36 controls the vacancy display section I/O of each time slot.
B. The mixed packet head display section H and the mixed packet identification section PID are monitored, a time slot in which a large number of mixed packets addressed to the own node exists is detected, and its contents are written to the reception buffer memory circuits 37a and 37b. Instruct. Reception buffer memory circuit 3
A mixed packet for line switching is written in 7a, and a mixed packet for packet switching is written in 37b. The mixed packet written to the receive buffer memory is
Mixed packet assembly/disassembly circuit 3 in Figure 9
Transferred to 1. On the other hand, the transmission mixed packet transferred from the mixed packet assembly/disassembly circuit 31 is stored in the transmission buffer memories 38a and 38b, and then transferred to the transmission time slot control circuit 39.
is transmitted on the communication loop according to the control of The transmission buffer memory circuit 38a stores mixed packets for line switching, and the transmission buffer memory circuit 38b stores mixed packets for packet switching. The reception time slot control circuit 36 detects a time slot in which a mixed packet addressed to its own node exists, and at the same time detects an empty time slot, and selects a time slot in which a combined packet of both can be sent as a transmission time slot control circuit 39. to notify. If the mixed packet to be sent exists in the sending buffer memory circuits 38a, 38b, the transmission time slot control circuit 39 sends the mixed packet to the relevant time slot in accordance with the notification. At this time, as described above, the circuit-switched mixed packet is sent out before the packet-switched mixed packet. Necessary signals are also written in the empty/busy display section I/B, mixed packet head display section H, and mixed packet identification section PID of the relevant time slot using the method described above. On the other hand, even if there is a time slot that can be sent, if there is no mixed packet to be sent, the empty display section I/
Write the empty display signal to B. When writing the PID or sending out a mixed packet, the switch 40 selects the insertion side terminal 41 under the control of the sending time slot control circuit 39. In addition, for a time slot in use by a mixed packet from another communication node, the switch 40 connects the terminal 42 on the passing side.
Select to allow signals sent from other communication nodes to pass through as is. In the delay circuit 43, the reception time slot control circuit 36 analyzes the I/B, H, and PID of each time slot, and the transmission time slot control circuit 39 analyzes the I/B, H, and PID of each time slot.
This is a circuit to compensate for the delay until PID is written. The signal selected by switch 40 is sent out onto communication loop 21 again by transmitting circuit 44 and transmitted to the next communication node.

As described above, according to the present invention, both circuit-switched signals and packet-switched signals can be handled uniformly in the form of the same mixed packet, making it possible to realize true integration. Therefore, there is no need to allocate the transmission capacity of the communication loop to both parties in advance, and the capacity can be dynamically occupied instantaneously as needed, so control is simple and there is no waste as in the conventional example. It is extremely efficient. Furthermore, once the required amount of time slots can be secured between specific nodes, circuit-switched mixed packets can be sent out every frame thereafter.
For circuit-switched signals, there is no delay variation that is characteristic of conventional packet-switched systems, and time transparency is guaranteed. Further, since a mixed packet format in which a plurality of simultaneous call signals are integrated is adopted, the overhead per one call is small, and the amount of call signals per one call occupied in the mixed packet can be reduced. As a result, the so-called packet assembly time can be shortened, and the line-switched mixed packet sending interval, that is, the frame period, can be shortened, so that the overall transmission delay can be kept small. In addition, by providing a mixed packet identification section PID section in each time slot, it is possible to combine as many time slots as necessary for each frame and send out mixed packets of variable length. It is possible to provide a highly flexible exchange function even for communications and communications with different traffic characteristics, that is, so-called multi-source traffic. Therefore, the present invention is extremely effective as a method of integrating line switching/packet switching and realizing various communication services using a single switching device. Furthermore, if the configuration of FIG. 2 is regarded as a local area network, the present invention can be similarly applied to a local area network and has great effects.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a conventional line/packet integrated switch, Figure 2 is a block diagram showing the configuration of a line/packet integrated switch that can be inferred from a conventional local network system, and Figure 3 is a block diagram showing the configuration of a line/packet integrated switch that can be inferred from a conventional local network system.
FIG. 4 is an explanatory diagram showing the configuration of a mixed packet for line switching in the present invention, and FIG. 5 is an explanatory diagram showing the configuration of a mixed packet for packet switching in the present invention. 6 are explanatory diagrams showing the frame structure according to the present invention, FIGS. 7 and 8 are explanatory diagrams showing how to use the frame according to the present invention, and FIGS. 9 and 10 are
The figure is a block diagram showing an example of the configuration of a communication node according to the present invention. In the figure, 10, 12, 14 are transmission lines, 11
13 is a line switching unit, 15 is a packet switching unit, 20 is a communication node, 21 is a communication loop, 30 is a mixed packet transmission/reception circuit, 31 is a mixed packet assembly/disassembly circuit, 32 is a communication node control unit, 33 is a clock circuit, 34 is a receiving circuit, 3
5 is a frame synchronization circuit, 36 is a reception time slot control circuit, 37 is a reception buffer memory circuit,
36 is a transmission buffer memory circuit, 39 is a transmission time slot control circuit, 40 is a switch, 43 is a delay circuit, and 44 is a transmission circuit.

Claims (1)

[Claims] 1. In a line/packet integrated switching network consisting of a single or multiple communication loops and a plurality of communication nodes that commonly access the communication loops,
The communication loop is provided with a frame having a cycle of the time required for signal transmission around the loop, the frame is divided into a plurality of time slots, and each communication node receives a circuit switching signal arriving from a subscriber terminal or a trunk line. The frames are classified by destination communication node for each cycle, a plurality of circuit switching signals for each destination communication node are created into one or more circuit switching mixed packets, and the circuit switching mixed packets are time slotted. Each time an empty time slot is detected, the packet-switched signals are transmitted on the communication loop, and the packet-switched signals arriving from the subscriber terminal or trunk line are classified by destination communication node, and one time slot is sent to each destination communication node. A mixed packet for packet exchange or a plurality of mixed packets for packet exchange are created, the mixed packet for packet exchange is divided into the size of a time slot, and is transmitted on the communication loop each time an empty time slot is detected, and simultaneously transmitted to each of the communication nodes. finds and receives circuit-switched mixed packets and packet-switched mixed packets addressed to its own node among the circuit-switched mixed packets and packet-switched mixed packets transmitted on the communication loop, and A circuit/packet integrated switching system characterized in that mixed packets for switching and mixed packets for packet switching are decomposed into individual circuit switching signals and packet switching signals and sent to subscriber terminals or trunk lines. 2. The frame is divided into a plurality of time slots, and the line-switched mixed packet and the packet-switched mixed packet are transmitted using a required number of the time slots. Line/packet integrated switching method described in .