JPH0542490Y2 - - Google Patents

Description

[Detailed description of the invention] [Purpose of the invention] (Field of industrial application) The present invention relates to a temperature compensation circuit for a DC constant voltage circuit that utilizes the gate voltage/drain current characteristics of an FET.

(Prior Art) DC constant voltage circuits using FETs are widely used in small electronic devices because they can provide relatively good operating performance with an extremely simple configuration. Second
The figure shows an example of the simplest configuration of this type of DC constant voltage circuit. That is, in FIG. 2, 1 and 2 are a pair of input terminals, 3 and 4 are a pair of output terminals, and in this case, the input terminal 2 and the output terminal 4 are connected to the ground level, respectively. 5 is a depression type MOSFET, for example.
The drain and source are interposed between the input terminal 1 and the output terminal 3. 6 is output terminal 3,
A variable resistor connected to divide the output voltage Vout between 4 and the divided voltage from the sliding terminal 6a.
Vd (divided voltage between output terminal 3 and sliding terminal 6a)
is configured to feed back to the gate of FET5.

Here, Figure 3 shows the relationship between the gate-source voltage VGS and drain current ID of a general depletion type FET at ambient temperature Ta (=15℃, 25℃,
60℃) is shown as a parameter. As is clear from the characteristics of the FET, in the circuit configuration shown in FIG. 2, when the output voltage Vout increases due to fluctuations in the input voltage Vin, the divided voltage Vd at the variable resistor 6 increases and As the gate-source voltage V _GS increases, its drain current decreases.
As I _D decreases, the output voltage Vout will decrease. Additionally, when the output voltage Vout decreases due to fluctuations in the input voltage Vin, the divided voltage Vd decreases and the gate-source voltage V _GS of FET 5 decreases, so its drain current I _D increases and the output voltage decreases. The voltage Vout will be increased. Therefore, by repeating the above operation, the output voltage
Vout is controlled to be a constant voltage depending on the position of the slider 6a of the variable resistor 6.

(Problem that the invention attempts to solve) The gate voltage and drain current characteristics of FET5 are as follows:
As shown in FIG. 3, there is a temperature drift. Therefore, in the DC constant voltage circuit shown in FIG. 2 above,
When the drain current I _D of FET5 is set to be less than Iz shown in Figure 3, that is, the drain current I _D
If the temperature coefficient of Vout is set to a positive range, the output current (drain current _ID ) will increase as the ambient temperature rises, so the output voltage Vout will change from the initial setting value by the variable resistor 6. It will rise. Therefore, in this way, a DC constant voltage circuit configured to use a depletion type FET interposed between the input terminal and the output terminal for voltage adjustment within the range where the drain current exhibits a positive temperature coefficient can be used as a power supply. If it is desirable to further stabilize the power supply voltage of electronic equipment, it is necessary to provide some kind of temperature compensation circuit. However, conventionally, there has been no temperature compensation circuit that has a simple structure and can easily adjust the degree of temperature compensation, and this has remained an unresolved problem.

The present invention was devised in view of the above circumstances, and its purpose is to be able to perform temperature compensation of the output voltage with an extremely simple structure that only requires the addition of a small number of parts, and to easily adjust the degree of temperature compensation. An object of the present invention is to provide a temperature compensation circuit for a DC constant voltage circuit, which has effects such as being able to adjust the temperature.

[Structure of the invention] (Means for solving the problem) The present invention is a DC constant voltage circuit that utilizes the gate voltage/drain current characteristics of a depletion type FET, in particular, a DC constant voltage circuit that divides the output voltage using a voltage dividing means. Temperature compensation for a DC constant voltage circuit configured to stabilize the output voltage by feeding back the voltage to the gate of the FET, and to be used within the range where the drain current of the FET exhibits a positive temperature coefficient. The circuit is intended for a circuit, and includes a bipolar transistor receiving the divided voltage by the voltage dividing means as a base bias voltage, and a series circuit of a first resistor and a collector-emitter of the bipolar transistor and a second resistor. is connected in parallel with the voltage dividing means, and the voltage across the first resistor is fed back to the gate of the FET.

(Function) Since the depletion type FET interposed between the input terminal and the output terminal is used within the range where its drain current shows a positive temperature coefficient, the output voltage of the DC constant voltage circuit will change as the ambient temperature increases. It will start to fluctuate in the direction of increasing according to. On the other hand, the base-emitter voltage of a bipolar transistor has a negative temperature coefficient. Therefore, when the output voltage and the voltage divided by the voltage dividing means rise as the ambient temperature rises, the base-emitter voltage of the bipolar transistor decreases, and the voltage between the base and emitter of the bipolar transistor decreases. The voltage to be shared will change. At this time, if the voltage shared by the first resistor is set to increase as the base-emitter voltage changes as the ambient temperature rises, then
The temperature drift of the FET is compensated for by the change in the shared voltage of the first resistor as described above, and the output voltage of the DC constant voltage circuit becomes stable against changes in ambient temperature. Further, the degree of temperature compensation as described above can be adjusted very easily by appropriately selecting the resistance values of the first and second resistors.

(Example) An example of the present invention will be described below with reference to FIG. That is, 11 and 12 are a pair of input terminals to which the output of a DC power supply (not shown) is applied, and 13 and 14 are a pair of output terminals to which a load (not shown) is connected. In this case, the input terminal 12 and the output terminal 14 are connected to the ground, respectively. Connected to level. 15 is a depletion type n-channel MOSFET whose drain and source are interposed between the input terminal 11 and the output terminal 13. 16 is the output voltage between output terminals 13 and 14
A variable resistor serving as voltage dividing means is connected to divide Vout, and its sliding terminal 16a is connected to the base of an NPN type bipolar transistor 17. Further, the variable resistor 16 is connected in parallel with a first resistor 18 and a series circuit of the collector-emitter of the bipolar transistor 17 and a second resistor 19. Therefore, the bipolar transistor 17 , a divided voltage V _D between the sliding terminal 16a of the variable resistor 16 and the ground terminal is given as a base bias voltage. In addition, the collector of the bipolar transistor 17 is an FET
15 gates, which allows the first
The voltage V ₁ across the resistor 18 is fed back to the gate of the FET 15 .
In this case, the drain current _ID of the FET 15 is set to such a state that its temperature coefficient is in a positive range (a state below Iz shown in FIG. 3).

In the above configuration, when the output voltage Vout increases due to fluctuations in the input voltage Vin, the variable resistor 1
As the divided voltage V _D by 6 increases and the base bias state of the bipolar transistor 17 becomes deeper, its collector current Ic increases and the first resistor 1
The voltage V ₁ across FET 8 and the voltage applied to the gate of FET 15 increase. At this time, FET15
has the V _GS - _ID characteristic as shown in Fig. 3, so as the gate voltage of FET 15 increases as described above, its drain current _ID decreases, and thus the output The voltage Vout is now reduced. Furthermore, when the output voltage Vout decreases due to fluctuations in the input voltage Vin, the divided voltage V _D decreases and the base bias state of the bipolar transistor 17 becomes shallower, so that its collector current Ic
decreases, the voltage applied to the gate of the FET 15 becomes lower, and accordingly, the drain current _ID decreases and the output voltage Vout increases. Therefore, by repeating the above-described operation, the output voltage Vout increases as the slider 16 of the variable resistor 16 increases.
The voltage is controlled to be constant according to the position of a.

Now, the output voltage between output terminals 11 and 12
When Vout is at a constant level, the sliding terminal 16a of the variable resistor 16 outputs a divided voltage V _D at a constant level depending on its position. Therefore, the voltage V ₂ across the second resistor 19 is expressed by the following equation, where the base-emitter voltage of the bipolar transistor 17 is V _BE .

V ₂ =V _D −V _BE At this time, since the base-emitter voltage V _BE of the bipolar transistor 17 has a negative temperature coefficient, the voltage across both ends V ₂ increases as the ambient temperature rises. Therefore, the emitter current I _E of the bipolar transistor 17 is
The collector current I _C , which is approximately equal to the emitter current I _E , also increases in proportion to the amount of increase in the voltage V ₂ across the voltage V 2 . As a result, the first
The voltage V ₁ across the resistor 18 changes depending on the base-emitter voltage V _BE of the bipolar transistor 17 and the resistance ratio of both resistors 18 and 19 (actually, the voltage V 1 across the resistor 18 changes depending on the resistance ratio between the two resistors 18 and 19. 16a
(depending on location, etc.) and increases as the ambient temperature rises. In this case, the first resistor 18
The voltage across the terminal V ₁ is given as the gate voltage of the FET 15. Therefore, as can be understood from FIG. ₁ is now compensated for by the change in output voltage.
Vout becomes more stable. Furthermore, since the degree of change in the voltage V ₁ across the first resistor 18 that determines the degree of temperature compensation at this time depends on the resistance ratio of the first and second resistors 18 and 19, the above-mentioned temperature The degree of compensation is the first and second
This can be adjusted very easily by appropriately selecting the resistance values of the resistors 18 and 19. Of course, bipolar transistor 17 and resistors 18 and 1 are used as components for temperature compensation.
Since it is only necessary to provide 9, it is possible to prevent the structure from becoming complicated as much as possible.

In the above embodiment, an NPN type bipolar transistor is used, but a PNP type bipolar transistor may also be used.

[Effects of the invention] According to the invention, as is clear from the above explanation, the gate voltage and
In a temperature compensation circuit for a DC constant voltage circuit that utilizes drain current characteristics, it is possible to perform temperature compensation of the output voltage with an extremely simple structure that only requires the addition of a bipolar transistor and a first and second resistor. This has the practical effect that the degree of compensation can be easily adjusted.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. 2 is a diagram corresponding to FIG. 1 showing a conventional example, and FIG. 3 is a characteristic diagram showing the relationship between gate voltage and drain current of a depletion type FET. In the figure, 11 and 12 are input terminals, 13 and 14 are output terminals, 15 is a FET, 16 is a variable resistor (voltage dividing means), 17 is a bipolar transistor, 18 is a first resistor, and 19 is a second resistor. show.

Claims (1)

[Scope of utility model registration request] The input terminal is connected to the drain terminal of a depletion type FET, and the source terminal of the FET is connected to the output terminal, and the voltage obtained by dividing the output voltage from the output terminal by a voltage dividing means is applied to the FET.
The FET is configured to stabilize the output voltage by feedback to the gate of the FET.
In a DC constant voltage circuit used in a range where the drain current exhibits a positive temperature coefficient, a bipolar transistor receiving the divided voltage as a base bias voltage is provided, and a voltage between the first resistor and the collector-emitter of the bipolar transistor is provided. In addition, a series circuit of a second resistor is connected in parallel with the voltage dividing means, and the voltage across the first resistor is set to the voltage across the first resistor.
A temperature compensation circuit for a DC constant voltage circuit, characterized in that it is configured to provide feedback to the gate of an FET.