JPH0542211B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a ground fault protection relay system for preventing malfunction of a ground fault directional relay used for ground fault protection of an ungrounded power distribution system.

(Prior art) Normally, this type of ground fault direction relay is based on the phase comparison principle, and is a relay when the phase difference between the zero-sequence current and zero-sequence voltage that occurs during a ground fault is within approximately 90 degrees in electrical angle. is configured to obtain output. The basic block diagram is shown in Fig. 3. In the figure, 11 is a limiter into which the zero-sequence current from the secondary side of the zero-sequence current transformer is input, 12 is a filter, and 13 is a limiter.
1 is a square wave conversion circuit; 14 is a phase shift circuit into which the zero-phase voltage from the secondary side of the grounded instrument transformer is input;
5 is a filter, 16 is a square wave conversion circuit, 17 is an AND circuit, and 18 is a phase overlap angle measurement circuit that generates a phase comparison output when the phase overlap angle between zero-sequence current and zero-sequence voltage exceeds a predetermined value. , 19 indicate integration circuits for the purpose of continuous operation output and operation delay, respectively.

Here, since the power factor angle of the ground charging current is 60° to ₈₀ °, as shown in FIG. _The phase difference angle between the zero-sequence current I ₀ and the zero-sequence voltage V ₀ when
is a constant) If the phase overlap angle between kV ₀ and I ₀ is 90° or more (overlapping time is 5ms/50Hz input), that is, the phase difference between kV ₀ and I ₀ is within 90°. In this case, a phase comparison output is generated from the phase overlap angle measuring circuit 18, and then an operating output of the ground fault direction relay is obtained via the integrating circuit 19.

Note that the filters 12 and 15 are for removing distortion of current or voltage, and are composed of low-pass filters or the like.

Now, a single-line diagram showing a simulated circuit in the event of a one-line ground fault in an ungrounded power distribution system is shown in FIG. In this Figure 5, F ₀ is the bus bar, F ₁ to Fn are the distribution lines, GPT is the ground voltage transformer, CLR is the current limiting resistor on the tertiary side, and DG ₁ to DGn are the distribution lines F ₁ to Fn.
The ground fault direction relay installed at Fn, ZCT is a zero-phase current transformer, CB ₁ ~ CBn are circuit breakers, C ₀ , C ₁ ~ Cn are the ground capacitances of bus F ₀ and distribution lines F ₁ ~ Fn, respectively. ,
R ₀ indicates the equivalent grounding resistance of the primary side of the grounded instrument transformer GPT, and Rg indicates the fault point resistance.

In this simulated circuit, the distribution line is
When a single-line ground fault occurs at F ₁ , the sum of the primary zero-sequence currents of the ground voltage voltage transformer GPT is at the fault point.
A zero-sequence current 3I ₀ , which is the sum of 3In and the total discharge current 3Ic due to the ground capacitance, flows. Therefore _, in the ground fault _direction relay DG ₁ , the above-mentioned The direction of the zero-sequence current I ₀ is determined by the phase comparison principle, and the circuit breaker
Outputs CB ₁ trip command.

When the ground fault is recovered and circuit breaker CB ₁ is reclosed, the zero-phase equivalent circuit of the ground potential transformer GPT shown in Figure 6, which had been charged to the opposite polarity, The charge of the ground capacitance C ₁ is the excitation inductance of the grounded potential transformer GPT
Discharged in a circuit including Lm and current limiting resistor CLR,
It disappears, but at this time, the grounded instrument transformer
When the excitation circuit of GPT receives DC excitation, the excitation inductance Lm (primary conversion) becomes almost zero due to the DC summation, and the ground capacitance C ₁ and the tertiary winding inductance Lt of the ground voltage instrument transformer GPT Rapid charging and discharging are repeated between the two. In Fig. 6, Rp is the primary winding resistance of the ground voltage transformer GPT, Lp is the leakage inductance, and In(t)
similarly represents the primary zero-sequence current, I(t) similarly represents the tertiary zero-sequence current, and V ₀ represents the zero-sequence voltage.

(Problem to be Solved by the Invention) The vibration phenomenon caused by charging and discharging between the ground capacitance C ₁ and the tertiary winding inductance Lt is such that the electrical energy is completely consumed by the current limiting resistor CLR. repeated until the fundamental frequency (e.g. 50
A low frequency damped oscillation (V ₀ oscillation) shown as e ₀ (t) in FIGS. 6 and 7 is generated as a subharmonic of 1/2 to 1/5 of Hz). During this vibration, when the discharge current of the ground capacitance Cn of the healthy circuit, for example Fn in Fig. 5, flows into the ground fault direction relay DGn via the current transformer ZCT, the phase of the zero-sequence voltage V ₀ and the current If the relationship falls within the operating phase range of the ground fault direction relay DGn, there is a risk that the ground fault direction relay DGn will malfunction, and there have been cases where mistrips have actually occurred.

Therefore, conventionally, in order to prevent the above-mentioned malfunction of the ground fault direction relay DGn of the healthy line,
In order to wait until the V ₀ vibration disappears, the operation time limit of each fault direction relay DG ₁ to DGn is set to approximately 200 ms, and a countermeasure is taken through time coordination. However, delaying the operating time of the ground fault direction relays DG ₁ to DGn in this way is not desirable in terms of protection coordination.

On the other hand, a frequency detection relay that operates when the frequency of the zero-sequence voltage is different from the fundamental frequency of the grid is connected in series with the operating output of the ground fault direction relay. An analog type earth fault directional protective relay system that prevents interruption of power distribution lines is known from Japanese Patent Laid-Open No. 103142/1983. Note that the frequency detection relay is
Between the zero-sequence voltage level judgment circuit and frequency detection circuit
It is composed of AND conditions.

According to this method, it is possible to prevent the malfunction of the ground fault direction relay even without taking measures such as delaying the operation time limit.

However, since the frequency detection circuit simply detects that the frequency of the zero-sequence voltage is different from the grid frequency, there is a risk of malfunction due to noise contained in the zero-sequence voltage, fluctuations in the grid frequency, etc. In the worst case, an AND condition with the output of the level determination circuit would be established in the event of a ground fault, and there was a risk that the operational output of the ground fault direction relay would be locked.

The present invention has been made to solve the above problems, and its purpose is to reliably prevent not only malfunctions but also malfunctions of ground fault direction relays, without delaying the operation time. The object of the present invention is to provide a ground fault protection relay system that improves relay performance and facilitates protection coordination.

(Means for Solving the Problems) In order to achieve the above object, the present invention determines the direction of the zero-sequence current from the phase difference between the zero-sequence voltage and the zero-sequence current of an ungrounded power distribution system, and performs a phase comparison. A lock command is issued to the ground fault direction relay that obtains the output, the ground fault overvoltage relay that receives the zero-sequence voltage, and the ground fault direction relay installed on the healthy line when low-frequency vibration of the zero-sequence voltage is detected after the ground fault has been restored. A ground fault protection device comprising a frequency detection relay as a digital relay that outputs a frequency detection relay, and obtains a final relay operating output by logical product of the outputs of the ground fault direction relay and the ground fault overvoltage relay and the inverted output of the frequency detection relay. In the relay method, the frequency detection relay samples the fundamental number of the zero-sequence voltage at a fixed period, and the positive value of the sampling data continues for a set number of times or more, and
If a negative value continues for a set number of times or more, low-frequency vibration of the zero-sequence voltage is detected and a lock command is output, and the fundamental wave frequency of the zero-sequence voltage returns to a higher frequency than the vibration frequency when the lock command was output. It is characterized in that the lock command is released after a certain off-delay time has elapsed.

(Function) In the present invention, the final operating output of the ground fault direction relay is obtained by logical product of the phase comparison output of the ground fault direction relay, the inverted output of the frequency detection relay, and the output of the ground fault overvoltage relay. Here, the frequency detection relay detects low-frequency damped vibration by detecting that the fundamental wave frequency of the zero-sequence voltage has fallen below a certain value by a series of positive values and a series of negative values of sampling data at a certain period. At that time, a relay lock command is output to lock the ground fault direction relay of the healthy line to prevent its malfunction.

In addition, when the low frequency damped vibration disappears and the frequency returns to a predetermined frequency higher than the frequency when the lock command is output, a certain off-delay time is set to prevent unnecessary operation of the ground fault direction relay, and during that time the lock is disabled. The command is continuously output, and the lock command is released after the off-delay time has elapsed.

(Example) An example of the present invention will be described below with reference to the drawings. First, FIG. 1 shows a configuration block diagram of a ground fault protection relay system according to the present invention. In the figure, 1 is a ground fault overvoltage relay to which the zero-sequence voltage V ₀ is input, 2 is a ground-fault direction relay that should prevent malfunction, and 3 is a frequency detection relay that detects the fundamental frequency of the zero-sequence voltage. The output of the fault overvoltage relay 1, the phase comparison output of the ground fault direction relay 2, and the inverted output of the frequency detection relay 3 are input to an AND circuit 4, and from the output terminal of this AND circuit 4, the final terminal of the ground fault direction relay 2 is inputted. It is now possible to obtain a realistic operational output. Note that the reason why the ground fault overvoltage relay 1 is set to the AND condition is to prevent malfunction due to mechanical shock or reaction during recovery from an external accident when the ground fault direction relay 2 is of an electromagnetic type, for example. Furthermore, the frequency detection relay 3 is composed of a digital relay, and the zero-sequence voltage V ₀ as its input is
Since this is common to the power distribution system, only one ground fault direction relay 2 can be installed, whereas there are a plurality of ground fault direction relays 2.

In this embodiment, the frequency detection relay 3 samples the fundamental number of the zero-phase voltage V ₀ every 30 degrees (every 1.667 ms), and determines whether the sampling data is a positive wave or a negative wave. For example, if the sampling data is a positive wave, if the number of consecutive waves exceeds 9, the fundamental wave frequency of the zero-sequence voltage V ₀ will be 1/(1.667ms x 9 x 2) = 33.3Hz,
A lock command ("H" level) for the ground fault direction relay 2 is output in response to low frequency vibrations below this frequency. Note that this frequency detection is performed in the same manner for negative waves, and a relay lock command is obtained under the AND condition of both positive and negative waves.

Next, the function of the frequency detection relay 3 will be explained in more detail with reference to the flowchart shown in FIG.

The program that implements this flowchart is
It is activated every 1.667 ms corresponding to the sampling interval of 30 degrees. In FIG. 2, first, in step S1, it is determined whether or not there is a relay lock release flag. Here, if there is a release flag, an off-delay operation of about 1 second is performed after the frequency is restored, so the process moves to step S14, which will be described later. If there is no release flag, it is determined in step S2 whether the zero-phase voltage _V0 is positive or negative. If this is positive, the process proceeds to step S3, where 1 is added to the count value P on the positive wave side and the count value M on the negative wave side is cleared. Conversely, if it is determined in step S2 that the wave is a negative wave, 1 is added to the negative wave side and the count value M, and the count value P on the positive wave side is cleared in step S4.

If a positive wave is now detected, the presence or absence of a lock flag is determined in step S5. If this lock flag does not exist, it is determined in the next step S6 whether the count value P exceeds 9 (corresponding to the fundamental frequency of 33.3 Hz). Here, if the frequency does not exceed 9, the frequency is 33.3Hz or higher, and the process ends without outputting a lock command. Furthermore, if the count value P exceeds 9, there is a possibility of V ₀ vibration, so in the next step S7,
Judgment result of whether the count value M exceeds 9 even on the negative wave side (for convenience, referred to as "minus ON flag")
Follow.

On the other hand, from step S4 to step S8,
If the count value M exceeds 9 even on the negative wave side,
A minus ON flag is set in step S9. Therefore, the process moves from step S7 to step S10, and if the count value M does not exceed 9, the minus ON flag is reset in step S11, and after step S7,
finish. If there is a minus ON flag, in step S10, the lock flag of the ground fault direction relay 2 is set, and at the same time, the off-delay count value p is cleared, and the process ends. At this time, the frequency detection relay 3 outputs a lock command for the ground fault direction relay 2, and the ground fault direction relay 2 is forcibly locked.

Further, in subsequent cycles, it is determined in step S5 that the lock flag is present, and the process moves to step S12. In this step S12, the zero-sequence voltage V ₀
It is determined whether the fundamental frequency has gradually recovered to a predetermined recovery value (for example, 37.5 Hz) or higher. In other words, when the count value P is 8, the fundamental wave frequency is 1/(1.667ms x 8 x 2) = 37.5Hz, so if the count value P becomes smaller than 8, the V ₀ oscillation disappears and the frequency decreases. Since it has recovered toward 50 Hz, a release flag is set in the next step S13, and 1 is added to the off-delay count value p in step S14. In step S12,
If the count value P is smaller than 8, step S15
Clear the count value p with .

Next, in step S16, the fundamental frequency is
Determine whether 1 second has passed since the frequency returned to 37.5Hz or higher. In other words, the program is counted every 1.667 ms, which is the startup cycle of the program, and when the count value p reaches 600, one second passes, so wait for this off-delay time to pass before proceeding to the next step S1.
Proceed to step 7. In step S17, the lock flag and release flag are reset, and the off-delay count value p is cleared. As a result, the relay lock command for the ground fault direction relay 2 is released. Therefore, the output signal of the frequency detection relay 3 becomes "L" level, that is, the input of the AND circuit 4 in FIG. Therefore, the relay operation output can be obtained.

As described above, in this embodiment, low-frequency damped oscillations of the zero-sequence voltage are detected under the condition that continuous positive values and continuous negative values of sampling data of a certain period are detected, so noise and fluctuations in system frequency can be detected. It is possible to obtain a lock command by detecting low frequency damped vibration with extremely high accuracy without being affected by Therefore, there is no risk of erroneously detecting low frequency damped vibration and outputting a lock command even though low frequency damped vibration is not occurring, causing the ground fault direction relay to become erroneously inoperable. Furthermore, since the ground fault direction relay 2 continues to be locked for one second even after the fundamental wave frequency is restored, it is possible to prevent the ground fault direction relay 2 from malfunctioning in an unstable state after recovery from an accident.

Here, the operating time of the ground fault direction relay 2 is 50ms to 60ms for the fundamental frequency of 50Hz, and 55ms to 65ms for the low frequency of 25Hz.On the other hand, if the frequency of V ₀ vibration is 33.3Hz, the period is about 30ms, also
If it is 30Hz, the period is about 33.3ms, and if it is 25Hz, the period is 40ms, which is sufficiently shorter than the above operation time, so according to the present invention, the ground fault direction relay 2 can be reliably locked. It is something.

(Effects of the Invention) As described above, according to the present invention, the frequency detection relay combined with the ground fault direction relay detects when the fundamental wave frequency of the zero-sequence voltage has fallen below a certain value by checking the sampling data at a certain period. Low-frequency damped vibration is detected by detecting a series of values and a series of negative values, and at that time, a relay lock command is output to lock the relay in the ground fault direction of the healthy line to prevent its malfunction.

Therefore, in the present invention, compared to a simple method such as comparing the zero-sequence voltage frequency and the grid frequency, low-frequency damped vibrations can be detected with higher accuracy without being affected by noise etc., and the result is Therefore, it is possible to reliably prevent malfunctions and malfunctions of ground fault direction relays.

In addition, even after the zero-phase voltage returns to a predetermined frequency, a certain off-delay time is set, during which the lock command is continuously output, and the lock command is released after the off-delay time has elapsed, so that the lock command is released immediately after the frequency returns. Unnecessary operation of the ground fault direction relay in a stable state can be prevented.

Since the frequency detection relay operates according to such an algorithm, it is possible to realize an extremely reliable ground fault protection relay system.

In addition, since the frequency detection relay can be implemented using software, there is no need to add special hardware to the conventional ground fault protection relay system, making it extremely economical.

[Brief explanation of drawings]

Fig. 1 is a configuration block diagram showing an embodiment of the present invention, Fig. 2 is a flowchart showing the function of the frequency detection relay, Fig. 3 is a block diagram of the ground fault direction relay, and Fig. 4 is the ground fault direction relay. Figure 5 is a simulated circuit diagram of an ungrounded power distribution system, Figure 6 is a zero-phase equivalent circuit diagram of a grounded instrument transformer, and Figure 7 is a diagram showing the operating range of a ground fault. FIG. 3 is a waveform diagram showing low frequency damped vibration. 1...Ground fault overvoltage relay, 2...Ground fault direction relay, 3...Frequency detection relay, 4...AND circuit.

Claims (1)

[Claims] 1. A ground fault direction relay that determines the direction of the zero-sequence current from the phase difference between the zero-sequence voltage and the zero-sequence current of a non-grounded power distribution system and obtains a phase comparison output; and a frequency detection relay as a digital relay that outputs a lock command to a ground fault direction relay installed on a healthy line when low frequency vibration of zero-sequence voltage is detected after recovery from a ground fault fault. In the ground fault protection relay system in which the final relay operation output is obtained by ANDing the outputs of the ground fault direction relay and the ground fault overvoltage relay and the inverted output of the frequency detection relay, the frequency detection relay is configured to The fundamental wave is sampled at a fixed period, and when the positive value of the sampling data continues for a set number of times or more, and the negative value continues for a set number of times or more, low frequency vibration of the zero-phase voltage is detected and a lock command is output. The earth fault protection relay is characterized in that the lock command is released after a certain off-delay time has elapsed after the fundamental wave frequency of the zero-phase voltage has returned to a higher frequency than the vibration frequency when the lock command was output. method.