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JPH0541337A - Manufacture of solid electrolytic capacitor - Google Patents

Manufacture of solid electrolytic capacitor

Info

Publication number
JPH0541337A
JPH0541337A JP21785491A JP21785491A JPH0541337A JP H0541337 A JPH0541337 A JP H0541337A JP 21785491 A JP21785491 A JP 21785491A JP 21785491 A JP21785491 A JP 21785491A JP H0541337 A JPH0541337 A JP H0541337A
Authority
JP
Japan
Prior art keywords
layer
polyaniline
semiconductor layer
electrolytic capacitor
solid electrolytic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21785491A
Other languages
Japanese (ja)
Inventor
Satoshi Okumura
聡 奥村
Yoshihiko Sadaoka
芳彦 定岡
Yoshiro Sakai
義郎 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinei KK
Original Assignee
Shinei KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinei KK filed Critical Shinei KK
Priority to JP21785491A priority Critical patent/JPH0541337A/en
Publication of JPH0541337A publication Critical patent/JPH0541337A/en
Pending legal-status Critical Current

Links

Landscapes

  • Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)

Abstract

PURPOSE:To make small the value of an ESR in a solid electrolytic capacitor. CONSTITUTION:In a method of forming a semiconductor layer 3 of a solid electrolytic capacitor which is formed by laminating in order a dielectric oxide film layer 2, the layer 3 and a conductor layer 4, a polyaniline solution, which is obtained by dedoping a polyaniline polymertized at a low temperature by a chemical oxidation method and is soluble to an organic solvent, and a high- molecular solution having a sulfone group to work as a dopant are alternately made to soak in the upper part of the layer 2. Thereby, the insoluble polyaniline semiconductor layer 3 is formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は高周波特性および信頼性
に優れた固体電解コンデンサの製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a solid electrolytic capacitor having excellent high frequency characteristics and reliability.

【0002】[0002]

【従来の技術】図3に示すように固体電解コンデンサの
素子は、弁作用金属たとえばアルミニュウムや、タンタ
ルからなる陽極基体1の表面に誘電体酸化被膜層2を形
成し、さらに二酸化マンガンなどの半導体層を形成する
ために、前記誘電体酸化被膜層2を硝酸マンガン水溶液
に浸漬した後、250〜350(℃)の温度で熱分解する
ことにより二酸化マンガンの半導体層3'を形成する。
そして接触抵抗を減らすために銀ペースト層等の導電体
層4を形成するものがある。また、有機物半導体層であ
るテトラシアノキノジメタン塩(以下TCNQ塩と略称)
の溶融したものを誘電体酸化被膜層2の表面に含浸させ
て、急冷することにより半導体層3'を形成するものが
ある。さらに他に誘電体酸化被膜2上にピロール、チオ
ファン、フラン等の複素環式化合物の高分子層を電解酸
化重合により形成し、これを半導体層3'とするものが
ある。
2. Description of the Related Art As shown in FIG. 3, a solid electrolytic capacitor element has a dielectric oxide film layer 2 formed on the surface of an anode substrate 1 made of a valve metal such as aluminum or tantalum, and a semiconductor such as manganese dioxide. In order to form a layer, the dielectric oxide film layer 2 is dipped in a manganese nitrate aqueous solution and then thermally decomposed at a temperature of 250 to 350 (° C.) to form a manganese dioxide semiconductor layer 3 ′.
Then, there is one in which a conductor layer 4 such as a silver paste layer is formed in order to reduce the contact resistance. In addition, a tetracyanoquinodimethane salt that is an organic semiconductor layer (hereinafter abbreviated as TCNQ salt)
There is a method in which the surface of the dielectric oxide film layer 2 is impregnated with the melted material and the semiconductor layer 3 ′ is formed by rapid cooling. Further, there is another one in which a polymer layer of a heterocyclic compound such as pyrrole, thiophane, or furan is formed on the dielectric oxide film 2 by electrolytic oxidation polymerization to form the semiconductor layer 3 '.

【0003】[0003]

【発明が解決しようとする課題】しかし、前記第1従来
例においては、二酸化マンガンの半導体層を形成する際
250〜350(℃)の高温処理をするから操作が煩雑な
ばかりでなく、誘電体酸化被膜が損傷しやすく、その結
果漏洩電流が多くなると謂う欠点がある。また、第2従
来例では、TCNQ塩がコスト高であると共に、半導体
層形成のために熔融TCNQ塩を誘電体酸化被膜層上に
含浸させ、急冷させるという工程があって、TCNQ塩
の不導体化(半導体でなくなる)を防ぐための温度管理が
非常に困難であると謂う欠点がある。上記第3の従来例
においても誘電体酸化被膜層上に複素環式化合物の高分
子からなる半導体層を電解酸化により形成しているの
で、誘電体酸化被膜層を損傷しないで形成することが困
難である。そこで、該誘電体酸化被膜層の損傷を避ける
ために、該酸化被膜形成前に陽極基体へ電解酸化重合に
より半導体層を形成し、その後化学反応により誘電体酸
化被膜層を形成できるが、該半導体層を介して化学反応
を生じさせると半導体層の物性が変わり、抵抗値が高く
なる欠点がある。このようにいずれの手段においても誘
電体酸化被膜層に損傷を与えることなく歩留良く半導体
層を形成することが困難であった。そこで本発明は上記
従来例のかかわる問題点の解決を図ることを目的とする
ものである。
However, in the above-mentioned first conventional example, since the high temperature treatment of 250 to 350 (° C.) is performed when forming the semiconductor layer of manganese dioxide, not only the operation is complicated, but also the dielectric material is used. There is a drawback that the oxide film is easily damaged, resulting in a large leakage current. In addition, in the second conventional example, the cost of TCNQ salt is high, and there is a step of impregnating the molten TCNQ salt on the dielectric oxide film layer to form a semiconductor layer and quenching the TCNQ salt. There is a drawback that it is very difficult to control the temperature in order to prevent aging (becomes a semiconductor). Also in the third conventional example, since the semiconductor layer made of the polymer of the heterocyclic compound is formed on the dielectric oxide film layer by electrolytic oxidation, it is difficult to form the dielectric oxide film layer without damaging it. Is. Therefore, in order to avoid damage to the dielectric oxide film layer, a semiconductor layer can be formed on the anode substrate by electrolytic oxidation polymerization before forming the oxide film, and then a dielectric oxide film layer can be formed by a chemical reaction. When a chemical reaction is caused through the layer, the physical properties of the semiconductor layer are changed and the resistance value becomes high. As described above, it is difficult to form the semiconductor layer with a good yield without damaging the dielectric oxide film layer by any means. Therefore, the present invention aims to solve the above-mentioned problems associated with the conventional example.

【0004】[0004]

【課題を解決するための手段】弁作用を有する金属から
なる陽極基体の表面に、陽極基体の表面に誘電体酸化被
膜層、ポリアニリン半導体層、導電体層を順次に積層形
成してなる固体電解コンデンサの前記ポリアニリン半導
体層を形成する方法において、化学酸化法で低温重合さ
せ、脱ドープすることにより得られた有機溶媒に可溶な
ポリアニリン溶液と、ドーパントとして作用するスルホ
ン基を有する高分子溶液とを交互に前記誘電体酸化被膜
層上に浸透させ、不溶性ポリアニリン半導体層を形成す
る。
SOLUTION: A solid electrolysis in which a dielectric oxide film layer, a polyaniline semiconductor layer, and a conductor layer are sequentially laminated on the surface of an anode substrate made of a metal having a valve action. In the method for forming the polyaniline semiconductor layer of a capacitor, a polyaniline solution soluble in an organic solvent obtained by low-temperature polymerization by a chemical oxidation method and dedoping, and a polymer solution having a sulfone group acting as a dopant Are alternately permeated onto the dielectric oxide film layer to form an insoluble polyaniline semiconductor layer.

【0005】[0005]

【作用】誘電体層上に化学重合法で低温重合させて半導
体層を形成し、熱処理による該誘電体層の損傷を伴うこ
となく安定した状態で形成できる。
The semiconductor layer is formed on the dielectric layer by low temperature polymerization by the chemical polymerization method, and can be formed in a stable state without being damaged by the heat treatment.

【0006】[0006]

【実施例】次に本発明について図1、図2に示す製品要
部と対照しながら実施例により詳細に説明すると、陽極
基体1としてアルミニュム(その他タンタルおよびこれ
らを基質とする合金等弁作用を有する金属がいずれも使
用できる)を用い、これをアジピン酸アンモニュウム水
溶液中で化成処理して、その表面に誘電体酸化被膜層2
(弁作用のある陽極基体金属自体の酸化物からなる層が
望ましい、また、酸化物層を設ける手段は、従来の方法
によることを妨げない)を形成した26(μF/cm2)のア
ルミニュムエッチング箔(以下化成箔と呼ぶ)の小片0.
3×0.6(cm)に陽極端子5を溶接する。そして可溶性
ポリアニリンを得るには、3N硫酸水溶液200(ml)に
酸化剤として過硫酸アンモニュウム6.85(g)(塩化第
2鉄等の使用が可能)を溶解させ、−7(℃)に冷却した
後アニリン1.4(g)を徐々に滴下し、90分重合するこ
とにより不溶性ポリアニリンが合成される。その後重合
生成物を蒸留水で洗浄後アルカリ水溶液として28(%)
のアンモニア水(水酸化ナトリウム溶液でも良い)に24
時間浸漬し、さらに蒸留水にて洗浄、減圧乾燥した。こ
れを可溶性ポリアニリンの溶媒であるジメチルホルムア
ミド(またはN―メチル―2―ピロリト)に溶解し、ポリ
アニリン溶液を得た。次に前記化成箔をポリアニリン溶
液と、ドーパントとして働く高分子のポリ―2―アクリ
ルアミド―2―メチルプロパンスルホン酸(スルホン酸
基を有するものであればいずれでも良い)のジメチルホ
ルムアミド溶液とに交互に繰り返し浸漬し、減圧乾燥す
ることにより、すでに形成している前記誘電体酸化被膜
層2上に不溶性ポリアニリン半導体層3を形成する。そ
して該化成箔を銀ペースト溶液に浸漬することにより、
前記形成した不溶性ポリアニリン半導体層3上に銀ペー
ストの導電体層4を形成し、さらに銀ペーストで陰極端
子6を固定し、これを樹脂にて封止して固体電解コンデ
ンサを得た。そしてこのコンデンサの特性は、静電容量
2.11(μF)、誘電正接(tanδ)0.015、周波数1
00(KHz)時における等価直列抵抗(ESR)0.13
(Ω)、漏れ電流0.01(μA)であった。このようにし
て本発明の固体電解コンデンサ素子のポリアニリン半導
体層4は、脱ドープすることにより得られた、有機溶媒
に可溶なポリアニリン溶液と、ドーパントとして作用す
るスルホン酸基を有する高分子溶液とを交互に誘電体酸
化被膜層3上に浸透させることにより形成できる。
EXAMPLES The present invention will now be described in more detail by way of examples in contrast with the main parts of the products shown in FIGS. 1 and 2. Aluminum (other tantalum and alloys using these as substrates, etc., as the anode substrate 1 have a valve action. (Any metal that can be used can be used), and this is subjected to a chemical conversion treatment in an aqueous ammonium adipate solution, and the dielectric oxide layer 2
(A layer made of an oxide of the anode base metal itself having a valve action is preferable, and the means for providing the oxide layer does not prevent the conventional method) formed 26 (μF / cm 2 ) aluminum A small piece of etching foil (hereinafter called chemical foil).
Weld the anode terminal 5 to 3 × 0.6 (cm). In order to obtain soluble polyaniline, ammonium persulfate 6.85 (g) (a ferric chloride or the like can be used) is dissolved as an oxidant in 3N sulfuric acid aqueous solution 200 (ml) and cooled to -7 (° C). After that, 1.4 (g) of aniline was gradually added dropwise and polymerized for 90 minutes to synthesize insoluble polyaniline. After that, the polymerized product was washed with distilled water to give an alkaline aqueous solution of 28%.
24 mL of ammonia water (sodium hydroxide solution may be used)
It was immersed for a time, washed with distilled water and dried under reduced pressure. This was dissolved in dimethylformamide (or N-methyl-2-pyrrolito) which is a solvent for soluble polyaniline to obtain a polyaniline solution. Next, the above chemical conversion foil was alternated with a polyaniline solution and a dimethylformamide solution of polymer poly-2-acrylamido-2-methylpropanesulfonic acid (which has a sulfonic acid group) which functions as a dopant. By repeatedly dipping and drying under reduced pressure, the insoluble polyaniline semiconductor layer 3 is formed on the dielectric oxide film layer 2 already formed. And by immersing the formed foil in a silver paste solution,
A conductor layer 4 of silver paste was formed on the formed insoluble polyaniline semiconductor layer 3, and a cathode terminal 6 was fixed with silver paste, which was sealed with resin to obtain a solid electrolytic capacitor. The characteristics of this capacitor are as follows: electrostatic capacity 2.11 (μF), dielectric loss tangent (tan δ) 0.015, frequency 1
Equivalent series resistance (ESR) at 00 (KHz) 0.13
(Ω) and leakage current was 0.01 (μA). In this way, the polyaniline semiconductor layer 4 of the solid electrolytic capacitor element of the present invention comprises a polyaniline solution soluble in an organic solvent, obtained by dedoping, and a polymer solution having a sulfonic acid group acting as a dopant. Can be formed by alternately permeating the dielectric oxide layer 3 on the dielectric oxide layer 3.

【0007】[0007]

【発明の効果】弁作用金属からなる陽極基体の表面に誘
電体酸化被膜層、半導体層、導電体層を順次積層形成し
てなる固体電解コンデンサの前記半導体層を製造する方
法において、誘電体酸化被膜層上にポリアニリン溶液
と、スルホン酸基を有する高分子溶液とを交互に浸透さ
せることにより得られたポリアニリン半導体層は、高周
波領域でESRの値の小さな固体電解コンデンサを得る
ことができる。
Industrial Applicability The method for producing the semiconductor layer of the solid electrolytic capacitor in which the dielectric oxide film layer, the semiconductor layer and the conductor layer are sequentially laminated on the surface of the anode substrate made of a valve metal, The polyaniline semiconductor layer obtained by alternately permeating the polyaniline solution and the polymer solution having a sulfonic acid group on the coating layer can provide a solid electrolytic capacitor having a small ESR value in a high frequency region.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明により得たコンデンサの模式拡大断面図
である。
FIG. 1 is a schematic enlarged sectional view of a capacitor obtained according to the present invention.

【図2】同上平面略図である。FIG. 2 is a schematic plan view of the same.

【図3】従来のコンデンサの拡大断面図である。FIG. 3 is an enlarged cross-sectional view of a conventional capacitor.

【符号の説明】[Explanation of symbols]

1 陽極基体 2 誘電体酸化被膜層 3 ポリアニリン半導体層 4 誘電体層 DESCRIPTION OF SYMBOLS 1 Anode substrate 2 Dielectric oxide film layer 3 Polyaniline semiconductor layer 4 Dielectric layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 弁作用を有する金属からなる陽極基体の
表面に、誘電体酸化被膜層、ポリアニリン半導体層、導
電体層を順次に積層形成してなる固体電解コンデンサの
前記ポリアニリン半導体層を形成する方法において、化
学酸化法で低温重合させ、脱ドープすることにより得ら
れた有機溶媒に可溶なポリアニリン溶液と、ドーパント
として作用するスルホン基を有する高分子溶液とを交互
に前記誘電体酸化被膜層上に浸透させ、不溶性ポリアニ
リン半導体層を形成することを特徴とする固体電解コン
デンサの製造方法。
1. A polyaniline semiconductor layer of a solid electrolytic capacitor in which a dielectric oxide film layer, a polyaniline semiconductor layer, and a conductor layer are sequentially laminated on the surface of an anode substrate made of a metal having a valve action. In the method, the organic oxide-soluble polyaniline solution obtained by low-temperature polymerization by a chemical oxidation method and dedoping, and a polymer solution having a sulfone group acting as a dopant are alternately formed. A method for producing a solid electrolytic capacitor, which comprises permeating the layer above to form an insoluble polyaniline semiconductor layer.
JP21785491A 1991-08-02 1991-08-02 Manufacture of solid electrolytic capacitor Pending JPH0541337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21785491A JPH0541337A (en) 1991-08-02 1991-08-02 Manufacture of solid electrolytic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21785491A JPH0541337A (en) 1991-08-02 1991-08-02 Manufacture of solid electrolytic capacitor

Publications (1)

Publication Number Publication Date
JPH0541337A true JPH0541337A (en) 1993-02-19

Family

ID=16710810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21785491A Pending JPH0541337A (en) 1991-08-02 1991-08-02 Manufacture of solid electrolytic capacitor

Country Status (1)

Country Link
JP (1) JPH0541337A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0652576A2 (en) * 1993-11-10 1995-05-10 Nec Corporation Method of manufacturing solid electrolytic capacitor
US6873518B2 (en) 2001-09-20 2005-03-29 Nec Corporation Shielded strip line device and method of manufacture thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0652576A2 (en) * 1993-11-10 1995-05-10 Nec Corporation Method of manufacturing solid electrolytic capacitor
EP0652576A3 (en) * 1993-11-10 1995-07-26 Nippon Electric Co Method of manufacturing solid electrolytic capacitor.
US6873518B2 (en) 2001-09-20 2005-03-29 Nec Corporation Shielded strip line device and method of manufacture thereof

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