JPH05334426A - Image data storage device - Google Patents

Abstract

PURPOSE:To improve a reading processing speed even in the case of data read out reversely in the vertical and horizontal directions by writing read image data in an image memory so that the vertical picture element data of the read image data are written in continuous addresses. CONSTITUTION:In the case of writing respective picture element data of image data into the image memory 10 constituted of a DRAM, addresses storing respective picture element data constituting the image data in the memory 10 are computed from respective values X, Y outputted from X and Y position counters 12, 13 by an arithmetic circuit 14 based on a prescribed calculation formula and respective picture element data are written in the corresponding positions. Namely image data read out by an image reader 11 are written in the memory 10 so that the addresses of picture element data adjacent to each other in the sub-scanning direction. Plural picture element data are read out by adopting a normal reading mode for image data whose vertical and horizontal directions are normally read out and adopting a page mode to image data read out reversely in the vertical and horizontal directions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data storage device for temporarily storing image data such as characters drawn on a form read by an image reading device in an image memory and reading the image data as needed. In particular, the present invention relates to an image data storage device capable of rotating image data read vertically and horizontally due to dimensional restrictions of the image reading device and reading the image data as normal vertical and horizontal image data.

[0002]

2. Description of the Related Art Generally, an image reading apparatus incorporates a line sensor for reading linear image data for one horizontal row at a time. Then, the line sensor is brought into contact with the image to be read, and the image is moved in a direction orthogonal to the line sensor. Note that it is also possible to move the line sensor while keeping the image stationary.

Characters of the vertically long form 1a shown in FIG. 6 (a),
When reading an image composed of figures, the line sensor is aligned in the horizontal direction (main scanning direction) of the form 1a, and the line sensor is moved in the vertical direction (sub scanning direction). In this case, the character of the image data read by the image reading device is the upright character 3a as shown in FIG. 7A in the image memory 2 in the information processing device to which the image processing device is connected.
Becomes

However, since the length of the line sensor of the image reading apparatus has a certain limitation, in the horizontally long form 1b as shown in FIG. The line sensor is moved in the lateral direction of 1b. In this case, the characters of the image data read by the image reading device become horizontal characters 3b in the image memory 2 in the information processing device as shown in FIG. 7B.

Then, the information processing apparatus reads each character 3a, 3b of the image data read in the image memory 2, for example, character by character, performs pattern recognition on the character 3a, 3b, and recognizes the character. to decide. Therefore, as for the upright character 3a, as shown in FIG. 7A, the character portion in the image data may be cut out as it is. However, in the horizontal character 3b, as shown in FIG. 7 (b), the character portion is cut out so as to rotate by 90 °, and the upright character 3a is finally cut out.
Need to

[0006]

However, as shown in FIG.
As shown in FIG. 7, the image data read vertically and horizontally and the image data read vertically and horizontally are temporarily stored in the same image memory. However, there is still the following problem in the image data storage device that reads the image data read vertically and horizontally, and reads the image data as normal vertical and horizontal image data by rotating the image data.

That is, when the image data of a certain area, such as a square, is read from the image memory 2 shown in FIGS. 7A and 7B, it is necessary to specify the address of each pixel data forming the image data. .. As shown in FIG. 7A, when it is not necessary to rotate, one address is designated and, for example, 8-bit data arranged in one horizontal row set at that address is treated as 1-byte data. It is possible to read all at once.

However, as shown in FIG. 7B, when it is necessary to rotate, each pixel data in the designated area needs to be read out one bit at a time in the vertical direction. Since the addresses of the pixel data arranged in the same column in the vertical direction do not coincide with each other, it is necessary to specify and read the address for each pixel data. Therefore, only one pixel data can be read in one read cycle with respect to a storage element such as a RAM, so that, for example, eight times as many read cycles are required as compared with the case where rotation is not necessary.

Therefore, there is a problem in that the reading processing speed is significantly reduced when rotated by 90 °.

The present invention has been made in view of such circumstances, and each pixel data is stored in the image memory so that the pixel data in the vertical direction in the image data read by the image reading device becomes a continuous address. By writing to
The reading speed can be improved by maintaining the normal reading speed for vertically and horizontally read image data and by adopting the page mode reading process for vertically and horizontally read image data. As a result, an object of the present invention is to provide an image data storage device capable of increasing the read processing speed of image data as a whole.

[0011]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention uses image data read by an image reading device as D data.
Once stored in an image memory composed of RAM, the image data is read as it is for vertically and horizontally read image data, and this image data is rotated for vertically and horizontally read image data. In an image data storage device for reading as normal vertical and horizontal image data, an X position counter for generating the X position of the image data read by the image reading device, a Y position counter for generating the Y position of the image data, and this X position counter. , Y position counter outputs each position X,
An arithmetic circuit for calculating a physical address on the image memory, which is determined by the width in the main scanning direction and the column address width of the image memory, of Y and vertical and horizontal read image data, and an address output from this arithmetic circuit. Image data for writing each pixel data of the image data sequentially input from the image reading device to the multiplexer that generates the corresponding row address and column address at the specified position of the row address and column address specified by the multiplexer of the image memory The writing means, the normal mode reading means for reading the image data normally read in the vertical and horizontal directions, and the normal mode reading means for reading the image data stored in the image memory in the normal mode by a plurality of pixel data in the same order as the writing order; The image data stored in the image memory is reversed with respect to the image data read by the X and Y position counters. The page mode reading means for designating a plurality of pixel data in the page mode by designating the designated address and the parallel bit data read by the normal mode reading means are converted into serial bit data and read by the page mode reading means. And a select circuit for extracting specified bit data from the parallel bit data.

[0012]

With the image data storage device configured as described above, the image data of the characters or images drawn on the form, for example, read by the image reading device can be read vertically or horizontally even when read vertically or horizontally. Even when read in
It is written in the image memory under the same conditions.

Each pixel data of the image data is DRAM
When the data is written in the image memory configured by, the address to be stored in the image memory of each pixel data forming the image data is calculated from each value X, Y output from the X position counter and the Y position counter. The circuit calculates using a predetermined calculation formula, and each pixel data is written in the corresponding position. That is, the image data read by the image reading device is written in the image memory such that the addresses of the pixel data adjacent in the sub-scanning direction are continuous addresses.

Then, for the image data read vertically and horizontally normally, the read address is designated in the same order as the writing operation, and the normal read mode is adopted.
A plurality of pixel data can be read at the same time. Also,
By adopting the page mode for image data read vertically and horizontally, a plurality of pixel data can be read in one RAS cycle.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the schematic arrangement of the image data storage device of the embodiment. The image memory 10 is a DRAM (dynamic random access memory) having a data width of n bits. In this embodiment, the data width n is 4 bits as shown in the lower side of FIG. The image data read by the image reading device 11 is stored in the image memory 10. A line sensor is incorporated in the image reading device 11.

Then, the vertically long form 1a shown in FIG.
When reading, the image of the drawn characters or the like is normally read in the vertical direction. Further, as shown in FIG. 6B, when the horizontally long form 1b is read, the image of the drawn characters or the like is read horizontally and vertically. It should be noted that the forms 1a and 1b are provided with a mark indicating, for example, whether they are horizontally long or vertically long, in the upper right corner, for example. Therefore, it is possible to distinguish, based on this mark position, whether the image has been read normally in the vertical and horizontal directions or the image read in the vertical and horizontal directions. The image data 11a read by the image reading device 11 has, for example, the format shown in the upper side of FIG. Then, the position of each pixel data D ₁₁ , ... On the image data 11a is indicated by coordinates with X in the main scanning direction and Y in the sub scanning direction.

The X position counter 12 in FIG. 1 outputs the X coordinate of the image data 11a in the image reading device 11 in the main scanning direction. Further, the Y position counter 13 outputs the Y coordinate of the image data 11a in the sub scanning direction. The initial values a and b of the X position counter 12 and the Y position counter 13 are set by the external control device 20 formed of, for example, a microcomputer. X position counter 1
2 and the position output from the Y position counter 13 (X,
Y) is input to the arithmetic circuit 14.

The arithmetic circuit 14 uses a formula (1) to calculate a physical address m indicating which address position in the image memory 10 shown in FIG. 2 the pixel data at the position (X, Y) on the image data 11a is stored. calculate.

M = Pt · (Y ÷ 2 ^k quotient) · 2 ^k + (Y / 2 ^k remainder) + [X / (n ^1/2 )] · 2 ^k Pt = [Px / (n ^{1 / 2} )] + 1 (1) However, Px is the number of dots (bit number) in the main scanning direction of the reading area of the form, and k and n are the column address width and the data width on the image memory 10 configured by DRAM, respectively. Is. The arithmetic circuit 14 sends the calculated address m on the image memory 10 to the multiplexer 15.

The X length counter 16 and the Y length counter 17 count the main scanning direction (X direction) length X ₀ and the sub scanning direction (Y direction) length Y ₀ in the reading area on the image data 11a. To do. Specifically, the DRAM control circuit 18 is activated when an activation command is input, and when the count value reaches X ₀ or Y ₀ , the count-up signals C _X and C _Y are sent to the DRAM control circuit 18. X direction length X
₀ and the length Y _{0 in the} Y direction are calculated from the external controller 20 to form 1
a. It is set in advance according to the type of 1b.

The DRAM control circuit 18 sends a switching signal C _H for the row address and the column address to the multiplexer 15. Further, the DRAM control circuit 18 sends out a RAS (row address strobe) signal and a CAS (column address strobe) signal to the image memory 10.

The multiplexer 15 reads the position where each pixel data is to be stored or each pixel data based on the switching signal C _H input from the DRAM control circuit 18 with the physical address m output from the arithmetic circuit 14. It is converted into a row address and a column address that specify the position in the case of outputting, and is sent to the image memory 10.

In the image data storage device having the above-mentioned configuration, the image reading device 11 is used, as shown in FIG.
When reading the forms 1a and 1b shown in (b), the initial positions a and b and the lengths X ₀ and Y ₀ are set in advance from the external control device 20 to the counters 12, 13, 16 and 17, respectively. To be done. Then, with the image reading device 11, FIG.
When reading the vertically long form 1a shown in FIG. 6A, the line sensor is moved in the vertical direction with respect to the form 1a, and FIG.
In the case of the horizontally long form 1b shown in FIG.
It is moved laterally with respect to b. Then, when reading is started, a start signal is input to the DRAM control circuit 18.

Then, the DRAM control circuit 18 activates the counters 12, 13, 16, and 17. That is, X
The position counter 12 sequentially outputs the X position from the initial value a. Then, when the count value of the X length counter 16 reaches the length X ₀ in the X direction, the count-up signal C _X is output. Then, the respective counter values of the Y position counter 13 and the Y length counter 17 are incremented by 1. In this way, each pixel data in the main scanning direction (X direction) is sequentially read, and when the reading of the pixel data for one line is completed, for the next one line existing in the sub scanning direction (Y direction). Read the pixel data.

The storage position of the read pixel data in the image memory 10 is designated by the address m calculated by the arithmetic circuit 14 using the equation (1).

FIG. 2 is a diagram showing at which address position in the image memory 10 each pixel data of the image data 11a is written.

[0028] As shown, since it is n = 4, at Y = b in the image data 11a, 4 pieces of data _{D 11, D 12, D 13} , D 14 is an image memory up to X = a~a + 3 10 is written at the same address m ₀ position. And
The next four data _{D 15, D 16, D 17} , D 18 is written to the same address location address apart 2 ^k. Then, the first four data D ₂₁ , of the next row (Y = b + 1),
D ₂₂ , D ₂₃ and D ₂₄ are written at the next address (m ₀ +1) position. Then, the next four data D ₂₅ , D ₂₆ ,
D ₂₇ and D ₂₈ are written in the address position 2 ^k apart from the previous address (m ₀ +1).

Therefore, for example, each pixel data D ₁₁ , D ₂₁ , D of the first column (X = a) in the image data 11a
_In the image memory 10, ₃₁ is written in the first bit of consecutive addresses m _{0 to} m ₀ +2. Also, the pixel data D ₁₂ , D ₂₂ , and D ₃₂ in the second column (X = a + 1) are
It is written in the second bit of consecutive addresses m _{0 to} m ₀ +2.

FIG. 5 is a diagram generally showing the relationship between each pixel data position of the image data 11a of FIG. 2 and the pixel data position of the image memory 10. As shown in the drawing, the horizontal direction of the image data 11a is shown. Each pixel data lined up in the (X direction, main scanning direction) is divided into n data widths of the image memory 10 and stored in the image memory 10 at address positions separated by 2 ^k .

The select circuit 19 includes parallel n-bit data D0, D1, which are sequentially read from the image memory 10.
Of D2, ..., Dn-1, only the bit data designated by the external control device 20 is sent as serial data to the next pattern recognition device, for example. In the case of data that does not need to be rotated and read out, all the bit data of the parallel n-bit data input by the command of the external control device 20 are designated, so this select circuit 19 is input. It works as a normal parallel / serial conversion circuit that simply converts parallel n-bit data into serial n-bit data.

Next, a procedure for reading out each pixel data of the image memory 10 in which the image data 11a read by the image reading device 11 is stored separately as shown in FIGS. 2 and 5 will be described.

First, it is judged whether the pixel data stored in the image memory 10 has been read normally in the vertical and horizontal directions or has been read in the vertical and horizontal directions by detecting the mark position of the stored image data. To do.

When the image is read vertically and horizontally, it is not necessary to rotate the image. In this case, when the counters 12, 13, 16 and 17 are started by setting the initial values as in the case of writing, the arithmetic circuit 14 specifies the address m using the equation (1). The four data D0 to D3 stored in the memory are read simultaneously. The read parallel 4-bit data D0 to D3 is selected by the select circuit 1
9 is input. The selection circuit 19 is an external control device 20.
It operates as a normal parallel / serial conversion circuit.
Therefore, the input parallel 4-bit data D0 to D3 is directly transmitted as serial 4-bit data to a pattern recognition device (not shown).

Referring to FIG. 2, first, D ₁₁ , D ₁₂ , D ₁₃ , and D _{14 at} the head of the image memory 10 are collectively 4
It is read as bit data. Then, four data D ₁₅ of the address apart ^{_{2 k, D 16, D 17}} , D 18 is read out as the 4-bit data collectively.

FIG. 3 is a time chart showing a read cycle in the image memory 10 composed of the DRAM in the case where the vertical and horizontal reading is normally performed. As shown in the figure, when the RAS signal falls, the row address is output, Next, when the CAS signal falls, the column address is output. As a result, the above-mentioned parallel 4-bit data D0 to D3 are read. Then, it is directly converted to serial 4-bit data in the select circuit 19 and output from the image data storage device.

Therefore, the image data 11a shown on the upper side of FIG. 2 is reproduced as an upright image in the pattern recognition device.

Next, when the image data is read vertically and horizontally, the DRAM control circuit 18 causes the DRAM control circuit 18 to operate the X position counter 12 and the Y position counter 13, and the X position counter 12.
The operation order of the length counter 16 and the Y length counter 17 is controlled in reverse. That is, when the reading is started, first, the Y length counter 17 and the Y position counter 13 start counting. Then, when the count value of the Y length counter 17 reaches the Y-direction length Y ₀ , the count-up signal C _Y is output. Then, the counter values of the X position counter 12 and the X length counter 16 are incremented by one.

In this way, by reversing the X and Y directions, the address m output from the arithmetic circuit 14 is changed.
Will sequentially specify the addresses on the image memory 10. Therefore, the image memory 10 of FIG.
The data stored in each address position of is read out in sequence.

However, it is necessary to rotate 90 ° when reading out the image. Specifically, D ₁₁ , D ₁₂ , D ₁₃ , and D ₁₄
In the order of D ₁₁ , D ₂₁ , D ₃₁ , D ₁₂ , D ₂₂ , D ₃₂
It is necessary to read in the order of. On the other hand, the parallel 4-bit data of D1 to D4 is output by one-time addressing. Therefore, in the first addressing,
The parallel 4-bit data of D ₁₁ , D ₁₂ , D ₁₃ , and D ₁₄ is read, and only the leading D _{11 of the} parallel 4-bit data is extracted by the select circuit 19. Then, the 1-bit data D ₁₁ is sent to the next pattern recognition device. Two
The parallel 4-bit data of D ₂₁ , D ₂₂ , D ₂₃ , and D ₂₄ stored at the next address is read out by the addressing of the next time, and the select circuit 19 extracts only the leading D ₂₁ . Similarly, the parallel 4-bit data of D ₃₁ , D ₃₂ , D ₃₃ , and D ₃₄ stored at the next address is read by the third address designation, and only the leading D ₃₁ is extracted by the select circuit 19. To do. As described above, the 3-bit data D ₁₁ , D ₂₁ , and D _{31 of the first} column are read.

Similarly, the same address as that of the first time is designated and the 4-bit data of D ₁₁ , D ₁₂ , D ₁₃ and D ₁₄ is read. Then, this time, the select circuit 19 extracts the second bit data D ₁₂ . Further, by the same method, the same address as the second time is designated again, and D ₂₁ ,
The parallel 4-bit data of D ₂₂ , D ₂₃ , and D ₂₄ is read out, and the select circuit 19 extracts only the second D ₂₂ .
Further, the same address as in the third time is designated again to extract the second D ₃₂ .

As described above, by repeatedly designating the same address and extracting bit data at different positions in order, the image stored in the image memory 10 is rotated by 90 degrees and read. As a result, in the next pattern recognition device, the landscape image becomes an upright image.

In this case, since the same address is accessed a plurality of times as described above, the overall read processing speed is reduced. In order to eliminate such inconvenience, in the present invention, a page mode read method, which is one of the access methods to DRAM, is adopted.

In this page mode reading method, as shown in FIG. 4, when reading a plurality of data stored in consecutive addresses, the CAS signal is kept while the RAS signal is kept at the low level which is the operating state. It is possible to continuously read data in a short cycle by continuously applying the data.

When this page mode reading method is adopted,
Since the address m of the first data D ₁₁ to be read out in _{~D 14, D 21 ~D 24,} D 31 ~D 34 are continuous in the image memory 10 of FIG. 2, as shown in FIG. 4, a RAS A plurality of 4-bit data D _{11 to} D ₁₄ , D _{21 in the} signal cycle
~ D ₂₄ , D _{31 to} D ₃₄ can be read. The data D _{11 to} D ₁₄ , D _{21 to} D ₂₄ , D sequentially read in this way
_{31 to} D ₃₄ are input to the select circuit 19, the leading bit data D ₁₁ , D ₂₁ , and D ₃₁ are extracted and sent to the pattern recognition device.

In the next RAS cycle, a plurality of pieces of 4-bit data D _{11 to} D ₁₄ , D _{21 to} D ₂₄ , D ₃₁ to are similarly generated.
D ₃₄ is read, the second bit data D ₁₂ , D ₂₂ , and D ₃₂ are extracted by the select circuit 19 and sent to the pattern recognition device.

In the image data storage device configured as described above, the image reading device 11 uses, for example, the forms 1a and 1b.
In the case of reading the image of the character or figure written in, in the case of the vertically long form 1a, the reading operation is performed normally and horizontally, and in the case of the horizontally long form 1b, the reading operation is performed vertically and horizontally. In any case, the image memory 1 composed of DRAM
In 0, each pixel data of the read image data is stored according to a predetermined procedure so that the addresses of the pixel data adjacent in the sub-scanning direction are continuous.

Therefore, when reading vertically and horizontally, the page mode reading method can be adopted. Therefore, a comparison is made when the data is read by sending the RAS signal and the CAS signal for each pixel data of the related art. As a result, the average reading time of pixel data can be greatly shortened.

Further, when the vertical and horizontal reading is performed normally, the image data may be read by the reverse procedure of the procedure executed when writing the image data in the image memory. In this case, since it is not necessary to rotate the image, it is possible to read the pixel data of the horizontal width bit number (n) of the image memory 10 composed of DRAM at one time. In other words, the fact that the page mode reading method can be adopted when reading in the vertical and horizontal directions is not affected, and therefore the pixel data reading speed does not decrease.

[0050]

As described above, according to the image data storage device of the present invention, the image data read by the image reading device is arranged so that the addresses of the pixel data adjacent in the sub-scanning direction are continuous addresses. It writes in the image memory. Therefore, the normal reading speed can be maintained by adopting the normal reading mode for the image data read vertically and horizontally, and the page mode reading process is adopted for the image data read vertically and horizontally. As a result, the reading speed can be increased, and as a result, the average reading processing speed of the image data can be increased.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an image data storage device according to an embodiment of the present invention,

FIG. 2 is a diagram showing a positional relationship between a form of image data and an image memory in the apparatus of the embodiment,

FIG. 3 is a time chart showing a read operation in a normal mode in the image memory,

FIG. 4 is a time chart showing a page mode read operation in the image memory,

FIG. 5 is a diagram showing a positional relationship between a form of image data and an image memory in the apparatus of the embodiment,

FIG. 6 is a diagram showing a difference in reading direction depending on a form type in the image reading device,

FIG. 7 is a diagram showing a rotation process of a stored image.

[Explanation of symbols]

10 ... Image memory, 11 ... Image reading device, 11a ... Image data, 12 ... X position counter, 13 ... Y position counter, 14 ... Arithmetic circuit, 15 ... Multiplexer, 16 ... X
Length counter, 17 ... Y length counter, 18 ... DRAM
Control circuit, 19 ... Select circuit, 20 ... External control device.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroyuki Hirota 1-26-5 Toranomon, Minato-ku, Tokyo NTT Data Communications Corporation

Claims (1)

[Claims] 1. Image data (11a) read by an image reading device (11) is temporarily stored in an image memory (10) composed of a DRAM, and image data is read for image data read vertically and horizontally. An image data storage device that reads data as it is, and rotates the image data for image data read vertically and horizontally and reads the image data as normal vertical and horizontal image data. An X position counter (12) for generating an X position, a Y position counter (13) for generating a Y position of the image data, and a position X, Y output from the X, Y position counter and reading vertically and horizontally. Corresponding to an arithmetic circuit (14) for calculating a physical address on the image memory determined by the width of the image data in the main scanning direction and the column address width of the image memory, and the address output from this arithmetic circuit A multiplexer (15) for generating a row address and a column address, and each pixel data of the image data sequentially input from the image reading device is designated by a row address and a column address designated by the multiplexer of the image memory. Image data writing means for writing in the normal mode for reading the image data stored in the image memory in the normal mode for a plurality of pixel data in the same order as the writing order for the image data read vertically and horizontally. For the image data read vertically and horizontally, the read means and the image data stored in the image memory are designated by an address in which the operation order of the X and Y position counters is reversed to specify a page for a plurality of pixel data. Page mode reading means for reading in the mode, and serial bit data for the parallel bit data read by the normal mode reading means. And a select circuit (19) for converting the specified bit data out of the parallel bit data read by the page mode reading means.