JPH053006B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data input circuit, and more particularly, to a data input circuit having an input port for both digital and analog signals.

[Conventional technology]

FIG. 3 is a circuit diagram showing a conventional data input circuit. In the figure, 1 is an input port for both digital and analog signals, and 2 is an input port for sending each signal to an internal data bus 3 or an A/D converter 4. A data bus to be transmitted; 5 and 6 are buffers for digital signals; 7 is a first transfer gate that is turned on by the port read first signal 8; and 9 is turned on by the port read second signal 10. Second
It is a transfer gate.

Next, the operation will be explained.

Input operations in the data input circuit of this port can be broadly classified into the following two types. That is, (A) the operation of inputting a digital signal, and (B) the operation of inputting an analog signal.

First, the operation (A) will be explained. A digital signal is read from input port 1 and placed on data bus 2. This digital signal is then amplified by buffers 5 and 6 and transmitted to internal data bus 3 via first transfer gate 7 whose gate is opened by port read first signal 8 .

Next, the operation (B) will be explained. Input port 1
The analog signal is read from the data bus 2 and placed on the data bus 2. This analog signal is then transmitted to the analog data bus via the second transfer gate 9 whose gate is opened by the port read second signal 10, and is input to the A/D converter 4.

[Problem to be solved by the invention]

As mentioned above, the conventional data input circuit is
The input port 1 is shared by analog signals and digital signals, and is configured so that digital data can be read from a data input signal consisting of an analog or digital signal.

However, in the above operation (B), that is, when an analog signal is input to input port 1, the signal from the data bus is also input to buffer 5. When a value (about 2.5V) is input, the corresponding buffer 5
There was a problem in that both the n-channel transistor and the p-channel transistor constituting the device were turned on, causing a through current to flow, resulting in unnecessary power loss when an analog signal was input.

The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a data input circuit that can eliminate unnecessary power loss when inputting analog signals.

[Means to solve the problem]

In the data input circuit according to the present invention, a NAND gate (NOR gate) is added to a buffer that amplifies a digital signal, a port read signal is input to one input of the NAND gate (NOR gate), and a port read signal is input to the other input of the NAND gate (NOR gate). This allows signals from the data bus to be input.

[Effect]

In this invention, since the buffer that receives the digital signal from the data bus is configured with a NAND gate (NOR gate) to which the port read signal is input to one input, the voltage (signal) near the threshold is applied to the buffer. Even if it is entered,
No through current flows through the buffer unless the port read signal becomes "H".

〔Example〕

FIG. 1 is a circuit diagram of a data input circuit showing an embodiment of the present invention. In the figure, the same reference numerals as those in FIG. This data input circuit is a NAND gate into which the data signal and the port read first signal 8 are input to the other input.
The configuration is such that the buffer 5 in the conventional data input circuit shown in FIG. 3 is replaced with the NAND gate 11.

FIG. 2 is a circuit diagram showing a specific example of the NAND gate 11, in which a p-channel transistor 15 and n-channel transistors 12 and 14 are connected in series in this order between the power supply and the ground. The port read first signal 8 is input to the gate of a p-channel transistor 15 whose source is grounded and whose gate and drain are connected to a power supply, and the gate of the n-channel transistor 12 and the gate of a p-channel transistor 15 whose source is grounded are connected to a power supply different from the power supply. The data input signal from the data bus 2 is input to the gate of a p-channel transistor 13 whose drain is connected to the power supply of the p-channel transistor 13 and whose source is connected to the connection point between the p-channel transistor 15 and the n-channel transistor 12. ing.

The operation will be explained below.

In this data input circuit, when an analog voltage (signal) is read, the signal is placed on the data bus 2 and is passed through the transfer gate 9 whose gate is opened by the second port read signal 10. It is transmitted to the analog data bus and reaches the A/D converter 4. On the other hand, at this time,
Data bus 2 is also connected to NAND gate 11, so the above analog voltage (signal) is
It is also input to NAND gate 11. In the conventional data input circuit shown in FIG. 3, the buffer 5 that receives this analog voltage (signal) is composed of an inverter. Therefore, for example, when the input voltage is close to the threshold voltage (about 2.3V),
Both the n-channel transistor and the p-channel transistor constituting the inverter are turned on, and a through current flows. In this data input circuit, the NAND gate 11 receiving the analog voltage (signal) constitutes the NAND gate 11. Even if both the n-channel transistor 12 and the p-channel transistor 13 are turned on, the port readout first signal 8 is input to the input of one of them, so while the port readout first signal 8 is "L", n
Since the channel transistor 14 is always off, no through current occurs and no unnecessary power loss occurs.

In the data input circuit of this embodiment, the digital signal between the data bus 2 and the first transfer gate 7 following the internal data bus 3 is amplified by a buffer, and the first transfer gate is connected to one side of the buffer. Since the NAND gate 11 to which the port readout signal 8 of port 7 is input is used,
When an analog signal is input to the input port 1, even if the analog signal is input to the NAND gate 11, there will be no through current in the NAND gate 11 unless the port readout first signal 8 becomes "H". As a result, unnecessary power loss can be prevented.

In addition, in the above embodiment, to receive the input signal,
Although a NAND gate is used, the same effect as in the above embodiment can be obtained even if a NOR gate is used.

In addition, in the above embodiment, a data input circuit was explained that has an input terminal (input port 1) that is shared by both analog and digital signals. It goes without saying that the present invention can also be applied to data input circuits having common terminals for inputting signals and digital signals.

[Effects of the Invention] As described above, according to the present invention, a NAND gate (NOR gate) is added to a buffer that amplifies a digital signal, and a port read signal is input to one input of the NAND gate (NOR gate). Since the signal from the data bus is input to the other input, even if the data input signal consisting of an analog signal has a voltage near the threshold, a through current will not flow through the buffer. As a result, unnecessary power loss can be eliminated.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of a data input circuit according to an embodiment of the present invention, and FIG.
FIG. 3 is a circuit diagram showing a specific example of a NAND gate, and FIG. 3 is a circuit diagram showing the configuration of a conventional data input circuit. In the figure, 1 is an input port, 2 is a data bus, 3 is an internal data bus for digital data,
7 is a digital data (second) transfer gate, 8 is a digital data read (port read first) signal, and 11 is a NAND gate.

Claims (1)

[Claims] 1. An input port for reading a data input signal consisting of a digital signal or an analog signal;
a first transfer gate that transmits the analog signal input to the input port to the internal data bus based on a port read signal of the input port, and a second transfer gate that transmits the analog signal inputted to the input port to the A/D converter based on the second port read signal. A data input circuit is connected between the input port and the first transfer gate, the first port read signal is input to one of them, and the data input signal is input to the other. A data input circuit comprising a NAND gate or a NOR gate that functions as a buffer for the digital signal.