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JPH05291294A - Manufacture of thin film transistor - Google Patents

Manufacture of thin film transistor

Info

Publication number
JPH05291294A
JPH05291294A JP11675692A JP11675692A JPH05291294A JP H05291294 A JPH05291294 A JP H05291294A JP 11675692 A JP11675692 A JP 11675692A JP 11675692 A JP11675692 A JP 11675692A JP H05291294 A JPH05291294 A JP H05291294A
Authority
JP
Japan
Prior art keywords
film
amorphous silicon
silicon film
polysilicon film
solid phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11675692A
Other languages
Japanese (ja)
Inventor
Yasuo Koshizuka
靖雄 腰塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP11675692A priority Critical patent/JPH05291294A/en
Publication of JPH05291294A publication Critical patent/JPH05291294A/en
Pending legal-status Critical Current

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

(57)【要約】 【目的】 アモルファスシリコン膜を熱処理して固相成
長によりポリシリコン膜に変換する方法において、変換
されたポリシリコン膜の表面を平坦とする。 【構成】 アモルファスシリコン膜12上に酸化シリコ
ンや窒化シリコンなどからなる結晶粒子移動抑圧膜13
を形成し、その状態で熱処理して固相成長によりアモル
ファスシリコン膜12をポリシリコン膜に変換する。固
相成長時、アモルファスシリコン膜12の結晶粒子の移
動が結晶粒子移動抑圧膜13により抑えられるから、変
換後のポリシリコン膜の表面を平坦に保持できる。
(57) [Summary] [Objective] In the method of converting an amorphous silicon film into a polysilicon film by heat treatment and solid phase growth, the surface of the converted polysilicon film is made flat. [Structure] A crystal grain movement suppressing film 13 made of silicon oxide or silicon nitride on the amorphous silicon film 12.
Are formed, and heat treatment is performed in that state to convert the amorphous silicon film 12 into a polysilicon film by solid phase growth. During the solid phase growth, the movement of the crystal grains of the amorphous silicon film 12 is suppressed by the crystal grain movement suppressing film 13, so that the surface of the converted polysilicon film can be kept flat.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は薄膜トランジスタの製
造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor.

【0002】[0002]

【従来の技術】薄膜トランジスタの製造方法において
は、ガラスなどの絶縁基板上にアモルファスシリコン膜
を堆積し、このアモルファスシリコン膜をXeフラッシ
ュランプアニールまたはCWレーザアニールなどで60
0℃程度で熱処理して固相成長によりポリシリコン膜に
変換し、このポリシリコン膜をソース・ドレイン領域形
成用の半導体層とすることが行われている。
2. Description of the Related Art In a method of manufacturing a thin film transistor, an amorphous silicon film is deposited on an insulating substrate such as glass and the amorphous silicon film is subjected to Xe flash lamp annealing or CW laser annealing or the like.
A heat treatment is performed at about 0 ° C. to convert into a polysilicon film by solid phase growth, and this polysilicon film is used as a semiconductor layer for forming source / drain regions.

【0003】[0003]

【発明が解決しようとする課題】しかるに、従来の上記
製造方法では、固相成長時にアモルファスシリコン膜の
結晶粒子の移動が生じるため、変換されたポリシリコン
膜の表面が凹凸になってしまう。このため、例えば図5
に示すように、ポリシリコン膜1の表面にゲート絶縁膜
2を形成すると、ゲート絶縁膜2とポリシリコン膜1の
界面も凹凸となり、ゲート耐圧が悪くなってしまう。す
なわち、ゲートの電界強度Eは、界面の凹凸の曲率半径
rと次式のような関係にある。 E=Eo/(1+tox/r) ここで、Eoは界面が平坦なときの電界強度、toxは
ゲート絶縁膜2の膜厚、rは界面の曲率半径である。し
たがって、界面が凹凸であると、曲率半径rが小さくな
り、電界強度Eは小さくなり、したがってゲート耐圧が
劣化することになる。そしてゲート耐圧が劣化すると、
信頼性やスイッチング特性の優れた薄膜トランジスタを
得られないという問題点がある。
However, in the above-mentioned conventional manufacturing method, since the crystal grains of the amorphous silicon film move during solid phase growth, the surface of the converted polysilicon film becomes uneven. Therefore, for example, in FIG.
As shown in, when the gate insulating film 2 is formed on the surface of the polysilicon film 1, the interface between the gate insulating film 2 and the polysilicon film 1 becomes uneven, and the gate breakdown voltage becomes poor. That is, the electric field strength E of the gate has a relationship as shown in the following equation with the radius of curvature r of the irregularities on the interface. E = Eo / (1 + tox / r) Here, Eo is the electric field strength when the interface is flat, tox is the film thickness of the gate insulating film 2, and r is the radius of curvature of the interface. Therefore, if the interface is uneven, the radius of curvature r becomes small and the electric field strength E becomes small, so that the gate breakdown voltage deteriorates. And when the gate breakdown voltage deteriorates,
There is a problem that a thin film transistor with excellent reliability and switching characteristics cannot be obtained.

【0004】この発明は、アモルファスシリコン膜から
固相成長で変換されるソース・ドレイン領域形成用半導
体層としてのポリシリコン膜の表面を平坦にできる薄膜
トランジスタの製造方法を提供することにある。
An object of the present invention is to provide a method of manufacturing a thin film transistor capable of flattening the surface of a polysilicon film as a semiconductor layer for forming source / drain regions which is converted from an amorphous silicon film by solid phase growth.

【0005】[0005]

【課題を解決するための手段】この発明は、アモルファ
スシリコン膜の堆積後、このアモルファスシリコン膜上
に結晶粒子の移動を抑圧する結晶粒子移動抑圧膜を形成
し、その状態で熱処理して固相成長により前記アモルフ
ァスシリコン膜をポリシリコン膜に変換するようにした
ものである。
According to the present invention, after depositing an amorphous silicon film, a crystal particle movement suppressing film for suppressing the movement of crystal particles is formed on the amorphous silicon film, and heat treatment is performed in that state to perform solid phase. The amorphous silicon film is converted into a polysilicon film by growth.

【0006】[0006]

【作用】この発明によれば、アモルファスシリコン膜上
に結晶粒子移動抑圧膜が形成されているので、固相成長
時、アモルファスシリコン膜の結晶粒子の移動が抑えら
れ、したがって変換されたポリシリコン膜の表面を平坦
にできる。
According to the present invention, since the crystal grain movement suppressing film is formed on the amorphous silicon film, the movement of the crystal grains of the amorphous silicon film is suppressed during the solid phase growth, and thus the converted polysilicon film is formed. The surface of can be made flat.

【0007】[0007]

【実施例】図1ないし図4はこの発明の一実施例を製造
工程順に示す断面図である。以下、これらの図を参照し
てこの発明の一実施例を説明する。まず図1に示すよう
に、ガラスなどの絶縁基板11上に、低温のプラズマC
VD法などによりアモルファスシリコン膜12を形成す
る。次に、このアモルファスシリコン膜12上に結晶粒
子移動抑圧膜13を形成する。この結晶粒子移動抑圧膜
13は具体的には酸化シリコンや窒化シリコンなどの膜
であり、CVD法で形成される。
1 to 4 are sectional views showing an embodiment of the present invention in the order of manufacturing steps. An embodiment of the present invention will be described below with reference to these drawings. First, as shown in FIG. 1, low temperature plasma C is placed on an insulating substrate 11 such as glass.
The amorphous silicon film 12 is formed by the VD method or the like. Next, the crystal grain movement suppression film 13 is formed on the amorphous silicon film 12. The crystal grain movement suppression film 13 is specifically a film of silicon oxide, silicon nitride or the like, and is formed by the CVD method.

【0008】次に、Xeフラッシュランプアニールまた
はCWレーザアニールなどで600℃程度でアモルファ
スシリコン膜12を熱処理することにより、固相成長で
アモルファスシリコン膜12を図2に示すようにポリシ
リコン膜14に変換する。このとき、アモルファスシリ
コン膜12上に結晶粒子移動抑圧膜13が形成されてい
るので、アモルファスシリコン膜12の結晶粒子の移動
が抑えられ、よって変換されたポリシリコン膜14の表
面は平坦に保持される。その後、結晶粒子移動抑圧膜1
3とポリシリコン膜14をパターニングしてデバイス領
域にのみ残し、次いでポリシリコン膜14上から結晶粒
子移動抑圧膜13を除去する。この状態が図3に示され
ている。
Next, the amorphous silicon film 12 is heat-treated at about 600 ° C. by Xe flash lamp annealing or CW laser annealing, etc., so that the amorphous silicon film 12 is converted into a polysilicon film 14 by solid phase growth as shown in FIG. Convert. At this time, since the crystal particle movement suppressing film 13 is formed on the amorphous silicon film 12, the movement of the crystal particles of the amorphous silicon film 12 is suppressed, and thus the surface of the converted polysilicon film 14 is held flat. It After that, the crystal grain movement suppression film 1
3 and the polysilicon film 14 are patterned to leave only in the device region, and then the crystal grain movement suppressing film 13 is removed from the polysilicon film 14. This state is shown in FIG.

【0009】次に、図4に示すように全面にゲート絶縁
膜15を形成し、このゲート絶縁膜15でポリシリコン
膜14を覆う。その後、ゲート絶縁膜15上に、ポリシ
リコン膜14のチャネル領域に対応してゲート電極16
を形成し、次いでこのゲート電極16をマスクとして不
純物のイオン注入を行うことにより、ゲート電極16の
両側のポリシリコン膜14部分にソース・ドレイン領域
17を形成する。その後、全面に層間絶縁膜18を形成
し、この層間絶縁膜18とゲート絶縁膜15にソース・
ドレイン領域17に到達するようにコンタクトホール1
9を開ける。そして、このコンタクトホール19を通し
てソース・ドレイン領域17に接続されるようにソース
・ドレイン電極20を形成する。かくして、薄膜トラン
ジスタが完成する。
Next, as shown in FIG. 4, a gate insulating film 15 is formed on the entire surface, and the gate insulating film 15 covers the polysilicon film 14. After that, the gate electrode 16 is formed on the gate insulating film 15 so as to correspond to the channel region of the polysilicon film 14.
Then, ion implantation of impurities is performed using the gate electrode 16 as a mask to form the source / drain regions 17 in the polysilicon film 14 portions on both sides of the gate electrode 16. After that, an interlayer insulating film 18 is formed on the entire surface, and the interlayer insulating film 18 and the gate insulating film 15 are formed of a source
Contact hole 1 so as to reach drain region 17
Open 9 Then, source / drain electrodes 20 are formed so as to be connected to the source / drain regions 17 through the contact holes 19. Thus, the thin film transistor is completed.

【0010】[0010]

【発明の効果】以上説明したように、この発明によれ
ば、アモルファスシリコン膜上に結晶粒子移動抑圧膜を
形成した状態で熱処理を行い、固相成長させるようにし
たので、固相成長時、アモルファスシリコン膜の結晶粒
子の移動が抑えられ、変換されたポリシリコン膜の表面
を平坦に保持できる。よって、このポリシリコン膜をゲ
ート絶縁膜で覆った際に界面を平坦にでき、その結果と
してゲート耐圧を向上させて薄膜トランジスタの信頼性
やスイッチング特性を改善できる。
As described above, according to the present invention, the heat treatment is carried out in the state where the crystal grain movement suppressing film is formed on the amorphous silicon film to carry out the solid phase growth. The movement of the crystal particles of the amorphous silicon film is suppressed, and the surface of the converted polysilicon film can be kept flat. Therefore, the interface can be made flat when the polysilicon film is covered with the gate insulating film, and as a result, the gate breakdown voltage can be improved and the reliability and switching characteristics of the thin film transistor can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例において、結晶粒子移動抑
圧膜形成工程までを示す断面図。
FIG. 1 is a cross-sectional view showing the steps of forming a crystal grain movement suppression film in one embodiment of the present invention.

【図2】この発明の一実施例において、図1に続く工程
を示す断面図。
FIG. 2 is a cross-sectional view showing a step that follows FIG. 1 in one embodiment of the present invention.

【図3】この発明の一実施例において、図2に続く工程
を示す断面図。
FIG. 3 is a cross-sectional view showing a step that follows FIG. 2 in one embodiment of the present invention.

【図4】この発明の一実施例において、図3に続く工程
を示す断面図。
FIG. 4 is a cross-sectional view showing a step that follows FIG. 3 in one embodiment of the present invention.

【図5】従来方法での、ポリシリコン膜とゲート絶縁膜
との界面状態を示す断面図。
FIG. 5 is a cross-sectional view showing an interface state between a polysilicon film and a gate insulating film by a conventional method.

【符号の説明】[Explanation of symbols]

12 アモルファスシリコン膜 13 結晶粒子移動抑圧膜 14 ポリシリコン膜 12 Amorphous silicon film 13 Crystal particle movement suppression film 14 Polysilicon film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 アモルファスシリコン膜の堆積後、この
アモルファスシリコン膜上に結晶粒子の移動を抑圧する
結晶粒子移動抑圧膜を形成し、その状態で熱処理して固
相成長により前記アモルファスシリコン膜をポリシリコ
ン膜に変換するようにしたことを特徴とする薄膜トラン
ジスタの製造方法。
1. After the amorphous silicon film is deposited, a crystal particle movement suppressing film for suppressing the movement of crystal particles is formed on the amorphous silicon film, and heat treatment is performed in that state to perform solid phase growth on the amorphous silicon film to form a polycrystal film. A method of manufacturing a thin film transistor, characterized in that the thin film transistor is converted into a silicon film.
JP11675692A 1992-04-10 1992-04-10 Manufacture of thin film transistor Pending JPH05291294A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11675692A JPH05291294A (en) 1992-04-10 1992-04-10 Manufacture of thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11675692A JPH05291294A (en) 1992-04-10 1992-04-10 Manufacture of thin film transistor

Publications (1)

Publication Number Publication Date
JPH05291294A true JPH05291294A (en) 1993-11-05

Family

ID=14694967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11675692A Pending JPH05291294A (en) 1992-04-10 1992-04-10 Manufacture of thin film transistor

Country Status (1)

Country Link
JP (1) JPH05291294A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08139334A (en) * 1994-11-10 1996-05-31 Nec Corp Thin film transistor and manufacturing method thereof
KR970004054A (en) * 1995-06-24 1997-01-29 Polysilicon layer formation method of semiconductor device
WO2002047137A1 (en) * 2000-12-08 2002-06-13 Sony Corporation Semiconductor thin film forming method, production methods for semiconductor device and electrooptical device, devices used for these methods, and semiconductor device and electrooptical device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08139334A (en) * 1994-11-10 1996-05-31 Nec Corp Thin film transistor and manufacturing method thereof
KR970004054A (en) * 1995-06-24 1997-01-29 Polysilicon layer formation method of semiconductor device
WO2002047137A1 (en) * 2000-12-08 2002-06-13 Sony Corporation Semiconductor thin film forming method, production methods for semiconductor device and electrooptical device, devices used for these methods, and semiconductor device and electrooptical device
US7183229B2 (en) 2000-12-08 2007-02-27 Sony Corporation Semiconductor thin film forming method, production methods for semiconductor device and electrooptical device, devices used for these methods, and semiconductor device and electrooptical device

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