JPH05259901A - Phase locked loop circuit - Google Patents

Abstract

PURPOSE:To shorten the synchronizing time of a phase locked loop circuit and to increase the pull-in range by eliminating the undesired signals in the synchronizing process of the phase locked loop circuit. CONSTITUTION:A triangular wave type phase comparator 11 detects the phase difference between an input signal X and an output signal Y to obtain an output signal Y1. A loop filter 12 smoothes the signal Y1 to turn it into an output signal Y2. A loop filter 13 smoothes the signal Y2 into an output signal Y3. A VCO 14 oscillates a signal of the frequency accordant with the value of the signal Y3 and turns the signal into an output signal Y4. A phase difference (3/2)pi detector 16 compares the signal Y2 with the signal Y3 in terms of the voltage value to detect the phase difference (3/2)pi and defines this result as an output signal Y5. An output switch 15 inverts or does not invert the signal Y4 in accordance with the signal Y5 and outputs the signal Y4 as an output signal Y.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop circuit, and more particularly to a phase locked loop circuit having a wide pull-in range.

[0002]

2. Description of the Related Art As a conventional phase locked loop, there is a phase locked loop as shown in the block diagram of FIG. As shown in FIG. 2, in the conventional phase locked loop circuit, one input end of the triangular wave type phase comparator 21 is connected to the input terminal 3 and the other input end is connected to the output terminal 4, and the input end of the loop filter 22 is a triangular wave. Connected to the output end of the phase comparator 21, the input end of the voltage controlled oscillator (hereinafter referred to as VCO) 23 is connected to the output end of the loop filter 22, and VC
The output terminal of O23 is connected to the output terminal 4.

In the triangular wave type phase comparator 21, one input terminal inputs the input signal X via the input terminal 3, and the other input terminal inputs the output signal of the VCO 23. Further, the triangular wave type phase comparator 21 outputs the output signal Y1 to the loop filter 22. The loop filter 22 outputs the output signal Y2 to the VCO 23. The VCO 23 outputs the output signal Y.

In the conventional phase locked loop configured as described above, the output signal Y becomes a signal having the same frequency as the input signal X and synchronized with the input signal X after the phase pull-in. ..

FIG. 3 is a graph showing the input / output characteristics of the triangular wave type phase comparator 21 in the phase locked loop circuit shown in FIG. The triangular wave type phase comparator 21 detects the phase difference between the input signal X and the output signal Y and outputs the result as an output signal Y1. The loop filter 22 outputs a beat waveform corresponding to the DC component and the phase difference included in the output signal Y1 as the output signal Y2. The output signal Y2 enters the synchronization process while repeating the beat waveform and changing the DC level. In the process where the beat waveform is repeated, the cycle slip of the phase is repeated, and at the same time as the beat waveform is no longer output, the process gradually enters the phase.

[0006]

However, in the above-described conventional phase locked loop circuit, in the output signal Y2 of the loop filter 22, the signal component that tends to separate the phase of the output signal Y of the VCO 23 from the phase of the input signal X, that is, Figure 3
Phase difference (3/2) π to phase difference (5
Since signals up to / 2) π are included, there is a problem that it takes a long time to reach synchronization and further narrows the pull-in range of the phase locked loop.

The present invention has been made in view of the above problems, and eliminates unnecessary signals in the synchronization process of the phase synchronization circuit to shorten the synchronization time of the phase synchronization circuit and expand the pull-in range. An object of the present invention is to provide a phase locked loop circuit capable of performing the above.

[0008]

DISCLOSURE OF THE INVENTION A phase locked loop circuit according to the present invention is a triangular wave type phase comparator for detecting a phase difference between an input signal of this phase locked loop circuit and an output signal of this phase locked loop circuit, and this triangular wave type phase comparator. A first loop filter for smoothing the output of the phase comparator, a second loop filter for smoothing the output of the first loop filter, and a frequency of a frequency corresponding to the value of the output of the second loop filter. VCO that oscillates a signal
And a phase difference (3/2) π detection for detecting that the phase difference is (3/2) π or more by comparing the output of the first loop filter with the output of the second loop filter. And an output switcher for inverting and non-inverting the output of the VCO according to the output of the phase difference (3/2) π detector and outputting it as an output signal of the phase-locked loop circuit. And

[0009]

In the phase locked loop circuit according to the present invention, the phase difference (3/2) π detector compares the output of the first loop filter with the output of the second loop filter in the phase locking process. The phase difference is (3/2) π or more, or (3
/ 2) π is detected, the phase difference (3/2) π in the input / output characteristics of the triangular wave type phase comparator is detected.
~ The unnecessary period corresponding to the phase difference (5/2)? Can be eliminated in the output switch. With these,
The phase-locked loop according to the present invention can remove unnecessary signals in the synchronization process, so that the synchronization time of the phase-locked loop can be shortened and the pull-in range can be expanded.

[0010]

Embodiments of the present invention will now be described with reference to the accompanying drawings.

FIG. 1 is a block diagram showing a phase locked loop circuit according to an embodiment of the present invention. In the phase locked loop circuit according to the present embodiment shown in FIG. 1, one input end of the triangular wave type phase comparator 11 is connected to the input terminal 1, the other input end is connected to the output terminal 2, and the input end of the loop filter 12 is It is connected to the output end of the triangular wave type phase comparator 11, the input end of the loop filter 13 is connected to the output end of the loop filter 12, and one input end of the phase difference (3/2) π detector 16 is connected to the loop filter 12 Is connected to the output terminal of the loop filter 13 and the other input terminal is connected to the output terminal of the loop filter 13.
The input end of O14 is connected to the output end of the loop filter 13, and one input end of the output switch 15 is VC.
The output end of O14 and the other input end have a phase difference of (3/2) π
It is connected to the output terminal of the detector 16, and the output terminal of the output switcher 15 is connected to the output terminal 2.

The triangular wave type phase comparator 11 inputs the input signal X through the input terminal 3 and the output signal Y which is the output of the VCO 23, and calculates the phase difference between the input signal X and the output signal Y. It is detected and the result is output as an output signal Y1. The loop filter 12 receives the output signal Y1, smoothes the output signal Y1, and outputs the smoothed output signal Y2. The loop filter 13 receives the output signal Y2, further smooths the output signal Y2, and outputs the output signal Y3. The VCO 14 receives the output signal Y3, oscillates a signal having a frequency corresponding to the value of the output signal Y3, and outputs it as the output signal Y4. Phase difference (3/2) π detector 16
Inputs the output signal Y2 and the output signal Y3, compares the voltage values of the output signal Y2 and the output signal Y3, and detects whether or not the phase difference is (3/2) π or more. The result is output as the output signal Y5. The output switcher 15 inputs the output signal Y4 and the output signal Y5, and inverts or non-inverts the output signal Y4 according to the output signal Y5 and outputs the output signal Y.

As described above, the phase locked loop according to the present embodiment constitutes a phased lock loop.

Next, the operation of the phase synchronizing process in the phase synchronizing circuit according to the present embodiment constructed as described above will be explained. The output signal Y1 of the triangular wave type phase comparator 11 is a beat waveform, and when the input signal X and the output signal Y are not synchronized, they become positive or negative signals alternately with respect to time. The output signal Y5 of the phase difference (3/2) π detector 16 is
Loop filter 12 which is a signal obtained by smoothing the output signal Y1
Of the output signal Y2 and the output signal Y3 of the loop filter 13, which is a signal obtained by smoothing the output signal Y2, are positive or negative signals. Then, the output signal Y of the output switcher 15 is VC according to the value of the output signal Y5.
It becomes the output signal Y4 of O14 or a signal having a phase opposite to that of the output signal Y4, and becomes the output signal of the present phase synchronization circuit.

In the phase locked loop circuit according to this embodiment,
The division point of the magnitude relationship between the output signal Y2 and the output signal Y3 corresponds to the phase difference (3/2) π between the output signal Y2 and the output signal Y3.

As described above, in the phase synchronization circuit according to the present embodiment, in the phase synchronization process, the phase difference (3/2) π to the phase difference (5/5) in the input / output characteristics of the triangular wave type phase comparator 11 is obtained.
2) Phase difference (3/2) π
By detecting with the detector 16, the unnecessary period can be removed in the output switcher 15.

[0017]

As described above, according to the phase synchronization circuit of the present invention, in the phase synchronization process, the phase difference (3/2) π to the phase difference (5/5) in the input / output characteristics of the triangular wave type phase comparator. 2) The phase difference (3
/ 2) Since the unnecessary period can be removed by the detection by the π detector, the synchronization time of the phase locked loop according to the present invention can be shortened and the pull-in range can be expanded.

[Brief description of drawings]

FIG. 1 is a block diagram showing a phase locked loop circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional phase locked loop circuit.

3 is a graph showing input / output characteristics of a triangular wave type phase comparator in the phase locked loop circuit shown in FIG.

[Explanation of symbols]

 11: Triangle wave type phase comparator 12, 13; Loop filter 14; VCO 15; Output selector 16; Phase difference (3/2) π detector

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location 9182-5J H03L 7/08 Z 9182-5J 7/10 Z

Claims (1)

[Claims] 1. A triangular wave type phase comparator for detecting a phase difference between an input signal of the present phase locked loop circuit and an output signal of the present phase locked loop circuit, and a first smoothing circuit for smoothing the output of the triangular wave type phase comparator.
Loop filter, a second loop filter that smoothes the output of the first loop filter, a VCO that oscillates a signal having a frequency corresponding to the value of the output of the second loop filter, and the first loop filter Loop filter output and the second
The phase difference is (3 /
2) Phase difference (3/2) π to detect that it is π or more
The phase difference (3/2) π between the detector and the output of the VCO
An output switcher which inverts and non-inverts according to the output of the detector and outputs as an output signal of the phase synchronizing circuit.