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JPH0525722U - Package for storing semiconductor devices - Google Patents

Package for storing semiconductor devices

Info

Publication number
JPH0525722U
JPH0525722U JP073486U JP7348691U JPH0525722U JP H0525722 U JPH0525722 U JP H0525722U JP 073486 U JP073486 U JP 073486U JP 7348691 U JP7348691 U JP 7348691U JP H0525722 U JPH0525722 U JP H0525722U
Authority
JP
Japan
Prior art keywords
semiconductor element
metal
metal plate
package
mounting portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP073486U
Other languages
Japanese (ja)
Other versions
JP2571571Y2 (en
Inventor
康浩 大塚
博司 土岐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP1991073486U priority Critical patent/JP2571571Y2/en
Publication of JPH0525722U publication Critical patent/JPH0525722U/en
Application granted granted Critical
Publication of JP2571571Y2 publication Critical patent/JP2571571Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H10W72/30
    • H10W72/884

Landscapes

  • Die Bonding (AREA)

Abstract

(57)【要約】 【目的】半導体素子の取着固定を強固とした半導体素子
収納用パッケージを提供することにある。 【構成】容器を構成する金属基体1 の半導体素子載置部
1a上に金属板5 を介して半導体素子4 を取着固定し、容
器内部に半導体素子4 を収容するようになした半導体素
子収納用パッケージにおいて、前記金属板5 として上下
両面にニッケル膜5b、5bを接合させたモリブデン板5aを
打ち抜いたものを使用し、且つ打ち抜き終了面が半導体
素子4 側となるようにして半導体素子4 と金属基体1 の
半導体素子載置部1aとの間に挟んだ。金属板5 を金属基
体1 の半導体素子載置部1aにロウ材11を介して取着する
際、ロウ材11の一部が金属板5 の側面を這い上がって上
面に流出することは一切なく、その結果、金属板5 の上
面に半導体素子4 を強固に固定することができる。
(57) [Abstract] [Purpose] To provide a package for housing a semiconductor element in which the mounting and fixing of the semiconductor element is firm. [Structure] Semiconductor element mounting portion of metal base 1 forming a container
In the semiconductor element housing package, in which the semiconductor element 4 is attached and fixed via the metal plate 5 on 1a and the semiconductor element 4 is housed in the container, the metal plate 5 has nickel films 5b on both upper and lower surfaces, A punched molybdenum plate 5a to which 5b is joined is used, and the punching end surface is placed on the semiconductor element 4 side and sandwiched between the semiconductor element 4 and the semiconductor element mounting portion 1a of the metal base 1. . When the metal plate 5 is attached to the semiconductor element mounting portion 1a of the metal substrate 1 via the brazing material 11, a part of the brazing material 11 does not creep up the side surface of the metal plate 5 and flow out to the upper surface. As a result, the semiconductor element 4 can be firmly fixed to the upper surface of the metal plate 5.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は半導体素子、特に半導体集積回路素子を収容するための半導体素子収 納用パッケージの改良に関するものである。 The present invention relates to an improvement of a semiconductor device storage package for housing a semiconductor device, particularly a semiconductor integrated circuit device.

【0002】[0002]

【従来の技術】[Prior Art]

近年、情報処理装置の高性能化に伴い、それを構成する半導体素子も高密度化 、高集積化が急激に進んでいる。そのため半導体素子は作動時に発生する単位面 積、単位体積あたりの発熱量が増大し、半導体素子を正常、且つ安定に作動させ るためにはその熱をいかに効率的に除去するかが課題となっている。 2. Description of the Related Art In recent years, as the performance of information processing apparatuses has increased, the semiconductor elements that make up the information processing apparatuses have been rapidly increasing in density and integration. Therefore, the amount of heat generated per unit volume and unit volume of semiconductor devices increases during operation, and how to efficiently remove the heat is a challenge for normal and stable operation of semiconductor devices. ing.

【0003】 従来、半導体素子の発生する熱の除去方法としては例えば、上面中央部に半導 体素子が載置固定される載置部を有する銅−タングステン合金から成る金属基体 上に、前記載置部を囲繞するようにしてアルミナセラミックスから成る絶縁枠体 を銀ロウ等のロウ材を介し取着された構造の半導体素子収納用パッケージを準備 し、金属基体の半導体素子載置部に半導体素子を金属板を介して載置固定し、半 導体素子から発生される熱を金属基体に吸収させるとともに該吸収した熱を大気 中に放出することによって行われている。Conventionally, as a method of removing heat generated by a semiconductor element, for example, the method described above is used on a metal base made of a copper-tungsten alloy having a mounting portion on which a semiconductor element is mounted and fixed in a central portion of an upper surface. A semiconductor element housing package having a structure in which an insulating frame made of alumina ceramics is attached so as to surround the mounting portion through a brazing material such as silver solder is prepared, and the semiconductor element is mounted on the semiconductor element mounting portion of the metal base. Is mounted and fixed via a metal plate, the heat generated from the semiconductor element is absorbed by the metal substrate, and the absorbed heat is released to the atmosphere.

【0004】 尚、前記絶縁枠体には金属配線層が埋設されており、該金属配線層を介して内 部に収容する半導体素子の各電極を外部の電気回路に電気的に接続し得るように なっている。A metal wiring layer is embedded in the insulating frame, so that each electrode of the semiconductor element housed inside can be electrically connected to an external electric circuit through the metal wiring layer. It has become.

【0005】 また金属基体の半導体素子載置部と半導体素子との間に介在される金属板はモ リブデンから成り、半導体素子と金属基体との熱膨張係数の差によって生じる熱 応力を緩和する作用を為す。Further, the metal plate interposed between the semiconductor element mounting portion of the metal base and the semiconductor element is made of molybdenum, and acts to relieve thermal stress caused by the difference in thermal expansion coefficient between the semiconductor element and the metal base. To do.

【0006】 前記金属板は圧延加工によって得られたモリブデン板を打ち抜き加工法により 所定形状に打ち抜かれたもが使用され、該金属板は金属基体の半導体素子載置部 に強固に取着させるために打ち抜き加工の際に形成されるバリ面(打ち抜き終了 面)を半導体素子側として金属基体の半導体素子載置部に取着され、また金属板 の外表面全面には金属板に半導体素子を容易、且つ強固に取着固定させるために ニッケルメッキ、金メッキが施されている。For the metal plate, a molybdenum plate obtained by rolling is punched into a predetermined shape by a punching method, and the metal plate is firmly attached to a semiconductor element mounting portion of a metal substrate. The burr surface (finishing surface) formed during punching is attached to the semiconductor element mounting part of the metal base with the semiconductor element side as the semiconductor element side, and the semiconductor element can be easily attached to the metal plate on the entire outer surface of the metal plate. In addition, nickel plating and gold plating are applied to firmly attach and fix.

【0007】[0007]

【考案が解決しようとする課題】[Problems to be solved by the device]

しかしながら、この従来の半導体素子収納用パッケージにおいては、金属板の 外表面にニッケルメッキ、金メッキ等のロウ材と濡れ性の良い金属が被着されて いるため金属板を金属基体の半導体素子載置部に銀ロウ等のロウ材を介して取着 させる際、ロウ材の一部が金属板の側面を這い上がって上面に流出してしまい、 その結果、金属板の上面に半導体素子を強固に取着固定することができなくなる という欠点を有していた。 However, in this conventional package for accommodating semiconductor elements, the brazing material such as nickel plating or gold plating and a metal having good wettability are adhered to the outer surface of the metal plate, so that the metal plate is mounted on the semiconductor substrate of the metal base. When a brazing material such as silver brazing is attached to the metal part, a part of the brazing material creeps up on the side surface of the metal plate and flows out to the upper surface, and as a result, the semiconductor element is firmly attached to the upper surface of the metal plate. It had a drawback that it could not be attached and fixed.

【0008】[0008]

【課題を解決するための手段】[Means for Solving the Problems]

本考案は容器内部に金属体を介して半導体素子を取着収容する半導体素子収納 用パッケージにおいて、前記金属板は上下両面にニッケル膜を接合させたモリブ デン板を打ち抜いたものが使用され、且つ打ち抜き終了面が半導体素子側となっ ていることを特徴とするものである。 The present invention relates to a semiconductor device housing package in which a semiconductor device is mounted and housed through a metal body in a container, wherein the metal plate is a punched molybden board having nickel films bonded on both upper and lower surfaces, and This is characterized in that the punching end surface is on the semiconductor element side.

【0009】[0009]

【実施例】【Example】

次に本考案を添付図面に基づき説明する。 Next, the present invention will be described with reference to the accompanying drawings.

【0010】 図1 は本考案にかかる半導体素子収納用パッケージの一実施例を示す断面図で あり、1 は金属基体、2 は絶縁枠体、3 は蓋体である。この金属基体1 と絶縁枠 体2 と蓋体3 とで半導体素子を収容するための容器が構成される。FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor device according to the present invention, in which 1 is a metal base, 2 is an insulating frame, and 3 is a lid. The metal base 1, the insulating frame body 2 and the lid body 3 constitute a container for housing a semiconductor element.

【0011】 前記金属基体1 はその上面中央部に半導体素子が載置される凸状の載置部1aが 設けてあり、該凸状載置部1a上には半導体素子4 が金属板5 を間に挟んで取着固 定される。The metal base 1 is provided with a convex mounting portion 1a on which a semiconductor element is mounted on the center of the upper surface thereof, and the semiconductor element 4 and the metal plate 5 are mounted on the convex mounting portion 1a. It is fixed by sandwiching it.

【0012】 前記金属基体1 は半導体素子4 が発する熱を吸収するととも該吸収した熱を大 気中に放出する作用を為し、後述する絶縁枠体2 との間に大きな熱応力が発生し ないよう熱膨張係数が絶縁枠体2 と近似し、且つ良熱伝導体である材料、例えば 銅−タングステン合金(Cu-W 合金) により形成される。The metal base 1 absorbs the heat generated by the semiconductor element 4 and at the same time releases the absorbed heat into the atmosphere, so that a large thermal stress is generated between the metal base 1 and the insulating frame 2 described later. It is formed of a material having a thermal expansion coefficient close to that of the insulating frame 2 and a good thermal conductor, for example, a copper-tungsten alloy (Cu-W alloy).

【0013】 尚、前記銅−タングステン合金より成る金属基体1は、例えばタングステンの 粉末(約10μm)を1000Kg/cm 2 の圧力で加圧成形するとともにこれを還元雰囲気 中、約2300℃の温度で焼成して多孔質のタングステン焼結体を得、次に1100℃の 温度で加熱溶融させた銅を前記タングステン焼結体の多孔部分に毛管現象を利用 し含浸させることによって形成される。The metal substrate 1 made of the copper-tungsten alloy is formed, for example, by pressing tungsten powder (about 10 μm) at a pressure of 1000 kg / cm 2 and pressurizing the powder at a temperature of about 2300 ° C. in a reducing atmosphere. It is formed by firing to obtain a porous tungsten sintered body, and then impregnating the porous portion of the tungsten sintered body with capillary phenomenon by utilizing the heat-melted copper at a temperature of 1100 ° C.

【0014】 また前記金属基体1 はその上面外周端に、金属基体1 の上面に設けた凸状の載 置部1aを囲繞するようにして絶縁枠体2 が取着されており、金属基体1 と絶縁枠 体2 とで半導体素子4 を収容するための空所が形成される。Further, an insulating frame body 2 is attached to the outer periphery of the upper surface of the metal base 1 so as to surround a convex mounting portion 1 a provided on the upper surface of the metal base 1. The insulating frame 2 and the insulating frame 2 form a space for housing the semiconductor element 4.

【0015】 前記絶縁枠体2 はアルミナセラミックス等の電気絶縁材料から成り、例えばア ルミナセラミックスの粉末に適当な有機溶剤、溶媒を添加混合して泥漿状となす とともにこれをドクターブレード法を採用することによってセラミックグリーン シート( セラミック生シート) を形成し、しかる後、前記セラミックグリーンシ ートに適当な打ち抜き加工を施すとともに複数枚積層し、高温( 約1600℃) で焼 成することによって製作される。The insulating frame 2 is made of an electrically insulating material such as alumina ceramics. For example, a powder of aluminum ceramics is mixed with an appropriate organic solvent or solvent to form a sludge, and a doctor blade method is adopted. Ceramic green sheet (ceramic green sheet) is formed by using the above method, and then the ceramic green sheet is subjected to appropriate punching processing, laminated with multiple sheets, and baked at high temperature (about 1600 ° C). It

【0016】 前記絶縁枠体2 はその下面にタングステン、モリブデン等の高融点金属粉末か ら成るメタライズ金属層6 が被着されており、該メタライズ金属層6 と金属基体 1 とを銀ロウ等のロウ材7 を介しロウ付けすることによって金属基体1 上に取着 される。A metallized metal layer 6 made of a high melting point metal powder such as tungsten or molybdenum is deposited on the lower surface of the insulating frame 2, and the metallized metal layer 6 and the metal substrate 1 are made of silver solder or the like. It is attached to the metal substrate 1 by brazing with the brazing material 7.

【0017】 また前記絶縁枠体2 の内部にはモリブデン、タングステン等の高融点金属粉末 から成る導電層8 が設けてあり、該導電層8 は半導体素子4 の電極を外部リード ピン9 に接続する作用を為し、その一端に外部リードピン9 が、また他端に半導 体素子4 の電極に接続されたボンディングワイヤ10が取着される。Inside the insulating frame 2, a conductive layer 8 made of a high melting point metal powder such as molybdenum or tungsten is provided, and the conductive layer 8 connects the electrode of the semiconductor element 4 to the external lead pin 9. The external lead pin 9 is attached to one end thereof, and the bonding wire 10 connected to the electrode of the semiconductor element 4 is attached to the other end thereof.

【0018】 前記絶縁枠体2 に設けた導電層8 に取着される外部リードピン9 は内部に収容 する半導体素子4 の各電極を外部電気回路に接続する作用を為し、コバール金属 (Fe-Ni-Co 合金) や42アロイ(Fe-Ni合金) 等の金属を棒状に加工したものが使用 される。The external lead pins 9 attached to the conductive layer 8 provided on the insulating frame 2 serve to connect the respective electrodes of the semiconductor element 4 housed inside to an external electric circuit, and the Kovar metal (Fe- A metal such as Ni-Co alloy) or 42 alloy (Fe-Ni alloy) processed into a rod shape is used.

【0019】 尚、前記外部リードピン9 の外表面にニッケル、金等から成る良導電性で、且 つ耐蝕性に優れた金属をメッキ法により2 乃至20μm の厚みに層着させておくと 外部リードピン9 と外部電気回路との電気的接続が良好となり、また外部リード ピン9 の酸化腐食が有効に防止される。従って、外部リードピン9 の酸化腐食を 防止し、且つ外部電気回路との電気的接続を良好とするには外部リードピン9 の 外表面にニッケル、金等から成る良導電性で、且つ耐蝕性に優れた金属を2 乃至 20μm の厚みに層着しておくことが好ましい。It should be noted that if a metal having good conductivity and excellent corrosion resistance made of nickel, gold or the like is layered on the outer surface of the external lead pin 9 by plating to a thickness of 2 to 20 μm, the external lead pin 9 The electrical connection between 9 and the external electric circuit is good, and oxidative corrosion of the external lead pin 9 is effectively prevented. Therefore, in order to prevent the oxidative corrosion of the external lead pins 9 and to improve the electrical connection with the external electric circuit, the outer surface of the external lead pins 9 is made of nickel, gold, etc., having good conductivity and excellent corrosion resistance. It is preferable that the metal is layered to a thickness of 2 to 20 μm.

【0020】 また前記上面に絶縁枠体2 が取着された金属基体1 は図2 に示すように、その 半導体素子載置部1a上に金属板5 を間に挟んで半導体素子4 が取着固定される。As shown in FIG. 2, the metal substrate 1 having the insulating frame 2 attached to the upper surface thereof has the semiconductor element 4 attached to the semiconductor element mounting portion 1a with the metal plate 5 interposed therebetween. Fixed.

【0021】 前記金属基体1 の半導体素子載置部1aと半導体素子4 との間に挟まれる金属板 5 は金属基体1 と半導体素子4 との熱膨張係数の差によって生じる熱応力を緩和 する作用を為し、モリブデン板5aの上面両面にニッケル膜5b、5bを接合させたも のが使用される。The metal plate 5 sandwiched between the semiconductor element mounting portion 1 a of the metal base 1 and the semiconductor element 4 serves to relieve thermal stress caused by the difference in thermal expansion coefficient between the metal base 1 and the semiconductor element 4. Therefore, the nickel films 5b and 5b are bonded to both upper surfaces of the molybdenum plate 5a.

【0022】 前記金属板5 は例えば、モリブデンから成る板の上下両面にニッケル薄板を従 来周知の圧延加工法により圧接させるとともにこれを打ち抜き加工法より所定形 状に打ち抜くことによって形成され、該金属板5 は打ち抜き開始面を金属基体1 の半導体素子載置部1a側に、打ち抜き終了面を半導体素子4 側として金属基体1 の半導体素子載置部1a上面に銀ロウ等のロウ材11を介し取着される。この場合、 金属板5 の上下両面にはロウ材と濡れ性の良いニッケル膜が配されているものの 側面にはロウ材と濡れ性の悪いモリブデンが露出しているため金属板5 を金属基 体1 の半導体素子載置部1aに取着する際、ロウ材11の一部が金属板5 の側面を這 い上がって上面に流出することは一切なく、その結果、金属板5 の上面に半導体 素子4 を極めて強固に固定することができる。The metal plate 5 is formed, for example, by pressing a nickel thin plate on both upper and lower surfaces of a plate made of molybdenum by a conventionally known rolling process and punching this into a predetermined shape by a punching process. The plate 5 has the starting surface for punching on the side of the semiconductor element mounting portion 1a of the metal substrate 1 and the end surface for punching on the side of the semiconductor element 4 on the upper surface of the semiconductor element mounting portion 1a of the metal substrate 1 with a brazing material 11 such as silver solder interposed therebetween. Be attached. In this case, the brazing material and the nickel film having good wettability are arranged on the upper and lower surfaces of the metal plate 5, but the brazing material and molybdenum having poor wettability are exposed on the side surfaces of the metal plate 5, so that the metal plate 5 is made of metal. When attaching to the semiconductor element mounting part 1a of 1, the brazing material 11 does not creep up on the side surface of the metal plate 5 and flows out to the upper surface at all. The element 4 can be fixed extremely firmly.

【0023】 また前記金属板5 の上面にはロウ材と濡れ性の良いニッケル膜2bが接合されて いることから金属板5 に半導体素子4 を強固に取着固定させることができ、その 結果、半導体素子4 を金属基体1 の半導体素子載置部1a上に極めて強固に固定す ることが可能となる。Since the brazing material and the nickel film 2b having good wettability are bonded to the upper surface of the metal plate 5, the semiconductor element 4 can be firmly attached and fixed to the metal plate 5, and as a result, It is possible to fix the semiconductor element 4 on the semiconductor element mounting portion 1a of the metal base 1 extremely firmly.

【0024】 更に前記金属板5 は打ち抜きによって形成する時に打ち抜き開始面側の外周部 に曲状の面取りが形成されており、これが金属板5 を金属基体1 の半導体素子載 置部1a上に取着する際、金属板5 と金属基体1 の半導体素子載置部1aとの間に多 量のロウ材11の介在を許容して両者の取着をより強固なものとなすこともできる 。Further, when the metal plate 5 is formed by punching, a curved chamfer is formed on the outer peripheral portion on the punching start surface side, which cuts the metal plate 5 on the semiconductor element mounting portion 1a of the metal substrate 1. At the time of attachment, a large amount of brazing material 11 can be allowed to intervene between the metal plate 5 and the semiconductor element mounting portion 1a of the metal base 1 to make the attachment of both materials stronger.

【0025】 尚、前記金属板5 はモリブデン板5aの上下両面に接合されるニッケル膜5b、5b の厚みが各々、50μm を越えると打ち抜き加工によって形成する際にニッケルが もつ延性よってニッケル膜5bがモリブデン板5aの側面に延伸被着し、ロウ材11の 這い上がりを有効に防止することができなくなる。従って、金属板5 のニッケル 膜5b、5bはその厚みを50μm 以下としてくことが好ましい。When the thickness of the nickel films 5b, 5b bonded to the upper and lower surfaces of the molybdenum plate 5a exceeds 50 μm, the nickel plate 5b is formed due to the ductility of nickel when it is formed by punching. The molybdenum plate 5a cannot be effectively stretched and adhered to the side surface of the molybdenum plate 5a, and the creeping up of the brazing material 11 cannot be effectively prevented. Therefore, it is preferable that the nickel films 5b and 5b of the metal plate 5 have a thickness of 50 μm or less.

【0026】 かくして本考案の半導体素子収納用パッケージによれば、金属基体1 の半導体 素子載置部1a上に取着された金属板5 に半導体素子4 を取着固定し、半導体素子 4 の各電極をボンディングワイヤ10を介して導電層8 に接続するとともに蓋体3 を絶縁枠体2 の上面に封止材を介し取着することによって最終製品としての半導 体装置となる。Thus, according to the semiconductor element housing package of the present invention, the semiconductor element 4 is attached and fixed to the metal plate 5 attached to the semiconductor element mounting portion 1a of the metal substrate 1, and each semiconductor element 4 is attached. By connecting the electrodes to the conductive layer 8 via the bonding wires 10 and attaching the lid 3 to the upper surface of the insulating frame 2 via a sealing material, a semiconductor device as a final product is obtained.

【0027】 尚、本考案は上述した実施例に限定されるものではなく、本考案の要旨を逸脱 しない範囲であれば種々の変更は可能であり、例えばモリブデン板5aの上下両面 にニッケル膜5b、5bを従来周知の圧延加工法により圧接接合させるのに変えて、 モリブデン板5aの上下両面にニッケルメッキを施し、所定厚みのニッケル膜5b、 5bを接合させてもよい。この場合、メッキによるニッケル膜5b、5bはその厚みが 7 μm 未満の薄いものとなると膜欠陥が多量に形成されて金属板5 を金属基体1 の半導体素子載置部1aに強固にロウ付け取着することが困難となる。従って、モ リブデン板5aの上下両面にニッケル膜5b、5bをメッキにより接合させる際にはそ の厚みを7 μm 以上、50μm 以下としてくことが好ましい。It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, the nickel film 5b is formed on both upper and lower surfaces of the molybdenum plate 5a. , 5b may be replaced by pressure bonding by a conventionally known rolling method, and nickel plating may be applied to both upper and lower surfaces of the molybdenum plate 5a to bond the nickel films 5b, 5b having a predetermined thickness. In this case, when the nickel films 5b, 5b formed by plating become thin with a thickness of less than 7 μm, a large number of film defects are formed, and the metal plate 5 is firmly brazed to the semiconductor element mounting portion 1a of the metal substrate 1. Difficult to wear. Therefore, when the nickel films 5b, 5b are bonded to the upper and lower surfaces of the molybdenum plate 5a by plating, the thickness thereof is preferably set to 7 μm or more and 50 μm or less.

【0028】 また上述の実施例では金属基体1 の半導体素子載置部1aに金属板5 を間に挟ん で半導体素子4 を取着する半導体素子収納用パッケージについて説明したが、ア ルミナセラミックス等から成る絶縁基体に半導体素子を収容するための凹部を設 け、該凹部内に金属板5 を間に挟んで半導体素子4 を取着する半導体素子収納用 パッケージにも適用可能である。In the above-described embodiment, the semiconductor element housing package in which the semiconductor element 4 is attached to the semiconductor element mounting portion 1a of the metal substrate 1 with the metal plate 5 sandwiched therebetween is described. The present invention can also be applied to a semiconductor element housing package in which a concave portion for accommodating a semiconductor element is provided in the insulating base body and the semiconductor element 4 is attached with the metal plate 5 sandwiched in the concave portion.

【0029】[0029]

【考案の効果】[Effect of the device]

本考案の半導体素子収納用パッケージによれば半導体素子が直接取着される金 属板に、上下両面にニッケル膜を接合させたモリブデン板を所定形状に打ち抜い たものを使用したことから金属板を金属基体の半導体素子載置部にロウ付け取着 する際、ロウ材の一部が金属板の側面を這い上がって上面に流出することは一切 なく、その結果、金属板の上面に半導体素子を強固に固定することができる。 According to the package for housing a semiconductor element of the present invention, a metal plate to which a semiconductor element is directly attached is punched into a predetermined shape from a molybdenum plate having nickel films bonded on both upper and lower surfaces. When brazing and attaching to the semiconductor element mounting part of the metal substrate, part of the brazing material does not climb up the side surface of the metal plate and flows out to the upper surface at all, and as a result, the semiconductor element is mounted on the upper surface of the metal plate. Can be firmly fixed.

【0030】 また前記金属板は打ち抜きによって形成する時に打ち抜き開始面側の外周部に 曲状の面取りが形成され、これが金属板を金属基体の半導体素子載置部上にロウ 付け取着する際、金属板と金属基体の半導体素子載置部との間に多量のロウ材の 介在を許容して両者の取着を強固となし、これよって半導体素子の半導体素子載 置部上への取着固定をより強固なものとなすことができる。Further, when the metal plate is formed by punching, a curved chamfer is formed on the outer peripheral portion on the punching start surface side, and when the metal plate is brazed and attached to the semiconductor element mounting portion of the metal substrate, A large amount of brazing material is allowed between the metal plate and the semiconductor element mounting part of the metal base to strengthen the attachment of both, thereby mounting and fixing the semiconductor element on the semiconductor element mounting part. Can be made stronger.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a package for housing a semiconductor device of the present invention.

【図2】図1に示す半導体素子収納用パッケージの要部
拡大断面図である。
FIG. 2 is an enlarged cross-sectional view of a main part of the semiconductor element storage package shown in FIG.

【符号の説明】[Explanation of symbols]

1・・・・・金属基体 1a・・・・半導体素子載置部 2・・・・・絶縁枠体 3・・・・・蓋体 5・・・・・金属板 5a・・・・モリブデン板 5b・・・・ニッケル膜 DESCRIPTION OF SYMBOLS 1 ... Metal base 1a ... Semiconductor element mounting part 2 ... Insulating frame 3 ... Lid 5 ... Metal plate 5a ... Molybdenum plate 5b ... Ni film

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】容器内部に金属体を介して半導体素子を取
着収容する半導体素子収納用パッケージにおいて、前記
金属板は上下両面にニッケル膜を接合させたモリブデン
板を打ち抜いたものが使用され、且つ打ち抜き終了面が
半導体素子側となっていることを特徴とする半導体素子
収納用パッケージ。
1. A semiconductor element housing package for mounting and housing a semiconductor element via a metal body inside a container, wherein the metal plate is a punched molybdenum plate having nickel films bonded to both upper and lower surfaces, Also, a package for housing a semiconductor element, wherein the punching end surface is on the semiconductor element side.
JP1991073486U 1991-09-12 1991-09-12 Package for storing semiconductor elements Expired - Lifetime JP2571571Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991073486U JP2571571Y2 (en) 1991-09-12 1991-09-12 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1991073486U JP2571571Y2 (en) 1991-09-12 1991-09-12 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH0525722U true JPH0525722U (en) 1993-04-02
JP2571571Y2 JP2571571Y2 (en) 1998-05-18

Family

ID=13519657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991073486U Expired - Lifetime JP2571571Y2 (en) 1991-09-12 1991-09-12 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2571571Y2 (en)

Also Published As

Publication number Publication date
JP2571571Y2 (en) 1998-05-18

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