JPH05253206A - Mri device - Google Patents

Abstract

PURPOSE:To suppress loss of the electric power at all time even though the load or pulse sequence varies. CONSTITUTION:From a high voltage power supply 2 a comparatively large voltage V11 is impressed on a gradient coil GC when a gradient current I is to be changed, while a voltage VL comparatively low and having the same polarity as the voltage VH is impressed on the coil GC by a variable low- voltage power supply 3 when the gradient current I is to be held constant. In conformity to instruction given by a host computer, the resistance value of the coil GC is changed or the output voltage VL from the variable low- voltage power supply 3 changed according to the pulse sequence.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an MRI gradient power supply device, and more particularly to an MRI gradient power supply device capable of reducing power loss.

[0002]

2. Description of the Related Art FIG. 10 is a block diagram of a main part of a conventional MRI apparatus 51. Gradient coil G of this MRI apparatus 51
C is a self-shield type gradient coil composed of an inner coil Cg and an outer coil Cs. When the changeover switch Sw is set to the solid line side in the figure, the gradient current I is supplied only to the inner coil Cg, and when the changeover switch Sw is set to the dotted line side in the figure, the inner coil C is set.
A gradient current I is supplied to both g and the outer coil Cs. The control of the changeover switch Sw is performed by the host computer 9 based on an instruction from the keyboard 8.

The gradient power supply controller 57 drives the transistor of the positive Tr bank 4 by the control signal Pd.
When the transistor on the positive side Tr bank 4 is active,
The gradient current I is supplied from the high-voltage power supply 2 or the low-voltage power supply 53 to the gradient coil GC (this is the positive direction of the gradient current I). Further, the gradient power supply control device 57 drives the transistor of the negative Tr bank 5 by the control signal Nd.
When the transistor on the negative side Tr bank 5 is active,
The gradient current I is supplied from the gradient coil GC to the high-voltage power supply 2 or the low-voltage power supply 53 (this is the negative direction of the gradient current I). The timing for driving the transistors in the positive Tr bank 4 and the negative Tr bank 4 is determined based on the pulse sequence instruction from the host computer 9.

FIG. 11 shows the positive Tr bank 4 and the negative T bank.
It is a principal part circuit diagram of r bank 5 and gradient coil GC.
Rg is the resistance of the inner coil Cg, and Rs is the resistance of the outer coil Cs. In the positive side Tr bank 4, the inner coil Cg (Rg)
Has its first end connected to a relatively large positive voltage + VH via FET 12 and FET 13. In addition, FET
It is connected via a diode 13 and a diode 14 to a relatively small positive voltage + VL. In the negative Tr bank 5, the first end of the inner coil Cg (Rg) is the FET 32 and the FET.
It is connected to a relatively large negative voltage -VH via 33. Also, via the FET 33 and the diode 34,
It is connected to a relatively small negative voltage -VL.

The second end of the inner coil Cg (Rg) is connected to the first end of the outer coil Cs (Rs) and is grounded when the changeover switch Sw is on the solid line side. Outer coil Cs (R
The second end of s) is grounded when the changeover switch Sw is on the dotted line side.

FIG. 12 shows changes in the gradient current I and the voltage V applied to the gradient coil GC when the changeover switch Sw is on the solid line side.
The change in GC is shown. During the period from time t1 to time t2, FETs 12 and 13 are activated and FET3
2, 33 are turned off. Therefore, a relatively large positive voltage
Gradient coil GC from + VH through FETs 12 and 13
Is supplied with the gradient current I. The FETs 12 and 13 are controlled to increase the gradient current I linearly. In the voltage VGC applied to the gradient coil GC, a positive voltage that linearly increases appears. Diode 14 is reverse biased because FET 12 is active and is off. At this time,
The voltage difference between the positive voltage + VH and the applied voltage VGC is FET12,1
3 and the product of the gradient current I and the gradient current I result in power loss. The hatched portion in FIG. 12 is the loss portion.

During the period from time t2 to time t3, the FET
Only 13 is activated and FETs 12, 32 and 33 are turned off. Therefore, from the relatively small positive voltage + VL,
A gradient current I is supplied to the gradient coil GC through the diode 14 and the FET 13. The FET 13 is controlled to keep the gradient current I constant. Gradient coil G
A constant positive voltage appears in the voltage VGC applied to C. At this time, the voltage difference between the positive voltage + VL and the applied voltage VGC is FET1.
3 and the product of the gradient current I and the gradient current I result in power loss. The hatched portion in FIG. 12 is the loss portion.

During the period from time t3 to time t4, the FET
Only 13 is activated and FETs 12, 32 and 33 are turned off. Therefore, from the relatively small positive voltage + VL,
A gradient current I is supplied to the gradient coil GC through the diode 14 and the FET 13. The FET 13 is controlled to decrease the gradient current I linearly. A negative voltage that linearly decreases appears in the voltage VGC applied to the gradient coil GC. At this time, the voltage of the difference between the positive voltage + VL and the applied voltage VGC is applied to the FET 13, and the product of this and the gradient current I results in power loss. The hatched portion in FIG. 12 is the loss portion.

During the period from time t4 to t5, the FET 12,
13, 32, 33 are turned off. Therefore, the gradient current I
Is not supplied. In the period from time t5 to t6, the operations of the FETs 12 and 13 and the operations of the FETs 32 and 33 are switched during the period from time t1 to t2.
During the period from time t6 to t7, the operations of the FETs 12 and 13 and the FETs 32 and 33 during the period from time t2 to t3 are performed.
The behavior of is changed. The period from time t7 to t8 is FET1 during the period from time t3 to t4.
The operations of Nos. 2 and 13 and the operations of the FETs 32 and 33 are interchanged.

FIG. 13 shows changes in the gradient current I and the voltage V applied to the gradient coil GC when the changeover switch Sw is on the dotted line side.
The change in GC is shown. When the changeover switch Sw is on the dotted line side, the series circuit of the inner coil Cg (Rg) and the outer coil Cs (Rs) becomes a load, so the gradient current I is smaller than when the changeover switch Sw is on the solid line side (FIG. 12). Become. Therefore, the voltage VGC applied to the gradient coil GC also decreases, and the power loss (hatched portion in FIG. 13) increases more than when the changeover switch Sw is on the solid line side (FIG. 12).

[0011]

[Problems to be Solved by the Invention] Conventional MRI apparatus 51
Then, the period during which the gradient current I is constant or decreased is
The power loss is reduced by switching from the relatively large positive power source + VH or negative power source -VH to the relatively small positive power source + VL or negative power source -VL. But a relatively small positive power supply +
VL or negative power supply-VL was constant even when the load changed. Therefore, there is a problem that the power loss increases as the load increases. That is, a relatively small positive power source
Properly set + VL or negative power supply -VL, and time t in FIG.
Even if the hatching part in the period from 2 to time t3 or the period from time t6 to time t7 is minimized, the time t2 in FIG.
There is a problem that it is not possible to suppress the hatched portion during the period from time t3 to time t3 or during the period from time t6 to time t7. Further, since the relatively small positive power supply + VL or negative power supply -VL was constant even if the pulse sequence was changed, the same problem occurred in this case as well.

Therefore, an object of the present invention is to provide an MRI apparatus capable of constantly suppressing the power loss even if the load or the pulse sequence changes.

[0013]

The MRI apparatus of the present invention comprises first switch means for supplying a gradient current I by applying a relatively large voltage VH to the gradient coil when the gradient current I is changed, and gradient means I. When the current I is held constant, a voltage VH having the same polarity as the voltage VH but a relatively small voltage V
A constitutional feature is provided with a second switch means for applying L to supply a gradient current I, and an applied voltage changing means for changing the voltage VL according to a resistance value of the gradient coil or a pulse sequence. To do.

In the above structure, "large" and "small" are absolute values. Therefore, "relatively large voltage VH" includes positive voltage + VH or negative voltage -VH, and "relatively small voltage VL" includes positive voltage + VL or negative voltage -VL.

[0015]

In the MRI apparatus of the present invention, the applied voltage changing means changes the voltage VL according to the resistance value of the gradient coil or the pulse sequence. Therefore, the voltage applied to the switch circuit can be reduced, and the power loss can be suppressed to a low level.

[0016]

The present invention will be described in more detail with reference to the embodiments shown in the drawings. However, this does not limit the present invention. FIG. 1 is a block diagram of essential parts of an MRI apparatus 1 of the present invention. The gradient coil GC of the MRI apparatus 1 is a self-shield type gradient coil including an inner coil Cg and an outer coil Cs. When the changeover switch Sw is set to the solid line side in the figure, the gradient current I is supplied only to the inner coil Cg, and when the changeover switch Sw is set to the dotted line side in the figure, the inner coil C is set.
A gradient current I is supplied to both g and the outer coil Cs. The control of the changeover switch Sw is performed by the host computer 9 based on an instruction from the keyboard 8.

The gradient power supply controller 7 drives the transistor of the positive Tr bank 4 by the control signal Pd. When the transistor of the positive Tr bank 4 is active, the gradient current I is supplied from the high voltage power source 2 or the variable low voltage power source 3 to the gradient coil GC (this is the positive direction of the gradient current I). Further, the gradient power supply control device 7 drives the transistor of the negative Tr bank 5 by the control signal Nd. When the transistor of the negative Tr bank 5 is active, the gradient current I is supplied from the gradient coil GC to the high voltage power source 2 or the variable low voltage power source 3 (this is the negative direction of the gradient current I). The timing for driving the transistors in the positive Tr bank 4 and the negative Tr bank 4 is determined based on the pulse sequence instruction from the host computer 9.

Further, the gradient power supply control device 7 sends the voltage change signal Scv to the variable low voltage power supply 3 based on the switching information of the changeover switch Sw and the instruction of the pulse sequence inputted from the host computer 9. The variable low voltage power source 3 is
The output voltage + VL or -VL is changed by the voltage change signal Scv. For example, the output voltage + VL or -VL is made smaller when the changeover switch Sw is on the dotted line side than when the changeover switch Sw is on the solid line side.

A change in the gradient current I and a change in the voltage VGC applied to the gradient coil GC when the positive Tr bank 4 and the negative Tr bank 5 shown in FIG. 11 are used are shown in FIG. Time) and FIG. 3 (when the changeover switch Sw is on the dotted line side). FIG. 2 shows FIG. 12 (conventional).
Same as, but with a relatively small positive supply + VL or negative supply-
By appropriately setting VL, it is possible to minimize the hatched portion in the period from time t2 to time t3 or the period from time t6 to time t7. FIG. 3 corresponds to FIG. 13 (conventional), but since the variable low-voltage power supply 3 can change the output voltage + VL or −VL to a small value, the relatively small positive power supply + VL or negative power supply − also at this time. By appropriately setting VL, a period from time t2 to time t3 or time t6 to time t7
The hatching part of the period can be minimized. Therefore, it becomes possible to always keep the power loss low.

FIG. 4 is a circuit diagram of essential parts of the positive Tr bank 4 and the negative Tr bank 5 according to another embodiment. Rg is the resistance of the inner coil Cg, and Rs is the resistance of the outer coil Cs. The first end of the inner coil Cg (Rg) is connected to a relatively large positive voltage + VH via the FET 12 and the FET 13. Further, it is connected to a relatively small positive voltage + VL via the FET 13 and the diode 14. Further, it is connected to a relatively small negative voltage -VL via the FET 16 and the diode 20. In addition, FET3
2 and FET33, relatively large negative voltage -VH
It is connected to the. Further, it is connected to a relatively small negative voltage -VL via the FET 33 and the diode 34. Also, via the FET 21 and the diode 25,
It is connected to a relatively small positive voltage + VL.

FIG. 5 shows the change in the gradient current I and the voltage VGC applied to the gradient coil GC when the changeover switch Sw is on the solid line side.
Shows the change. During the period from the time t1 to the time t2, the FETs 12, 13, 16 are activated and the FE
T32, 33, 21 are turned off. Therefore, the gradient current I is supplied from the relatively large positive voltage + VH to the gradient coil GC through the FETs 12 and 13. FET12,
13 is controlled to increase the gradient current I linearly. In the voltage VGC applied to the gradient coil GC, a positive voltage that linearly increases appears. The diode 14 is a FET
Since 12 is active, it is reverse biased and off. Further, the diode 20 is reverse biased because the applied voltage VGC is positive and is off. At this time, the voltage of the difference between the positive voltage + VH and the applied voltage VGC is applied to the FETs 12 and 13,
The product of this and the gradient current I results in power loss. The hatched portion in FIG. 5 is the loss portion.

During the period from time t2 to time t3, the FET is
13 and 16 are activated and FETs 12, 32 and 3
3,21 are turned off. Therefore, the gradient current I is supplied to the gradient coil GC from the relatively small first positive voltage + VL1 through the diode 14 and the FET 13. F
The ET 13 is controlled to keep the gradient current I constant. A constant positive voltage appears in the voltage VGC applied to the gradient coil GC. Since the applied voltage VGC is positive, the diode 20 is reverse biased and is off. At this time, the voltage of the difference between the first positive voltage + VL1 and the applied voltage VGC is applied to the FET 13, and the product of this and the gradient current I results in power loss.
The hatched portion in FIG. 5 is the loss portion.

During the period from time t3 to time t4, the FET
Only 16 are activated and FETs 12, 3, 32,
33 and 21 are turned off. Therefore, the relatively small first
Gradient coil G from negative voltage -VL1 through FET16
Gradient current I is supplied to C. FET 16 is controlled to decrease the gradient current I linearly. A negative voltage that linearly decreases appears in the voltage VGC applied to the gradient coil GC. At this time, the first negative voltage −VL1 and the applied voltage V
The voltage of the difference of GC is applied to the FET 16, and the product of this and the gradient current I results in power loss. The hatched portion in FIG. 5 is the loss portion. As can be seen from comparison with FIG. 2 (FIG. 12), the loss is small.

During the period from time t4 to t5, the FET 12,
13, 16, 32, 33, 21 are turned off. Therefore, the gradient current I is not supplied. The period from time t5 to t6 is the FET1 during the period from time t1 to t2.
The operations of 2, 13, 16 and the operations of the FETs 32, 33, 21 are interchanged. During the period from time t6 to t7, the FET 12 during the period from time t2 to t3 is
The operations of 13, 16 and the operations of the FETs 32, 33, 21 are interchanged. During the period from time t7 to t8, the FETs 12, 13 in the period from time t3 to t4 are
The operation of 16 and the operation of the FETs 32, 33 and 21 are interchanged.

FIG. 9 shows changes in the gradient current I and changes in the voltage VCg at the first end of the inner coil Cg (Rg) when the changeover switch Sw is on the dotted line side. During the period from the time t1 to the time t2, the FETs 12, 13, 16 are activated and the FETs 32, 33, 21 are turned off. Therefore,
As shown in FIG. 7, from the relatively large positive voltage + VH, the FE
The gradient current I is applied to the gradient coil GC through T12 and T13.
Is supplied. The FETs 12 and 13 are controlled to increase the gradient current I linearly. In the voltage VGC applied to the gradient coil GC, a positive voltage that linearly increases appears. Diode 14 is reverse biased and off because FET 12 is active. In addition, the diode 20 is
Since the applied voltage VGC is positive, it is reverse biased and is off.
At this time, the voltage of the difference between the positive voltage + VH and the applied voltage VGC is FE
It depends on T12 and T13, and the product of this and the gradient current I results in power loss. The hatched portion in FIG. 6 is the loss portion.

During the period from time t2 to time t3, the FET
13 and 16 are activated and FETs 12, 32 and 3
3,21 are turned off. Therefore, as shown in FIG.
From the relatively small second positive voltage + VL2 (VL1> VL2 is set by the variable low-voltage power supply 3), the diode 14 and the FE
The gradient current I is supplied to the gradient coil GC through T13. The FET 13 is controlled to keep the gradient current I constant. The voltage VGC applied to the gradient coil GC is
A constant positive voltage appears. Since the applied voltage VGC is positive, the diode 20 is reverse biased and is off. At this time, the voltage of the difference between the second positive voltage + VL2 and the applied voltage VGC is FE
It depends on T13, and the product of this and the gradient current I results in power loss. The hatched portion in FIG. 6 is the loss portion. As can be seen from comparison with FIG. 13, the loss is small.

In the period from time t3 to time t4, the FET is
Only 16 are activated and FETs 12, 3, 32,
33 and 21 are turned off. Therefore, as shown in FIG. 9, the gradient current I is supplied from the relatively small first negative voltage −VL1 to the gradient coil GC through the FET 16.
FET 16 is controlled to decrease the gradient current I linearly. A negative voltage that linearly decreases appears in the voltage VGC applied to the gradient coil GC. At this time, the voltage of the difference between the first negative voltage −VL1 and the applied voltage VGC is applied to the FET 16, and the product of this and the gradient current I becomes a loss of power.
The hatched portion in FIG. 6 is the loss portion. As can be seen from comparison with FIG. 3 (FIG. 13), the loss is small.

During the period from time t4 to t5, the FET 12,
13, 16, 32, 33, 21 are turned off. Therefore, the gradient current I is not supplied. The period from time t5 to t6 is the FET1 during the period from time t1 to t2.
The operations of 2, 13, 16 and the operations of the FETs 32, 33, 21 are interchanged. During the period from time t6 to t7, the FET 12 during the period from time t2 to t3 is
The operations of 13, 16 and the operations of the FETs 32, 33, 21 are interchanged. During the period from time t7 to t8, the FETs 12, 13 in the period from time t3 to t4 are
The operation of 16 and the operation of the FETs 32, 33 and 21 are interchanged.

Thus, even when the Tr banks 4 and 5 shown in FIG. 4 are also used, the power loss can be kept low.

In the above embodiment, the low voltage VL is changed according to the load, but the same applies to the case where the low voltage VL is changed according to the pulse sequence. Also, low voltage VL
The change may be continuous or switchable.

[0031]

According to the MRI apparatus of the present invention, even if the load or the pulse sequence changes, the power loss can always be kept low.

[Brief description of drawings]

FIG. 1 is a block diagram of an MRI apparatus according to an embodiment of the present invention.

2 is a diagram showing a change in gradient current I and a voltage V applied to a gradient coil GC when the changeover switch Sw is on the solid line side when the positive Tr bank and the negative Tr bank shown in FIG. 11 are used.
It is a wave form diagram which shows change of GC.

FIG. 3 is a diagram showing a change in the gradient current I and a voltage V applied to the gradient coil GC when the changeover switch Sw is on the dotted line side when the positive Tr bank and the negative Tr bank shown in FIG. 11 are used.
It is a wave form diagram which shows change of GC.

FIG. 4 is a main part circuit diagram of another example of the positive Tr bank and the negative Tr bank.

5 is a diagram showing a change in the gradient current I and a voltage VGC applied to the gradient coil GC when the changeover switch Sw is on the solid line side when the positive Tr bank and the negative Tr bank shown in FIG. 4 are used.
It is a waveform diagram showing the change of.

6 is a diagram showing a change in gradient current I and a voltage VGC applied to the gradient coil GC when the changeover switch Sw is on the dotted line side when the positive Tr bank and the negative Tr bank shown in FIG. 4 are used.
It is a waveform diagram showing the change of.

7 is an equivalent circuit diagram of the circuit of FIG. 4 in a period from time t1 to time t2.

8 is an equivalent circuit diagram of the circuit of FIG. 4 in a period from time t2 to time t3.

9 is an equivalent circuit diagram of the circuit of FIG. 4 in a period from time t4 to time t5.

FIG. 10 is a block diagram of an example of a conventional MRI apparatus.

FIG. 11 is a circuit diagram of a main part of a conventional example of a positive Tr bank and a negative Tr bank.

FIG. 12 is a positive side Tr bank and a negative side Tr shown in FIG.
FIG. 7 is a waveform diagram showing changes in the gradient current I and changes in the voltage VGC applied to the gradient coil GC when the changeover switch Sw is on the solid line side when using a bank.

FIG. 13 is a positive side Tr bank and a negative side Tr shown in FIG.
FIG. 6 is a waveform diagram showing changes in the gradient current I and changes in the voltage VGC applied to the gradient coil GC when the changeover switch Sw is on the dotted line side when using a bank.

[Explanation of symbols]

 1 MRI device 2 High voltage power supply 3 Variable low voltage power supply 4 Positive side Tr bank 5 Negative side Tr bank 7 Gradient power supply control device 9 Host computer GC Gradient coil Cg Inner coil Cs Outer coil Sw Changeover switch I Gradient current VGC Applied voltage

Claims (1)

[Claims] 1. A first switch means for applying a relatively large voltage VH to the gradient coil when changing the gradient current I to supply the gradient current I, and a gradient coil for maintaining the gradient current I constant. Second switch means for supplying a gradient current I by applying a relatively small voltage VL having the same polarity as the voltage VH, and an applied voltage change for changing the voltage VL according to the resistance value or pulse sequence of the gradient coil. And a gradient power supply device for MRI.