JPH0524183Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a dot printing head that incorporates one line of dot printing elements and a shift register that supplies printing data to each element. This invention relates to a print control circuit for a dot print head that operates in synchronization with a shift clock input to a shift register every time a line is printed to load print data into a register stage corresponding to an analog signal level to be printed.

[Conventional technology]

FIG. 4 shows a conventional printing control circuit of this type, in which an analog signal to be printed is sampled and held in a sampling circuit 21 and a hold circuit 22, and the hold signal is once digitized in an A/D converter 23. and store it in the memory 24. Then, a data pulse generation circuit 25 using a microprocessor or hard logic in some cases reads out the stored digital signal and converts it into a printing data pulse corresponding to a time-series analog signal level, which is then sent to the dot printing head. The corresponding register stage of the built-in shift register was loaded in synchronization with the shift clock.

That is, since the analog signal is A/D converted and then digitally processed, the circuit becomes complicated and expensive, and the use of a memory element is also essential. Furthermore, in this type of printing device, in order to increase the printing width of the analog signal, a plurality of dot printing elements are normally operated in response to one sampled analog input signal for each line printing. Even when performing such processing, the circuit becomes even more complicated.

In view of this point, it is an object of the present invention to provide a simpler and cheaper print control circuit for a dot print head.

[Means for solving problems]

In order to achieve this object, the present invention has a dot printing head 1 which has a built-in dot printing element 1a and a shift register 1b, as shown in FIG. a reference analog signal generating circuit 3 which generates a reference analog signal whose level increases every clock of the aforementioned shift clock for each line of printing, and a shift register for a predetermined period of time from the time when the output signal of the comparator 2 is generated. A print control circuit consisting of a data pulse generation circuit 4 that generates data pulses as data input signals is attached.

[Effect]

A number of shift clocks corresponding to the number of register stages are input to the shift register 1b at predetermined time intervals for each printing line. By simultaneously inputting this shift clock to the reference analog signal generation circuit 3, a stepped reference analog signal a whose level increases with each input of each shift clock is generated.
occurs. When the reference analog signal exceeds the analog signal b input to the comparator 2, for example, the input waveform signal, in response to the output signal, the data pulse generation circuit 4 generates a data pulse c with a time width corresponding to the print width from the time the output signal is generated. occurs. That is,
A data pulse c is generated whose period is equal to the number of clock pulses corresponding to the number of printing elements to be activated for printing. Such data pulses c are sequentially loaded into the shift register 1b, and after the shift operation by the shift clock is completed, they are loaded as print data into the register stage at the shift position corresponding to the level of the analog signal. Then, the dot printing elements belonging to the register stage loaded with print data are simultaneously activated for printing.

[Example of idea]

In FIG. 2, reference numeral 11 denotes a printing head, in addition to a dot printing element 11a and a shift register 11b attached thereto, a latch circuit 11 is installed between them.
c is involved. 12 is a comparator, 13a
is a counter that counts shift clocks, and 1
3b is a D/A converter that converts the counted value into analog. Both of these 13a and 13b constitute the reference analog signal generation circuit 3. 14
is a monostable multivibrator that operates at the leading edge of the output signal of the comparator 12 and generates a pulse with a time width corresponding to the printing width. 15 is a timing for generating a latch signal for latching the loaded print data to the associated latch circuit 11c and a print operation signal for causing the associated dot printing element 11a to perform a printing operation after the shift operation of the shift register 11b is completed. This is a signal generation circuit.

The operation is as follows.

The counter 13a sequentially counts the shift clock, and the D/A converter 13b converts the counted value into an analog signal of a corresponding level. That is, the comparator 12 is supplied with a reference analog signal whose level increases stepwise every time the counter 13a counts up. During this process, the comparator 12 generates an output signal when a higher level analog signal is input. The monostable multivibrator 14 is triggered at the leading edge of its output signal and generates a data pulse signal with a pulse width corresponding to approximately three times the clock pulse period, such that the printing width is, for example, the interval between three consecutive dot printing elements. Occur. This data pulse is the shift register 1
1b, and is shifted in the shift register 11b every time a subsequent shift clock is input.
After the shift operation is completed, the dot is shifted to the register stage belonging to the dot printing element at the position where the printing operation is to be performed. The timing signal generating circuit 15 determines the end of this shift operation based on the count value of the counter 13a, causes the latch circuit 11c to latch the print data of the shift register 11b, and then simultaneously causes the dot printing element 11a to perform a printing operation. During this time, the shift register 11b starts a similar operation for the next line. The print head 11 is thus
Waveforms corresponding to analog signals are recorded by repeating printing for each line.

FIG. 3 shows another embodiment in which the monostable multivibrator 14 in the print control circuit of FIG. 2 is followed by an OR gate 19. That is, ORGATE 19
Overwriting is then possible by providing another data pulse, for example waveform data or character data of another channel, generated by the present invention or by a conventional digital circuit and synchronized with the shift clock. Further, as a reference analog signal generation circuit, the counter 13a and the D/A converter 13b can generate a reference analog signal with high precision, but a staircase wave can be generated by charging a capacitor with the pulse voltage of each shift clock. Other circuit configurations, such as an analog type, are also possible. Further, the data pulse generating circuit 4 can also be a differentiating circuit having a falling edge for a predetermined time.

[Effect of idea]

As described above, according to the present invention, a simple and inexpensive print control circuit can be realized that does not require digital processing after A/D conversion of the analog signal by comparing the input analog signal to be printed with a reference analog signal that is leveled up at each shift clock of the print head shift register, and generates a data pulse to be loaded into the register. In other words, it is no longer necessary to use the A/D conversion element preceded by the sample-and-hold circuit, the memory for temporarily storing the A/D converted digital signal, or the circuit for converting the read digital signal into a time series data pulse by digital processing, which were previously required.

[Brief explanation of the drawing]

FIG. 1a is a block diagram showing the configuration of the printing control circuit according to the present invention, FIG. 1b is its operating waveform, and FIG.
FIG. 3 is a block diagram showing the configuration of a print control circuit according to an embodiment of the present invention, FIG. 3 is a circuit diagram showing a modification of the circuit shown in FIG. 2, and FIG. 4 is a conventional corresponding print control circuit.

Claims (1)

[Claims for Utility Model Registration] For a dot printing head that incorporates one line of dot printing elements and a shift register in which each element is sequentially connected to register stages with successively increasing shift positions, for each printing of one line. In the print control circuit that operates in synchronization with the shift clock input to the shift register to load print data into the register stage at the shift position corresponding to the level of the analog signal to be printed, the reference analog signal is a comparator that generates an output signal when the output signal exceeds the level, a reference analog signal generation circuit that generates the reference analog signal whose level increases every clock of the shift clock for printing one line, and a reference analog signal generation circuit that generates the reference analog signal whose level increases for each clock of the shift clock; A print control circuit for a dot print head, comprising a data pulse generation circuit that generates a data pulse as a data input signal for the shift register.