JPH05227524A - Data compressor - Google Patents

Abstract

PURPOSE:To provide a data compression controller which ideally weights picture data by each picture type by validly utilizing the buffer of a decoder. CONSTITUTION:This compressor is constituted of a balance register 61 in which plural quantization step balances are set according to each picture type of different inter-picture predictive structures, buffer simulation circuit 58 which predicts the state of future compression data amounts from both the appearance position of each picture type of the preliminarily set inter-picture predictive structure, and the past encoded state and amounts, and quantization step balance deciding circuit 59 which selects the quantization step balance based on the predicted result. The buffer simulation is operated by a default value when a scene change is detected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a moving picture signal coding apparatus for performing highly efficient coding by combining intra-picture (frame or field) coding and inter-picture (frame or field) coding. The present invention relates to a data compression apparatus suitable for use when a plurality of picture (frame or field) types exist in an inter-frame or field prediction structure.

[0002]

2. Description of the Related Art A method for realizing high-efficiency coding by combining intra-picture (frame or field) coding and inter-picture (frame or field) coding with the method conventionally used for image compression. is there.

FIG. 5 is a block diagram showing an example of a conventional data compression apparatus. This is because, as shown in FIG. 3, the reference images 31 and 35 for each N picture (N = 9 in this example).
... are set, the reference images 31, 35, ... Are intra-frame coded (intra-frame coded image I), and the inter-frame images 32 to 34 between the reference images 31, 35 are inter-frame codes using image correlation. Are performed (unidirectional interframe predictive coded image P, bidirectional interframe predictive coded image B).

First, the processing of the intra-frame coded image I will be described. When the reference image 31 (35) is input, the switches 11 and 21 are switched to the contact a side. As a result, the reference image is input to the orthogonal transformation circuit 22 via the switches 11 and 21 and orthogonally transformed. The orthogonal transform coefficient output from the orthogonal transform circuit 22 is the quantization circuit 23.
Is quantized. The quantization circuit 23 generates a coded value of the orthogonal transform coefficient and quantization control information (quantization step), and outputs it to the coding circuit 24. The encoding circuit 24 encodes the input encoded value and the quantized information, and the mixer 26
To a circuit (not shown). At this time, switch 1
2 is switched every 4 frames, and the input reference image is alternately recorded in FMs (frame memories) 16 and 17.

Next, the processing of the inter-frame predictive coded images P and B will be described. Interframe images 32, 33, 3
4 is being input, the switches 11 and 12 have contacts b
Switched to the side. As a result, the inter-frame image 32,
33 and 34 are sequentially recorded in FM (frame memories) 13 to 15.

The motion detection circuit 19 includes a frame memory 13
The inter-frame image 32 (33, 34) of is divided into blocks of a predetermined size (for example, 8 × 8 pixels), and the reference image 31 immediately before or after being stored in the frame memories 16 and 17 for each block. , 35 are detected. The fore-and-aft motion compensation circuit 18 uses the inter-frame image 32 (33, 33, ...
The predicted image Pa from the reference image 31 immediately before the block 34), the predicted image Pb from the immediately following reference image 35, and the predicted image Pc composed of the average value for each pixel corresponding to the predicted images Pa and Pb are generated. Then, among them, the predicted image having the highest correlation is selected for each block and output to the subtractor 20. Further, the information about the selected predicted image is output to the encoding circuit 25 as selection mode data.

The subtractor 20 calculates the difference (prediction error) between the inter-frame image 32 (33, 34) input by the frame memory 13 and the prediction image input by the front-back motion compensation circuit 18, and the prediction error is calculated. Is input to the orthogonal transformation circuit 22 via the switch 21 and orthogonal transformation is performed. The quantization circuit 23 quantizes the orthogonally transformed data by the quantization step determined from the information of the quantization step determination circuit 28.

The quantizing step in the quantizing circuit 23 becomes coarse when the quantizing step determining circuit 28 is larger than the target transfer rate based on the coded data amount counted by the counter 27 described later, If it is small, it will be finely controlled. In the quantization step determination circuit 28, the error amount (real code amount-target code amount) with respect to the target code amount is added and stored in the virtual buffer, and the quantization step is proportional to this virtual buffer as shown in FIG. Control to be. The quantized data is input to the first encoding circuit 24, encoded, and then input to the mixer 26.

The second encoding circuit 25 includes a motion detecting circuit 1
9 and the selected mode information output from the forward / backward motion compensation circuit 18 are encoded and output to the mixer 26. The mixer 26 includes the first and second encoding circuits 24 and 25.
The data output by is mixed and output to the counter 27. The counter 27 counts the generated code amount and outputs the information to the quantization step determination circuit 28 as described above. The encoded data is output to a circuit (not shown) via the counter 27.

[0010]

Although the method of combining the intra-frame coding and the inter-frame coding as described above is very effective for increasing the compression rate, the output data amount depends on the frame type. Since they are different and basically the compression technique uses variable length coding, the amount of output data varies depending on the frame type even with the same frame type. Nevertheless, the conventional data compression device merely counts the code data at the time of outputting the bit stream, and controls the quantization step by observing the generation state thereof so that the code amount is kept constant on average.

As a result, in the conventional data compression apparatus, the buffer of the decoder cannot be used effectively enough for coding, and it is impossible to ideally weight each frame type, and there is room for improving image quality. Was left. Furthermore, the buffer may underflow if a frame type with a large code amount occurs in the inter-frame prediction structure, or may overflow if the frame type is the other way around, and there is a risk of image transmission failure. In addition, since the quantization step is individually determined for each picture of each frame type, the quantization step of a specific picture becomes large and the image quality is extremely deteriorated. Then, the image quality may be continuously deteriorated.

[0012]

In order to solve the above-mentioned problems, the present invention provides a data compression apparatus for high-efficiency coding an input image by combining intra-picture coding and inter-picture coding. Based on the appearance position of each picture type of the set inter-picture prediction structure, the past coding state (quantization step), and the code amount, the state of the future compressed data amount is predicted in time to perform coding control. A data compression controller having means (buffer simulation circuit 58) is provided.

Furthermore, in a data compression apparatus for highly efficient coding of an input image by combining intra-picture coding and inter-picture coding, a plurality of quanta are provided according to each picture type of different inter-picture prediction structures. The compressed data that is temporally future is calculated from the means (balance register 61) in which the encoding step balance is set, the appearance position of each picture type of the inter-picture prediction structure set in advance, the past encoding state, and the encoding amount. Means for predicting the quantity state (buffer simulation circuit 58);
The present invention provides a data compression device having means (quantization step balance determination circuit 59) for selecting the plurality of quantization step balances set based on the result of the above-mentioned prediction.

Further, means for determining whether a scene change has occurred in the input image (scene change detection circuit 6
2) and when a scene change occurs, the state of the compressed data amount in the temporal future is calculated from the preset average encoding state and the encoding amount, not the past encoding state and the encoding amount. The present invention provides the data compression device described above.

Furthermore, in a data compression apparatus for highly efficient coding of an input image by combining intra-picture coding and inter-picture coding, a plurality of quanta corresponding to each picture type of different inter-picture prediction structures are used. Means for setting the quantization step balance (balance register 61), and means for selecting the plurality of quantization step balances set based on the contents of the input image and the amount of compressed data to be output (quantum And a data compression device having a conversion step balance determination circuit 59).

[0016]

According to the data compression controller having the above structure, the buffer of the decoder is effectively used for coding, and the weighting is ideally performed for each picture (frame or field) type.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of a data compression control device of the present invention. Also in this embodiment, as shown in FIG. 3, the reference images 31, 35 ... Are set for each N picture (N = 9 in this example). Reference image 3
, 35 are intra-frame coded (intra-frame coded image I), and inter-frame image 3 between reference images 31 and 35.
2 to 34 ... Perform interframe coding using the correlation of images (unidirectional interframe predictive coded image P,
Bidirectional interframe predictive coded image B).

First, the processing of the intra-frame coded image I will be described. When the reference image 31 (35) is input, the switches 41 and 51 are switched to the setting a side. As a result, the reference image is input to the orthogonal transformation circuit 52 via the switches 41 and 51 and orthogonally transformed. The orthogonal transformation coefficient output from the orthogonal transformation circuit 52 is the quantization circuit 53.
Is quantized. The quantization circuit 53 generates a coded value of the orthogonal transform coefficient and quantization control information (quantization step), and outputs it to the coding circuit 54. The encoding circuit 54 encodes the input encoded value and the quantization control information, and outputs them to a circuit (not shown) via the mixer 56. At this time, the switch 42 is switched every four frames, and the input reference image is recorded alternately in the FM (frame memories) 46 and 47.

Next, the processing of the inter-frame predictive coded images P and I will be described. Interframe images 32, 33, 3
4 is being input, the switches 41 and 51 have contacts b
Switched to the side. As a result, the input image is F
It is sequentially stored in M (frame memory) 43 to 45. The motion detection circuit 49 divides the inter-frame image 32 (33, 34) of the frame memory 43 into blocks of a predetermined size (for example, 8 × 8 pixels) and stores the blocks in the frame memories 46 and 47 for each block. The motion vector from the reference images 31 and 35 immediately before or immediately after the detection is detected. At that time, the detected motion vector is output to the motion amount calculation circuit 60. The motion amount calculation circuit 60 calculates, for example, the sum of absolute values of the magnitudes of motion vectors, and outputs it as motion amount information to a quantization step balance determination circuit 59 described later. Further, the motion amount information is output to the scene change detection circuit 62, and when the motion amount exceeds a predetermined threshold value, it is judged and detected as a scene change. The judgment result of the scene change is
It is output to the buffer simulation circuit 58 described later.

The motion compensation circuit 48 before and after the inter-frame image 32 (33, 3) read from the frame memory 43.
For the block 4), the predicted image Pa from the immediately preceding reference image 31, the predicted image Pb from the immediately following reference image 35,
The predicted images Pc, which are the average values of the corresponding pixels of the predicted images Pa and Pb, are generated. The predicted image having the highest correlation among them is selected for each block and output to the subtractor 50. Further, the information about the selected predicted image is output to the encoding circuit 55 as selection mode data.

The subtractor 50 calculates the difference (prediction error) between the inter-frame image 32 (33, 34) input by the frame memory 43 and the prediction image input by the front-back motion compensation circuit 48, and this prediction error. Is input to the orthogonal transformation circuit 52 via the switch 51 and subjected to orthogonal transformation. The quantization circuit 53 quantizes the orthogonally transformed data by the quantization step determined by the quantization step balance determination circuit 59 described later. The counter 57 counts the generated code amount for each frame type, and a picture information memory 58 attached to a buffer simulation circuit 58 described later.
It is output to c. It should be noted that the quantization step corresponding to the frame type code amount is simultaneously input from the quantization circuit 53 and stored in the picture information memory 58c.

Here, the state of the data amount of the future image in terms of time is predicted from the appearance position of each picture type of the preset inter-picture (frame) prediction structure, the past encoding state, and the code amount. The buffer simulation circuit 58, which is a means for doing so, will be described. In the buffer simulation circuit 58, the movement of the buffer is simulated in the future direction as shown in FIG. 2 using the quantization step and the code amount concerning the latest frame type. The buffer shown here is an image of the buffer on the decoder side. Bm is the maximum value (MAX value) of the buffer, and the control is, for example, the upper limit of 15/16 Bm,
The lower limit is set to 1/16 Bm to 8/16 Bm (as will be described in detail later, it is changed between intra-frame coded images I that are reference images), and simulation is performed. The buffer amount is decreased by the decoding and reproduction of the picture, and is increased by a certain amount for the code transmission of the unit picture time (a constant code amount according to the transmission rate) (therefore, the slope of the increase is constant).

In the buffer simulation circuit 58,
A buffer simulation is executed for the current picture to be quantized based on the data of a frame type register 58a, a code amount conversion register 58b, a picture memory 58c, a picture default memory 58d, and a balance register 61, which will be described later. To be done. The frame type register 58a stores in advance the appearance positions (I,
B, B, P, B, B, P, B, B, I, ...) stored in ROM
Is. The buffer simulation circuit 58 grasps the future frame type for the current picture based on the information from the frame type register 58a. The code amount conversion register 58b is a ROM in which a statistical average value of code amount changes when the quantization step is changed is stored in advance. Buffer simulation circuit 5
The code amount conversion register 58b grasps how much the code amount increases or decreases when the quantization step of the picture is increased or decreased.

In the picture memory 58c, the coding information of the past frame type which is closest in time, that is, the quantization step and the coding amount of the latest quantized picture type are rewritten and stored as needed. RAM. This encoded information is the information sent from the quantization circuit 53 and the counter 57 at any time. The buffer simulation circuit 58 performs a simulation based on the quantization step and the code amount of the recent quantized picture type. The picture default memory 58d is a ROM in which the quantization step and the code amount, which are statistical average values for each frame type, are stored in advance. Buffer simulation circuit 5
When a scene change occurs, reference numeral 8 discards the quantization step and the code amount of the latest picture type stored in the picture memory 58c, and simulates the quantization step and the code amount which are statistical average values. do.

In addition, the balance register 61 balances a plurality of quantization steps according to each picture (frame field) type of a prediction structure between different pictures (frame fields), for example, weighting as shown in Table 1. This is a ROM in which a plurality of ideal quantization step balances (rates, ratios) for the intra-frame coded image I, the unidirectional predictive coded image P, and the bidirectional predictive coded image B are set. As for the quantization step balance, the quantization step of the P image is larger than that of the I image and the B image is larger than that of the P image. In addition, the smaller the type number shown in Table 1, the lower the weight of the P and B images, which corresponds to a relatively still image, and the larger the type number, the higher the weight of the P and B images, and the relatively moving image. It corresponds to an image. Basic encoding is performed so as to satisfy this quantization step balance.

[0026]

[Table 1]

In FIG. 2, I, P, and B are the types of frame types (intra-frame coded image I, unidirectional interframe predictive coded image P, bidirectional interframe predictive coded image B), as described above. Shows. Here, it is assumed that the image 36, which is B, for example, is the current picture that is currently the target of quantization. In this case, the same image 3 in the next iteration
Up to 7 (between one group), the buffer movement is simulated in the future direction. At this time, the current picture 36
On the other hand, the latest frame type in the past, that is, the quantization step and the code amount of the most recent picture that has already been quantized, specifically, the quantization Qb step and the code amount Lb of the image 39 as the B picture. , P as the quantization step Qp of the image 40 and the code amount Lp, and as the I picture the quantization step Qi and the code amount Li of the image 38, the simulation of each frame type is performed.

These quantization steps Qb, Qp, Q
i and code amounts Lb, Lp, and Li are stored in the picture memory 58c described above. If there is a large change in the input image (for example, when there is a scene change), the past picture information stored in the picture memory 58c is meaningless, so the statistical average stored in the picture default memory 58e is used. The values quantization step and code amount are used. The output from the scene change detection circuit 62 is used to detect the scene change.

This simulation is executed by selecting from the code amount allocation of I, P and B set in the balance register 61 (code amount allocation based on the step balance of 0 to 3 shown in Table 1). To be done. That is, for example, in step balance (type number shown in Table 1) 0, the quantization step is I: P: B = 1: 1.5: 2.5, and the quantization step Q described above is satisfied so as to satisfy this relationship.
Qp0 and Qb0 are obtained based on i. Then, based on the ratio between Qp and Qp0 and the ratio between Qb and Qb0, the code amount Lp,
The code amounts Lp0 and Lb0 are estimated based on Lb. The code amount change when the quantization step is changed is stored in the code amount conversion register 58b described above.

Based on the above results, a simulation with a step balance of 0 is performed and quantization steps Qi and Qp are performed.
Based on 0, Qb0 and code amounts Li, Lp0, Lb0, B, B, P, B, B, P, which are pictures for one grape in the future direction.
B, B, I, B buffer simulation is performed. This simulation is executed for all combinations of code amount allocation based on the step balance of 0 to 3 shown in Table 1, and the execution result (the amount of the simulation result at each step balance exceeding the upper limit value / lower limit value set, That is, the sum of the absolute values of overflow and underflow)
Are supplied to the quantization step determination circuit 59 at the next stage.

FIG. 2 exemplifies a state in which the code amount is I: P: B = 6: 3: 1. In this method, the buffer simulation circuit 58 grasps the appearance position (I, B, B, P, B, B, P, B, B, I, ... Repeat) of each frame type of the inter-frame prediction structure in advance. Therefore, such a simulation is feasible. Therefore, since the quantization step balance is decided based on the simulation result, it is possible to make effective use of the buffer of the decoder for coding, and it is possible to ideally weight each frame type and improve the image quality. Will be done.

Furthermore, since the position where the intra-frame coded image I type appears can be determined in advance, the lower limit value is increased so that the buffer amount increases up to half of Bm (8 / 16Bm) before the I picture, for example. You may make it control. That is, the lower limit is not made constant like the lower limit I shown in the figure, but is increased as the type I appears like the lower limit II. By doing so, even when the code amount of the intra-frame coded image I type is large, it is possible to prevent the breakdown due to the underflow of the buffer. In this way, underflow and overflow when a frame type with a large code amount occurs in the inter-picture (frame or field) prediction structure is as described above before the picture (frame or field) type appears.
The code amount is controlled so that the state of the data amount set in advance can be ensured, and as a result, the buffer is accurately controlled while ideally weighting each picture (frame or field) type.

Next, the quantization step balance determination circuit 5
9 will be described. The quantization step balance determination circuit 59 selects the optimum one from the plurality of simulation results from the buffer simulation circuit 58, and further considers the content of the data of the input image (the amount of movement of the image) to perform the quantization step. Is a means for making a final decision. The determined quantization step is sent to the quantization circuit 53, and the current picture is quantized. The quantizing step balance determining circuit 59 selects a balance setting value having the smallest total sum of absolute values of overflow / underflow as a result of performing simulation with several balance setting values in the buffer simulation circuit 58.

Further, the quantizing step balance determining circuit 59 uses the motion amount calculated by the motion amount calculating circuit 60 to set a threshold value for the motion amount in advance (this threshold is the above-mentioned scene change detecting circuit 62). If it is larger than the threshold value of, the balance setting value is
By increasing the rank (that is, by decreasing the type number shown in Table 1), the unidirectional predictive coded image P and the bidirectional predictive coded image are reset (determined) in the direction of lower weight.
To do. As a result, when the motion is vigorous, the quantization step is corrected to a lower direction for the inter-frame coded image. This is when the movement is relatively heavy,
When it becomes a motion area that human eyes cannot catch up with, it is better to place importance on the intra-frame coded image I as the reference image rather than the inter-frame coded images (predictive coded images P and B). This is because the SN ratio is improved.

As described above, the quantization step balance is determined by weighting as shown in Table 1 and stored in the balance register 61. The optimum encoding is always selected from the balance register 61, the quantization step in the quantization circuit 53 is determined while maintaining this balance, and the entire quantization step is controlled. Therefore, as compared with the conventional method in which the quantization step is individually determined for each picture of each frame type, the quantization step of a specific picture is not increased and the image quality is not significantly deteriorated.
Therefore, even if prediction matching is performed between pictures, the deterioration of image quality does not continue. In this example,
Although the quantization step balance was determined based on the buffer simulation result, the optimal quantization step balance was discarded based on the contents of the input image (for example, the amount of motion) and the final compressed data amount from the counter 57. You may decide.

The quantized data is input to the first encoding circuit 54, encoded, and then input to the mixer 56. Second
The encoding circuit 55 encodes the motion vector output from the motion detection circuit 49 and the selection mode information output from the motion compensation circuit 48, and outputs the encoded motion vector to the mixer 56. The mixer 56 mixes the data output from the encoding circuits 54 and 55 and outputs a counter 57.
Output to. The counter 57 counts the generated code amount and outputs the information to the buffer simulation circuit 58 described above. The encoded data is output to a circuit (not shown) via the counter.

[0037]

As described in detail above, according to the data compression control apparatus of the present invention, the decoder buffer can be used effectively and the coding can be performed effectively, and it is ideal for each picture (frame or field) type. Can be weighted. Therefore, it is possible to perform high-efficiency encoding with a stable and high-quality image even when the movement of the image changes.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a data compression controller according to the present invention.

FIG. 2 is an explanatory diagram of buffer amount control of the data compression control device.

FIG. 3 is a picture (frame) of a data compression controller.
It is explanatory drawing of a prediction architecture.

FIG. 4 is a configuration diagram showing a conventional data compression control device.

FIG. 5 is a diagram showing a relationship diagram between a virtual buffer and a quantization step used in a conventional data compression control device.

[Explanation of symbols]

 53 quantization circuit 58 buffer simulation circuit 58a frame type register 58b code amount conversion register 58c picture memory 58d picture default memory 59 quantization step balance determination circuit 60 motion amount calculation circuit 61 balance register 62 scene change detection circuit

Claims (4)

[Claims] 1. A data compression apparatus for high-efficiency coding an input image by combining intra-picture coding and inter-picture coding, and the appearance position of each picture type of a preset inter-picture prediction structure. And a coding amount and a coding amount in the past to predict a state of a compressed data amount in the future in terms of time, and perform coding control. 2. A data compression apparatus for highly efficient encoding an input image by combining intra-picture encoding and inter-picture encoding, wherein a plurality of quantum data are provided according to each picture type of different inter-picture prediction structures. Prediction of the state of the future compressed data amount temporally from the means with the encoding step balance set, the appearance position of each picture type of the preset inter-picture prediction structure, the past encoding state and the amount of code. And a means for selecting the plurality of set quantization step balances based on the result of the prediction. 3. A means for determining whether or not a scene change has occurred in an input image, and when a scene change has occurred, not a past coding state and code amount but a preset average coding state. 3. The data compression apparatus according to claim 1, wherein the state of the future compressed data amount is predicted from the time and the code amount. 4. A data compression apparatus for highly efficient coding an input image by combining intra-picture coding and inter-picture coding, wherein a plurality of quanta corresponding to each picture type of different inter-picture prediction structures are used. Data having means for setting a quantization step balance and means for selecting a plurality of quantization step balances set based on an input image and an output compressed data amount. Compressor.