JPH05218025A - Method of manufacturing semiconductor device - Google Patents
Method of manufacturing semiconductor deviceInfo
- Publication number
- JPH05218025A JPH05218025A JP1960992A JP1960992A JPH05218025A JP H05218025 A JPH05218025 A JP H05218025A JP 1960992 A JP1960992 A JP 1960992A JP 1960992 A JP1960992 A JP 1960992A JP H05218025 A JPH05218025 A JP H05218025A
- Authority
- JP
- Japan
- Prior art keywords
- film
- mask
- anodic oxide
- oxide film
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 239000010407 anodic oxide Substances 0.000 claims abstract description 80
- 238000005530 etching Methods 0.000 claims abstract description 61
- 238000000034 method Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 238000007665 sagging Methods 0.000 claims abstract description 11
- 238000007743 anodising Methods 0.000 claims abstract description 9
- 238000010438 heat treatment Methods 0.000 claims abstract description 7
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 42
- 229910016570 AlCu Inorganic materials 0.000 description 32
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 16
- 239000007788 liquid Substances 0.000 description 13
- 239000011259 mixed solution Substances 0.000 description 10
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 8
- 239000000243 solution Substances 0.000 description 8
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 7
- LDDQLRUQCUTJBB-UHFFFAOYSA-O azanium;hydrofluoride Chemical compound [NH4+].F LDDQLRUQCUTJBB-UHFFFAOYSA-O 0.000 description 7
- 229910017604 nitric acid Inorganic materials 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
(57)【要約】
【目的】 半導体装置の製造方法に係り,特に,陽極酸
化膜を有する配線の形成方法に関し,陽極酸化膜が庇と
ならない配線の形成方法を目的とする。
【構成】 半導体基体1上の絶縁膜2上に導電膜3を形
成した後表面を陽極酸化して陽極酸化膜4を形成する工
程と,陽極酸化膜4上に形成されたマスク5をマスクに
して陽極酸化膜4を選択的にエッチングして除去する工
程と,加熱によりマスク5の端部を流動させて陽極酸化
膜4の側面を覆うだれたマスク5aを形成した後,だれた
マスク5aをマスクにして導電膜3を等方的にエッチング
し,陽極酸化膜4を露出させずに導電膜3を除去する工
程とを有し,上面が陽極酸化膜4で覆われた導電膜の配
線3cを形成するように構成する。
(57) [Abstract] [Object] A method for manufacturing a semiconductor device, and more particularly, a method for forming a wiring having an anodic oxide film, and an object thereof is a method for forming a wiring in which the anodic oxide film does not overhang. A process of forming a conductive film 3 on an insulating film 2 on a semiconductor substrate 1 and then anodizing the surface to form an anodized film 4, and using a mask 5 formed on the anodized film 4 as a mask. And selectively removing the anodic oxide film 4 by etching, and by heating the end portions of the mask 5 to flow to form the sagging mask 5a that covers the side surfaces of the anodizing film 4, the sagging mask 5a is removed. A step of isotropically etching the conductive film 3 using the mask and removing the conductive film 3 without exposing the anodic oxide film 4, and the conductive film wiring 3c whose upper surface is covered with the anodic oxide film 4 Are formed.
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体装置の製造方法に
係り,特に,陽極酸化膜を有する配線の形成方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a wiring having an anodic oxide film.
【0002】現在,半導体装置に多層配線が多く用いら
れている。多層配線では,配線に突起(hillock)の発生
することを防止しかつ配線の使用寿命を向上する目的で
表面に陽極酸化膜を形成することが行われている。At present, multilayer wiring is widely used in semiconductor devices. In multi-layered wiring, an anodic oxide film is formed on the surface for the purpose of preventing hillocks from occurring in the wiring and improving the service life of the wiring.
【0003】[0003]
【従来の技術】図5(a) 〜(e) は陽極酸化膜を有する配
線形成の従来例を示す工程順断面図であり,以下,これ
らの図を参照しながら従来例について説明する。2. Description of the Related Art FIGS. 5A to 5E are sectional views in order of steps showing a conventional example of forming a wiring having an anodic oxide film, and the conventional example will be described below with reference to these drawings.
【0004】図5(a) 参照 1は素子形成を終えたSi基体であり,その上に絶縁膜
としてSiO2 膜2を形成し,その上にAlCu膜3を
堆積する。AlCu膜3の表面を陽極酸化して,厚さが
500Å程度の陽極酸化膜4を形成する。Referring to FIG. 5 (a), reference numeral 1 is a Si substrate on which elements have been formed, on which a SiO 2 film 2 is formed as an insulating film, and an AlCu film 3 is deposited thereon. By anodizing the surface of the AlCu film 3,
An anodic oxide film 4 of about 500 Å is formed.
【0005】図5(b) 参照 陽極酸化膜4上に配線形成のためのレジストマスク5を
形成する。 図5(c) 参照 レジストマスク5をマスクにして陽極酸化膜4をエッチ
ングして除去する。エッチング液は,例えば酢酸とフッ
化水素アンモニウムの混合液である。Referring to FIG. 5B, a resist mask 5 for forming wiring is formed on the anodic oxide film 4. See FIG. 5C. The anodic oxide film 4 is etched and removed using the resist mask 5 as a mask. The etching solution is, for example, a mixed solution of acetic acid and ammonium hydrogen fluoride.
【0006】図5(d) 参照 レジストマスク5と陽極酸化膜4をマスクにしてAlC
u膜3をエッチングして除去し,配線3aを形成する。エ
ッチング液は,例えば燐酸である。See FIG. 5 (d). AlC using the resist mask 5 and the anodic oxide film 4 as a mask.
The u film 3 is removed by etching to form the wiring 3a. The etching solution is phosphoric acid, for example.
【0007】図5(e) 参照 レジストマスク5を剥離する。このようにして表面に陽
極酸化膜4を有する配線を形成するが,陽極酸化膜4に
はAlCu膜3のサイドエッチングにより庇4aが発生す
る。庇4aが発生すると,それに起因する種々の問題が発
生する。Referring to FIG. 5 (e), the resist mask 5 is peeled off. In this way, the wiring having the anodic oxide film 4 on the surface is formed, but the eaves 4a are generated in the anodic oxide film 4 by the side etching of the AlCu film 3. When the eaves 4a occurs, various problems caused by it occur.
【0008】図6(a), (b)は従来例の問題点を説明する
ための断面図である。6は層間絶縁膜で,例えばPSG
膜,7は上層配線で,例えばAlCu膜である。陽極酸
化膜4に庇4aがあると,その上に形成する層間絶縁膜,
例えばPSG膜6が異常成長する(図6(a) 参照)。6 (a) and 6 (b) are sectional views for explaining the problems of the conventional example. 6 is an interlayer insulating film, for example PSG
A film 7 is an upper layer wiring, for example, an AlCu film. If the anodic oxide film 4 has an eaves 4a, an interlayer insulating film formed thereon,
For example, the PSG film 6 grows abnormally (see FIG. 6 (a)).
【0009】PSG膜6が異常成長すると,その上に形
成する上層配線,例えばAlCu膜7はカバレッジ不良
となり,庇4aの周囲でクラック7aが生じ,接続不良とな
ることがある(図6(b) 参照)。When the PSG film 6 grows abnormally, the upper wiring formed on the PSG film 6, for example, the AlCu film 7, may have poor coverage, and cracks 7a may occur around the eaves 4a, resulting in poor connection (FIG. 6 (b). )).
【0010】また,陽極酸化膜4に庇4aがあると,その
部分が剥がれて不定形状となり,その上に成長する層間
絶縁膜に異常成長が生じやすい。Further, if the anodic oxide film 4 has the eaves 4a, that portion is peeled off to have an indefinite shape, and abnormal growth easily occurs in the interlayer insulating film grown thereon.
【0011】[0011]
【発明が解決しようとする課題】本発明は上記の問題に
鑑み,配線上の陽極酸化膜に庇が生じないような配線形
成方法を提供することを目的とする。SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a wiring forming method in which an eaves on the anodic oxide film on the wiring is not formed.
【0012】[0012]
【課題を解決するための手段】図1(a) 〜(e) は第1の
実施例を示す工程順断面図,図2(a) 〜(i) は第2の実
施例を示す工程順断面図,図3(a) 〜(f) は第3の実施
例を示す工程順断面図である。1 (a) to 1 (e) are process sectional views showing a first embodiment, and FIGS. 2 (a) to 2 (i) are process steps showing a second embodiment. Sectional views and FIGS. 3A to 3F are sectional views in order of steps showing a third embodiment.
【0013】上記課題は,半導体基体1上の絶縁膜2上
に導電膜3を形成した後表面を陽極酸化して陽極酸化膜
4を形成する工程と,該陽極酸化膜4上に形成されたマ
スク5をマスクにして該陽極酸化膜4を選択的にエッチ
ングして除去する工程と,該マスク5をマスクにして該
導電膜3を等方的にエッチングして除去し,次いで,サ
イドエッチングにより露出した陽極酸化膜4の部分をエ
ッチングして除去する工程とを有し,上面が陽極酸化膜
4で覆われた導電膜の配線3aを形成する半導体装置の製
造方法によって解決される。The above-mentioned problems are formed by forming the conductive film 3 on the insulating film 2 on the semiconductor substrate 1 and then anodizing the surface to form the anodic oxide film 4, and forming the anodic oxide film 4 on the surface. A step of selectively etching and removing the anodic oxide film 4 using the mask 5 as a mask; and an isotropic etching and removing the conductive film 3 using the mask 5 as a mask, and then performing side etching. The exposed anodic oxide film 4 is removed by etching, and the problem is solved by a method for manufacturing a semiconductor device in which a conductive film wiring 3a whose upper surface is covered with the anodic oxide film 4 is formed.
【0014】また,半導体基体1上の絶縁膜2上に導電
膜3を形成した後表面を陽極酸化して陽極酸化膜4を形
成する工程と,該陽極酸化膜4上に形成されたマスク5
をマスクにして該陽極酸化膜4を選択的にエッチングし
て除去する工程と,加熱により該マスク5の端部を流動
させて該陽極酸化膜4の側面を覆うだれたマスク5aを形
成した後,該だれたマスク5aをマスクにして該導電膜3
を等方的にエッチングし,該陽極酸化膜4を露出させず
に該導電膜3を除去する工程とを有し,上面が陽極酸化
膜4で覆われた導電膜の配線3cを形成する半導体装置の
製造方法によって解決される。Further, a step of forming a conductive film 3 on the insulating film 2 on the semiconductor substrate 1 and thereafter anodizing the surface to form an anodized film 4, and a mask 5 formed on the anodized film 4.
A step of selectively etching and removing the anodic oxide film 4 by using the mask as a mask, and after forming a sloping mask 5a covering the side surface of the anodic oxide film 4 by flowing the end portion of the mask 5 by heating. , The conductive film 3 using the sagging mask 5a as a mask
Isotropically etched to remove the conductive film 3 without exposing the anodic oxide film 4, and a wiring 3c of a conductive film whose upper surface is covered with the anodic oxide film 4 is formed. This is solved by the method of manufacturing the device.
【0015】また,半導体基体1上の絶縁膜2上に導電
膜3を形成した後表面を陽極酸化して陽極酸化膜4を形
成する工程と,該陽極酸化膜4上に形成されたマスク5
をマスクにして該陽極酸化膜4を選択的にエッチングし
て除去する工程と,加熱により該マスク5の端部を流動
させて該陽極酸化膜4の側面を覆うだれたマスク5aを形
成した後,該だれたマスク5aをマスクにして該導電膜3
を等方的にエッチングして除去し,次いで,サイドエッ
チングにより露出した陽極酸化膜4の部分をエッチング
して除去する工程とを有し,上面が陽極酸化膜4で覆わ
れた導電膜の配線3fを形成する半導体装置の製造方法に
よって解決される。Further, a step of forming a conductive film 3 on the insulating film 2 on the semiconductor substrate 1 and then anodizing the surface to form an anodized film 4, and a mask 5 formed on the anodized film 4.
A step of selectively etching and removing the anodic oxide film 4 by using the mask as a mask, and after forming a sloping mask 5a covering the side surface of the anodic oxide film 4 by flowing the end portion of the mask 5 by heating. , The conductive film 3 using the sagging mask 5a as a mask
Of the conductive film whose upper surface is covered with the anodic oxide film 4 is removed by isotropically etching and then removing the part of the anodic oxide film 4 exposed by side etching. This is solved by a method for manufacturing a semiconductor device forming 3f.
【0016】[0016]
【作用】導電膜3のエッチングの際,サイドエッチング
により露出した陽極酸化膜4の部分をそのまま残して置
くと,将来配線上に陽極酸化膜の庇が生じるが,本発明
では,その部分をエッチングして除去する工程を有する
から,将来配線上に陽極酸化膜の庇の生じることがな
い。When the conductive film 3 is etched, if the portion of the anodic oxide film 4 exposed by side etching is left as it is, an eave of the anodic oxide film will occur on the wiring in the future, but in the present invention, that portion is etched. Since there is a step of removing the anodic oxide film, the eaves of the anodized film will not be formed on the wiring in the future.
【0017】また,加熱によりマスク5の端部を流動さ
せて陽極酸化膜4の側面を覆うだれたマスク5aを形成し
ているから,導電膜3のサイドエッチングがあっても,
陽極酸化膜4を露出させないようにすることができる。
サイドエッチングが進んで陽極酸化膜4が露出しそうに
なったら,エッチングを中止し,再び加熱によりだれた
マスク5aの端部を流動させて陽極酸化膜4の側面を覆う
厚さを大きくし,その後導電膜3のエッチングを続ける
ようにすればよい。このようにして導電膜3のエッチン
グをすれば,配線上に陽極酸化膜の庇の生じることがな
い。Further, since the end portion of the mask 5 is made to flow by heating to form the sagging mask 5a covering the side surface of the anodic oxide film 4, even if the conductive film 3 is side-etched,
It is possible to prevent the anodic oxide film 4 from being exposed.
When the side etching progresses and the anodic oxide film 4 is about to be exposed, the etching is stopped, and the end portion of the mask 5a that is dripping is made to flow again by heating to increase the thickness of covering the side surface of the anodic oxide film 4. The etching of the conductive film 3 may be continued. By etching the conductive film 3 in this manner, the eaves of the anodic oxide film is not formed on the wiring.
【0018】また,サイドエッチングが進んで陽極酸化
膜4が露出したとしても,露出した陽極酸化膜の部分を
エッチングして除去する工程を有するから,配線上に陽
極酸化膜の庇の生じることがない。Further, even if the side etching progresses and the anodic oxide film 4 is exposed, there is a step of etching and removing the exposed part of the anodic oxide film, so that the eaves of the anodic oxide film may be formed on the wiring. Absent.
【0019】[0019]
【実施例】図1(a) 〜(e) は第1の実施例を示す工程順
断面図である。以下,これらの図を参照しながら第1の
実施例について説明する。Embodiments FIGS. 1A to 1E are sectional views in order of steps showing a first embodiment. The first embodiment will be described below with reference to these drawings.
【0020】図1(a) 参照 1は素子形成を終えたSi基体であり,その上に絶縁膜
として厚さが,例えば4000ÅのSiO2 膜2を形成し,
その上に導電膜として,厚さが例えば 1.1μmのAlC
u膜3を堆積する。AlCu膜3の表面を陽極酸化し
て,厚さが 500Å程度の陽極酸化膜4を形成する。Referring to FIG. 1 (a), 1 is a Si substrate on which elements have been formed, on which a SiO 2 film 2 having a thickness of, for example, 4000 Å is formed as an insulating film,
On top of that, as a conductive film, for example, AlC with a thickness of 1.1 μm
The u film 3 is deposited. The surface of the AlCu film 3 is anodized to form an anodized film 4 having a thickness of about 500Å.
【0021】図1(b) 参照 陽極酸化膜4上に配線形成のためのレジストマスク5を
形成する。レジストマスク5をマスクにして陽極酸化膜
4をエッチングして除去する。エッチング液は,例えば
酢酸とフッ化水素アンモニウムの混合液である。Referring to FIG. 1B, a resist mask 5 for forming wiring is formed on the anodic oxide film 4. The anodic oxide film 4 is etched and removed using the resist mask 5 as a mask. The etching solution is, for example, a mixed solution of acetic acid and ammonium hydrogen fluoride.
【0022】図1(c) 参照 レジストマスク5と陽極酸化膜4をマスクにしてAlC
u膜3をエッチングして除去し,配線3aを形成する。エ
ッチングは,例えば燐酸と酢酸と硝酸の混合液を用い,
50℃でエッチングする。この時,AlCu膜3のサイ
ドエッチングにより,陽極酸化膜4に庇4aが発生する。Referring to FIG. 1 (c), using the resist mask 5 and the anodic oxide film 4 as a mask, AlC
The u film 3 is removed by etching to form the wiring 3a. For etching, for example, using a mixed solution of phosphoric acid, acetic acid, and nitric acid,
Etch at 50 ° C. At this time, due to the side etching of the AlCu film 3, the eaves 4a is generated on the anodic oxide film 4.
【0023】図1(d) 参照 CF4 ガスにより庇4aを等方的にドライエッチングして
除去する。ドライエッチングに替えて,酢酸とフッ化水
素アンモニウムの混合液によるウエットエッチングを採
用してもよい。Referring to FIG. 1D, the eaves 4a is isotropically dry-etched with CF 4 gas and removed. Instead of dry etching, wet etching using a mixed solution of acetic acid and ammonium hydrogen fluoride may be adopted.
【0024】図1(e) 参照 レジストマスク5を剥離する。このようにして,陽極酸
化膜4に覆われ,陽極酸化膜の庇のない配線3aが形成さ
れた。Referring to FIG. 1E, the resist mask 5 is peeled off. In this way, the wiring 3a covered with the anodic oxide film 4 and having no eaves of the anodic oxide film was formed.
【0025】図2(a) 〜(i) は第2の実施例を示す工程
順断面図である。以下,これらの図を参照しながら第2
の実施例について説明する。 図2(a) 参照 1は素子形成を終えたSi基体であり,その上に絶縁膜
として厚さが,例えば4000ÅのSiO2 膜2を形成し,
その上に導電膜として,厚さが例えば 1.1μmのAlC
u膜3を堆積する。AlCu膜3の表面を陽極酸化し
て,厚さが 500Å程度の陽極酸化膜4を形成する。FIGS. 2A to 2I are sectional views in order of the processes, showing the second embodiment. Below, with reference to these figures, the second
An example will be described. Refer to FIG. 2 (a). 1 is a Si substrate on which element formation has been completed, on which a SiO 2 film 2 having a thickness of, for example, 4000 Å is formed as an insulating film,
On top of that, as a conductive film, for example, AlC with a thickness of 1.1 μm
The u film 3 is deposited. The surface of the AlCu film 3 is anodized to form an anodized film 4 having a thickness of about 500Å.
【0026】図2(b) 参照 陽極酸化膜4上に配線形成のためのレジストマスク5を
形成する。レジストマスク5をマスクにして陽極酸化膜
4をエッチングして除去する。エッチング液は,例えば
酢酸とフッ化水素アンモニウムの混合液である。Referring to FIG. 2B, a resist mask 5 for forming wiring is formed on the anodic oxide film 4. The anodic oxide film 4 is etched and removed using the resist mask 5 as a mask. The etching solution is, for example, a mixed solution of acetic acid and ammonium hydrogen fluoride.
【0027】ここまでは第1の実施例と同じである。 図2(c) 参照 175 ℃で20分間ベーキングを行い,レジストマスク5
の端部を流動させ,だれたレジストマスク5aを形成す
る。その後AlCu膜3の表面を30秒間酸素プラズマ
でたたいて親水性を上げる。The process up to this point is the same as in the first embodiment. See Fig. 2 (c). Bake at 175 ° C for 20 minutes and apply resist mask 5
The edge portion of is flowed to form a sagging resist mask 5a. After that, the surface of the AlCu film 3 is hit with oxygen plasma for 30 seconds to increase hydrophilicity.
【0028】図2(d) 参照 だれたマスク5aをマスクにしてAlCu膜3をエッチン
グする。エッチング液は例えば燐酸と酢酸と硝酸の混合
液であり,液温50℃,エッチング時間は30秒とす
る。3bはエッチングされた後のAlCu膜を表し,Al
Cu膜のサイドエッチングにより,陽極酸化膜4が露出
する前にエッチングを中断する。Referring to FIG. 2D, the AlCu film 3 is etched using the mask 5a as a mask. The etching liquid is, for example, a mixed liquid of phosphoric acid, acetic acid, and nitric acid, and the liquid temperature is 50 ° C. and the etching time is 30 seconds. 3b represents the AlCu film after etching,
Due to the side etching of the Cu film, the etching is interrupted before the anodic oxide film 4 is exposed.
【0029】図2(e) 参照 再び175 ℃で20分間ベーキングを行い,だれたマスク
5aの端部をさらに流動させ,だれたレジストマスク5bを
形成する。その後AlCu膜3の表面を30秒間酸素プ
ラズマでたたいて親水性を上げる。See FIG. 2 (e). Baking again at 175 ° C. for 20 minutes to remove the mask
The edge of 5a is further flowed to form a sagged resist mask 5b. After that, the surface of the AlCu film 3 is hit with oxygen plasma for 30 seconds to increase hydrophilicity.
【0030】図2(f) 参照 だれたマスク5bをマスクにしてAlCu膜3bをエッチン
グする。エッチング液は例えば燐酸と酢酸と硝酸の混合
液であり,液温50℃,エッチング時間は9 0秒とす
る。AlCu膜のサイドエッチングにより陽極酸化膜4
が露出する前に,配線形成のエッチングはほぼ完了す
る。3cはエッチングされた後のAlCu膜で配線を表
す。ところが,SiO2 膜2上にAlCu膜の残渣3dが
生じる。Referring to FIG. 2F, the AlCu film 3b is etched using the mask 5b as a mask. The etching solution is, for example, a mixed solution of phosphoric acid, acetic acid and nitric acid, and the solution temperature is 50 ° C. and the etching time is 90 seconds. Anodic oxide film 4 by side etching of AlCu film
Before the wiring is exposed, the etching for forming the wiring is almost completed. 3c is an AlCu film after etching, which represents wiring. However, the residue 3d of the AlCu film is generated on the SiO 2 film 2.
【0031】図2(g) 参照 三たび175 ℃で20分間ベーキングを行い,だれたマス
ク5bの端部をさらに流動させ,だれたレジストマスク5c
を形成する。その後AlCu膜3の表面を30秒間酸素
プラズマでたたいて親水性を上げる。Referring to FIG. 2 (g), baking was carried out for 20 minutes at 175 ° C. three times to further flow the edge of the dripping mask 5b, and the dripping resist mask 5c.
To form. After that, the surface of the AlCu film 3 is hit with oxygen plasma for 30 seconds to increase hydrophilicity.
【0032】図2(h) 参照 だれたマスク5cをマスクにしてAlCu膜の残渣3dをエ
ッチングして除去する。エッチング液は例えば燐酸と酢
酸と硝酸の混合液であり,液温50℃,エッチング時間
は15秒とする。Referring to FIG. 2H, the residue 3d of the AlCu film is removed by etching using the mask 5c as a mask. The etching liquid is, for example, a mixed liquid of phosphoric acid, acetic acid, and nitric acid, and the liquid temperature is 50 ° C. and the etching time is 15 seconds.
【0033】図2(i) 参照 だれたマスク5cを剥離する。このようにして,陽極酸化
膜4に覆われ,陽極酸化膜の庇のない配線3cが形成され
た。Referring to FIG. 2 (i), the mask 5c is removed. In this way, the wiring 3c covered with the anodic oxide film 4 and having no eaves of the anodic oxide film was formed.
【0034】図3(a) 〜(f) は第3の実施例を示す工程
順断面図である。以下,これらの図を参照しながら第3
の実施例について説明する。 図3(a) 参照 1は素子形成を終えたSi基体であり,その上に絶縁膜
として厚さが,例えば4000ÅのSiO2 膜2を形成し,
その上に導電膜として,厚さが例えば 1.1μmのAlC
u膜3を堆積する。AlCu膜3の表面を陽極酸化し
て,厚さが 500Å程度の陽極酸化膜4を形成する。3A to 3F are sectional views in order of the processes, showing the third embodiment. Below, referring to these figures,
An example will be described. Refer to FIG. 3 (a). Reference numeral 1 is a Si substrate on which element formation has been completed, on which a SiO 2 film 2 having a thickness of, for example, 4000 Å is formed as an insulating film.
On top of that, as a conductive film, for example, AlC with a thickness of 1.1 μm
The u film 3 is deposited. The surface of the AlCu film 3 is anodized to form an anodized film 4 having a thickness of about 500Å.
【0035】図3(b) 参照 陽極酸化膜4上に配線形成のためのレジストマスク5を
形成する。レジストマスク5をマスクにして陽極酸化膜
4をエッチングして除去する。エッチング液は,例えば
酢酸とフッ化水素アンモニウムの混合液である。Referring to FIG. 3B, a resist mask 5 for forming wiring is formed on the anodic oxide film 4. The anodic oxide film 4 is etched and removed using the resist mask 5 as a mask. The etching solution is, for example, a mixed solution of acetic acid and ammonium hydrogen fluoride.
【0036】図3(c) 参照 175 ℃で20分間ベーキングを行い,レジストマスク5
の端部を流動させ,だれたレジストマスク5aを形成す
る。その後AlCu膜3の表面を30秒間酸素プラズマ
でたたいて親水性を上げる。Referring to FIG. 3 (c), baking is performed at 175 ° C. for 20 minutes, and the resist mask 5 is formed.
The edge portion of is flowed to form a sagging resist mask 5a. After that, the surface of the AlCu film 3 is hit with oxygen plasma for 30 seconds to increase hydrophilicity.
【0037】ここまでは第2の実施例と同じである。 図3(d) 参照 だれたマスク5aをマスクにしてAlCu膜3をエッチン
グして除去し,配線3eを形成する。エッチング液は,例
えば燐酸と酢酸と硝酸の混合液であり,液温は50℃,
エッチング時間は 145秒とする。AlCu膜3は除去さ
れて残渣も生じない。しかし,サイドエッチングはだれ
たマスク5aが陽極酸化膜4の側面を覆う厚さよりも大き
く進み,陽極酸化膜4が一部露出して庇4aを形成する。The process up to this point is the same as in the second embodiment. Referring to FIG. 3 (d), the AlCu film 3 is etched and removed using the mask 5a as a mask to form the wiring 3e. The etching liquid is, for example, a mixed liquid of phosphoric acid, acetic acid, and nitric acid, and the liquid temperature is 50 ° C.
The etching time is 145 seconds. The AlCu film 3 is removed and no residue is generated. However, the side etching progresses more than the thickness of the mask 5a, which covers the side surface of the anodic oxide film 4, so that the anodic oxide film 4 is partially exposed to form the eaves 4a.
【0038】図3(e) 参照 CF4 ガスにより庇4aを等方的にドライエッチングして
除去する。ドライエッチングに替えて,酢酸とフッ化水
素アンモニウムの混合液によるウエットエッチングを採
用してもよい。Referring to FIG. 3E, the eaves 4a is isotropically dry-etched with CF 4 gas to be removed. Instead of dry etching, wet etching using a mixed solution of acetic acid and ammonium hydrogen fluoride may be adopted.
【0039】図3(f) 参照 だれたマスク5aを剥離する。このようにして,陽極酸化
膜4に覆われ,陽極酸化膜の庇のない配線3eが形成され
た。Referring to FIG. 3 (f), the sagging mask 5a is peeled off. In this way, the wiring 3e covered with the anodic oxide film 4 and having no eaves of the anodic oxide film was formed.
【0040】図4(a) 〜(f) は第4の実施例を示す工程
順断面図である。以下,これらの図を参照しながら第3
の実施例について説明する。 図4(a) 参照 この図は図2(c) の再掲であり,ここまでの工程は第2
の実施例と同じであるので,説明を省略する。4A to 4F are sectional views in order of the processes, showing the fourth embodiment. Below, referring to these figures,
An example will be described. See Fig. 4 (a). This figure is a reprint of Fig. 2 (c).
The description is omitted because it is the same as the embodiment described above.
【0041】図4(b) 参照 だれたマスク5aをマスクにしてAlCu膜3をエッチン
グする。3fはエッチング後のAlCu膜を表す。エッチ
ング液は,例えば燐酸と酢酸と硝酸の混合液であり,液
温は50℃,エッチング時間は60秒とする。AlCu
膜3は厚さの約1/2がエッチングされ,サイドエッチ
ングにより陽極酸化膜4の一部が露出し庇4aが形成され
る。Referring to FIG. 4B, the AlCu film 3 is etched using the mask 5a as a mask. 3f represents the AlCu film after etching. The etching solution is, for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, the liquid temperature is 50 ° C., and the etching time is 60 seconds. AlCu
About half of the thickness of the film 3 is etched, and a part of the anodic oxide film 4 is exposed by side etching to form the eaves 4a.
【0042】図4(c) 参照 CF4 ガスにより庇部4aを等方的にドライエッチングし
て除去する。ドライエッチングに替えて,酢酸とフッ化
水素アンモニウムの混合液によるウエットエッチングを
採用してもよい。Referring to FIG. 4 (c), the eaves portion 4a is isotropically dry-etched and removed by CF 4 gas. Instead of dry etching, wet etching using a mixed solution of acetic acid and ammonium hydrogen fluoride may be adopted.
【0043】図4(d) 参照 175 ℃で20分間ベーキングを行い,だれたマスク5aの
端部をさらに流動させ,だれたレジストマスク5bを形成
する。その後AlCu膜3fの表面を30秒間酸素プラズ
マでたたいて親水性を上げる。Referring to FIG. 4 (d), baking is performed at 175 ° C. for 20 minutes to further flow the edge of the dripping mask 5a to form a dripping resist mask 5b. After that, the surface of the AlCu film 3f is hit with oxygen plasma for 30 seconds to increase hydrophilicity.
【0044】図4(e) 参照 だれたマスク5bをマスクにしてAlCu膜3fをエッチン
グする。エッチング液は例えば燐酸と酢酸と硝酸の混合
液であり,液温50℃,エッチング時間は75秒とす
る。3gはこのエッチングにより形成された配線を表す。
AlCu膜のサイドエッチングにより陽極酸化膜4が露
出する前に,配線形成のエッチングは完全に終了する。Referring to FIG. 4E, the AlCu film 3f is etched using the mask 5b as a mask. The etching liquid is, for example, a mixed liquid of phosphoric acid, acetic acid, and nitric acid, and the liquid temperature is 50 ° C. and the etching time is 75 seconds. 3g represents the wiring formed by this etching.
Before the anodic oxide film 4 is exposed by the side etching of the AlCu film, the etching for forming the wiring is completed.
【0045】図4(f) 参照 だれたマスク5bを剥離する。このようにして,陽極酸化
膜4に覆われ,陽極酸化膜の庇のない配線3gが形成され
た。Referring to FIG. 4 (f), the sagging mask 5b is peeled off. In this way, the wiring 3g covered with the anodic oxide film 4 and having no eaves of the anodic oxide film was formed.
【0046】[0046]
【発明の効果】以上説明したように,本発明によれば,
配線を覆う陽極酸化膜に庇の生じないようにすることが
できる。その結果,配線上の層間絶縁膜の異常成長がな
くなり,上層配線のカバレッジ不良がなくなる。それに
伴いウエハーの歩留りが向上する。As described above, according to the present invention,
It is possible to prevent the eaves from forming on the anodic oxide film covering the wiring. As a result, the abnormal growth of the interlayer insulating film on the wiring is eliminated, and the coverage failure of the upper wiring is eliminated. Along with this, the yield of wafers is improved.
【0047】また,陽極酸化膜に庇の生じないので陽極
酸化膜の剥がれがなくなる。その結果,配線上の層間絶
縁膜の異常成長がなくなり,上層配線のカバレッジ不良
がなくなる。それに伴いウエハーの歩留りが向上する。Further, since the eaves is not formed on the anodic oxide film, the anodic oxide film is not peeled off. As a result, the abnormal growth of the interlayer insulating film on the wiring is eliminated, and the coverage failure of the upper wiring is eliminated. Along with this, the yield of wafers is improved.
【図1】(a) 〜(e) は第1の実施例を示す工程順断面図
である。1A to 1E are sectional views in order of steps, showing a first embodiment.
【図2】(a) 〜(i) は第2の実施例を示す工程順断面図
である。2A to 2I are sectional views in order of the processes, showing the second embodiment.
【図3】(a) 〜(f) は第3の実施例を示す工程順断面図
である。3A to 3F are cross-sectional views in order of the processes, showing the third embodiment.
【図4】(a) 〜(f) は第4の実施例を示す工程順断面図
である。4A to 4F are cross-sectional views in order of the processes, showing the fourth embodiment.
【図5】(a) 〜(e) は従来例を示す工程順断面図であ
る。5A to 5E are cross-sectional views in order of the processes, showing a conventional example.
【図6】(a), (b)は従来例の問題点を説明するための断
面図である。6 (a) and 6 (b) are cross-sectional views for explaining the problems of the conventional example.
1は半導体基体であってSi基体 2は絶縁膜であってSiO2 膜 3, 3b, 3fは導電膜であってAlCu膜 3a, 3c,3e, 3gは導電膜でありAlCu膜であって配線 3dは残渣であってAlCu膜の残渣 4は陽極酸化膜 4aは庇であって陽極酸化膜の庇 5はマスクであってレジストマスク 5a, 5bはだれたマスク 6は層間絶縁膜であってPSG膜 7は上層配線であってAlCu膜1 is a semiconductor substrate, Si substrate 2 is an insulating film, SiO 2 films 3, 3b, 3f are conductive films, and AlCu films 3a, 3c, 3e, 3g are conductive films and AlCu films are wirings. 3d is a residue, the residue of the AlCu film 4 is an anodized film 4a is an eaves, the eaves of the anodized film 5 is a mask, the resist masks 5a and 5b are sloppy masks 6 is an interlayer insulating film and a PSG film 7 is an upper layer wiring and is an AlCu film
───────────────────────────────────────────────────── フロントページの続き (72)発明者 斉藤 智之 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Tomoyuki Saito 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited
Claims (3)
膜(3) を形成した後表面を陽極酸化して陽極酸化膜(4)
を形成する工程と,該陽極酸化膜(4) 上に形成されたマ
スク(5) をマスクにして該陽極酸化膜(4)を選択的にエ
ッチングして除去する工程と,該マスク(5) をマスクに
して該導電膜(3) を等方的にエッチングして除去し,次
いで,サイドエッチングにより露出した陽極酸化膜(4)
の部分をエッチングして除去する工程とを有し,上面が
陽極酸化膜(4) で覆われた導電膜の配線(3a)を形成する
ことを特徴とする半導体装置の製造方法。1. An anodized film (4) is obtained by forming a conductive film (3) on an insulating film (2) on a semiconductor substrate (1) and then anodizing the surface.
And a step of selectively etching and removing the anodic oxide film (4) using the mask (5) formed on the anodic oxide film (4) as a mask, and the mask (5) Is used as a mask to remove the conductive film (3) isotropically by etching, and then the anodic oxide film (4) exposed by side etching
And a step of removing the portion by etching, and forming a conductive film wiring (3a) whose upper surface is covered with the anodic oxide film (4).
膜(3) を形成した後表面を陽極酸化して陽極酸化膜(4)
を形成する工程と,該陽極酸化膜(4) 上に形成されたマ
スク(5) をマスクにして該陽極酸化膜(4)を選択的にエ
ッチングして除去する工程と,加熱により該マスク(5)
の端部を流動させて該陽極酸化膜(4) の側面を覆うだれ
たマスク(5a)を形成した後,該だれたマスク(5a)をマス
クにして該導電膜(3)を等方的にエッチングし,該陽極
酸化膜(4) を露出させずに該導電膜(3) を除去する工程
とを有し,上面が陽極酸化膜(4) で覆われた導電膜の配
線(3c)を形成することを特徴とする半導体装置の製造方
法。2. An anodized film (4) is formed by forming a conductive film (3) on an insulating film (2) on a semiconductor substrate (1) and then anodizing the surface.
And a step of selectively etching and removing the anodic oxide film (4) by using the mask (5) formed on the anodic oxide film (4) as a mask, and heating the mask ( Five)
After the edge portion of the film is made to flow to form a sloping mask (5a) covering the side surface of the anodic oxide film (4), the conductive film (3) isotropic with the sloping mask (5a) as a mask. And removing the conductive film (3) without exposing the anodic oxide film (4), and the upper surface of the conductive film wiring (3c) is covered with the anodic oxide film (4). A method for manufacturing a semiconductor device, comprising:
膜(3) を形成した後表面を陽極酸化して陽極酸化膜(4)
を形成する工程と,該陽極酸化膜(4) 上に形成されたマ
スク(5) をマスクにして該陽極酸化膜(4)を選択的にエ
ッチングして除去する工程と,加熱により該マスク(5)
の端部を流動させて該陽極酸化膜(4) の側面を覆うだれ
たマスク(5a)を形成した後,該だれたマスク(5a)をマス
クにして該導電膜(3)を等方的にエッチングして除去
し,次いで,サイドエッチングにより露出した陽極酸化
膜(4) の部分をエッチングして除去する工程とを有し,
上面が陽極酸化膜(4) で覆われた導電膜の配線(3e)を形
成することを特徴とする半導体装置の製造方法。3. An anodized film (4) is formed by forming a conductive film (3) on an insulating film (2) on a semiconductor substrate (1) and then anodizing the surface.
And a step of selectively etching and removing the anodic oxide film (4) by using the mask (5) formed on the anodic oxide film (4) as a mask, and heating the mask ( Five)
After the end portion of the film is made to flow to form a sagging mask (5a) that covers the side surface of the anodic oxide film (4), the conductive film (3) isotropic with the sagging mask (5a) as a mask. Etching and removing, and then etching and removing the portion of the anodic oxide film (4) exposed by side etching.
A method of manufacturing a semiconductor device, comprising forming a conductive film wiring (3e) having an upper surface covered with an anodic oxide film (4).
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JP4019609A JP2674406B2 (en) | 1992-02-05 | 1992-02-05 | Method for manufacturing semiconductor device |
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JPH05218025A true JPH05218025A (en) | 1993-08-27 |
JP2674406B2 JP2674406B2 (en) | 1997-11-12 |
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ID=12003937
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6008065A (en) * | 1995-11-21 | 1999-12-28 | Samsung Electronics Co., Ltd. | Method for manufacturing a liquid crystal display |
US6432758B1 (en) * | 2000-08-09 | 2002-08-13 | Huang-Chung Cheng | Recrystallization method of polysilicon film in thin film transistor |
JP2013026388A (en) * | 2011-07-20 | 2013-02-04 | Toyota Motor Corp | Patterning method of conductive film |
JP2021111757A (en) * | 2020-01-15 | 2021-08-02 | 株式会社アルバック | Formation method of metal wiring |
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JPS52136590A (en) * | 1976-05-11 | 1977-11-15 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
JPS55138260A (en) * | 1979-04-13 | 1980-10-28 | Toshiba Corp | Manufacture of semiconductor device |
-
1992
- 1992-02-05 JP JP4019609A patent/JP2674406B2/en not_active Expired - Fee Related
Patent Citations (2)
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JPS52136590A (en) * | 1976-05-11 | 1977-11-15 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
JPS55138260A (en) * | 1979-04-13 | 1980-10-28 | Toshiba Corp | Manufacture of semiconductor device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6008065A (en) * | 1995-11-21 | 1999-12-28 | Samsung Electronics Co., Ltd. | Method for manufacturing a liquid crystal display |
US6331443B1 (en) | 1995-11-21 | 2001-12-18 | Samsung Electronics Co., Ltd. | Method for manufacturing a liquid crystal display |
US6661026B2 (en) | 1995-11-21 | 2003-12-09 | Samsung Electronics Co., Ltd. | Thin film transistor substrate |
USRE41363E1 (en) * | 1995-11-21 | 2010-06-01 | Samsung Electronics Co., Ltd. | Thin film transistor substrate |
US6432758B1 (en) * | 2000-08-09 | 2002-08-13 | Huang-Chung Cheng | Recrystallization method of polysilicon film in thin film transistor |
JP2013026388A (en) * | 2011-07-20 | 2013-02-04 | Toyota Motor Corp | Patterning method of conductive film |
JP2021111757A (en) * | 2020-01-15 | 2021-08-02 | 株式会社アルバック | Formation method of metal wiring |
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JP2674406B2 (en) | 1997-11-12 |
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