JPH05217825A - Method for manufacturing semiconductor substrate - Google Patents

Abstract

(57) [Summary] [Object] An object of the present invention is to produce a thin film single crystal semiconductor layer having excellent crystallinity on a metal substrate at low cost, so that heat dissipation is favorable and an increase in contact resistance is suppressed. Another object of the present invention is to obtain a semiconductor substrate which can prevent crosstalk between wirings and can form a highly efficient and inexpensive solar cell. [Structure] Step (a) of making the silicon substrate 1 porous,
Non-porous silicon single crystal layer 2 on the porous substrate 1
(B) for forming the non-porous silicon single crystal layer 2
Steps (c) and (d) in which the surface of the above is bonded to the substrate 4 having the other metal surface 5 via the insulating layer 3, and the porous silicon layer 1 of the bonded substrate is selectively removed by etching. A method of manufacturing a semiconductor substrate, including the step (e).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate having a metal surface or a method for manufacturing a semiconductor substrate having a thin film single crystal semiconductor layer having excellent crystallinity laminated on the metal substrate.

[0002]

2. Description of the Related Art The formation of a single crystal Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique, and is a bulk S for manufacturing a normal Si integrated circuit.
Much research has been done because devices using SOI technology have numerous advantages that cannot be reached with i-substrates. That is, by using SOI technology, 1. 1. Dielectric isolation is easy and high integration is possible. 2. It has excellent radiation resistance. 3. Stray capacitance is reduced and high speed is possible. 4. The well process can be omitted, Latch-up can be prevented, 6. It is possible to obtain a complete depletion type field effect transistor by thinning the film.

In order to realize the many advantages in device characteristics as described above, a method for forming an SOI structure has been researched for several decades. The contents are summarized in the following documents, for example.

Special Issue: "Sing
le-crystal silicon on non
-Single-crystal insulator
s ″; edited by GW Cullen, J.
individual of Crystal Growth,
volume 63, no 3, pp 429-590
(1983). Also, SOS (silicon on sapphire), which is formed by heteroepitaxially forming Si on a single crystal sapphire substrate by CVD (chemical vapor deposition), has been known for a long time, and it was a success as the most mature SOI technology. However, a large amount of crystal defects due to the lattice mismatch between the Si layer and the underlying sapphire substrate interface, the mixing of aluminum from the sapphire substrate into the Si layer, and above all, the high cost of the substrate and the delay in increasing the area This has hindered its widespread application. In recent years, attempts have been made to realize an SOI structure without using a sapphire substrate. This attempt is roughly divided into the following two.

1. After the surface of the Si single crystal substrate is oxidized, a window is opened to partially expose the Si substrate, and the portion is used as a seed for lateral epitaxial growth to form a Si single crystal layer on SiO ₂ . (In this case, a Si layer is deposited on SiO _2. ) The Si single crystal substrate itself is used as an active layer, and SiO ₂ is formed thereunder. (This method does not involve the deposition of a Si layer.) In addition, in recent years, solar cells have come to be used in various fields, and there is a demand for a solar cell of lower cost and high efficiency. Since a solar cell on a metal substrate is relatively inexpensive and can easily be made large in area, a method for forming a crystalline semiconductor layer with good quality on the metal substrate at low cost is required to improve its efficiency. ..

Further, the light transmissive substrate is important in constructing a contact sensor which is a light receiving element and a projection type liquid crystal image display device. Then, the pixels (pixels) of the sensor and the display device are further increased in density and resolution,
For high definition, an extremely high performance driving element is required. As a result, it is necessary that an element provided on a light transmissive substrate be manufactured using a single crystal layer having excellent crystallinity.

[0007]

However, since the SOI element uses an insulating substrate having a low heat dissipation property as a base, the SOI device has a poor heat dissipation property as compared with a bulk device formed on a bulk substrate, and therefore, a fine structure is required. However, there is a problem that it hinders practical use of high-speed and high-speed circuits.

Further, since the contact size also becomes finer with the miniaturization of the element, the problem that the contact resistance increases, and the area occupied by the wirings is reduced when the wirings are shielded in order to prevent crosstalk between the wirings. There is a problem that it becomes large and is not suitable for miniaturization.

Further, when the speed of the bipolar transistor is increased, the lowering of the resistance of the collector burying layer has reached the limit in the current impurity diffusion method, and there is a serious problem that the collector series resistance increases in particular.

Further, in recent years, solar cells have come to be used in various fields, and there is a demand for solar cells of lower cost and higher efficiency. In particular, solar cells on a metal substrate are relatively inexpensive. Since it is easy to increase the area, it is necessary to provide a method for forming a crystalline semiconductor layer of good quality on a metal substrate at low cost in order to increase its efficiency.

However, it is difficult to raise the efficiency with amorphous silicon, and it is difficult to reduce the cost with Ga-As single crystal. Therefore, it is necessary to produce an inexpensive and highly efficient solar cell on a metal substrate. Has not been fully realized.

On a light-transmissive substrate typified by glass, the disorder of its crystal structure is generally reflected,
Amorphous, good, or polycrystalline layers cannot be used to produce high-performance devices. It is because the crystal structure of the substrate is amorphous, and even if a Si layer is simply deposited,
A good quality single crystal layer cannot be obtained.

Further, since amorphous Si and polycrystalline Si have a crystal structure with many defects, it is difficult to produce a driving element having sufficient performance required at present or in the future. is there.

(Object of the Invention) The object of the present invention is to produce a thin film single crystal semiconductor layer having excellent crystallinity on a metal substrate at a low cost, so that heat dissipation is good and an increase in contact resistance is suppressed. Another object of the present invention is to obtain a semiconductor substrate which can prevent crosstalk between wirings and can form a highly efficient and inexpensive solar cell.

[0015]

As a means for solving the above-mentioned problems, the present invention provides a step of making a silicon substrate porous, and forming a non-porous silicon single crystal layer on the made porous substrate. And a step of bonding the surface of the non-porous silicon single crystal layer to a substrate having another metal surface, and a step of selectively etching and removing the porous silicon layer of the bonded substrate. And a method for manufacturing a semiconductor substrate.

In the step of bonding to the substrate having the other metal surface, the surface of the non-porous silicon single crystal layer is bonded to the substrate having the other metal surface via an insulating layer. The method is a method for manufacturing a semiconductor substrate, which is a process.

The method further comprises the step of forming the metal surface as a wiring layer, and at least a part of the metal surface is in contact with the non-porous silicon single crystal layer. The non-porous silicon single crystal layer is an epitaxial layer formed by epitaxial growth, and the substrate having the other metal surface is made of a light transmissive material. Further, the present invention is intended to solve the above problems by a method for manufacturing a semiconductor substrate, wherein the substrate having a metal surface is a stainless steel substrate.

[0018]

According to the present invention, since a metal layer or a metal substrate having a good heat dissipation property is used as an underlayer of a semiconductor substrate, a substrate having a better heat dissipation property than a conventional SOI structure using an insulating substrate having a poor heat dissipation property is used. Obtainable.

Further, by making a direct contact for directly connecting the substrate having a metal surface and the non-porous silicon single crystal layer serving as the active layer, a contact larger than that of the conventional structure in which a contact hole is formed and connected. It is possible to obtain a surface, which makes it possible to prevent an increase in contact resistance even if the element is miniaturized. Also, the manufacturing process can be simplified.

Further, by forming the metal surface as a wiring layer and providing a shield wire with each wiring sandwiching the insulating layer, crosstalk can be prevented without hindering miniaturization.

(Embodiment example) As a method of making a Si substrate porous, an anodization method using an HF solution is used to make it porous.

An example of the condition is shown below. The starting material of porous Si formed by anodization is not limited to single crystal Si, and Si having another crystal structure may be used.

Applied voltage: 2.6 V Current density: 30 mA.cm ^-2 Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 2.4 hours Thickness of porous Si: 300 μm Porosity: 56 (%) This porous Si layer has a density of single crystal Si of 2.33 g / c.
compared to m ^3, the density of HF solution concentration from 50 to 20%
The density can be changed in the range of 1.1 to 0.6 g / cm ³ by changing to.

To form a non-porous silicon single crystal layer on a porous substrate, an epitaxial growth method is used.

According to observation with a transmission electron microscope, pores having an average diameter of about 600 angstroms are formed in the porous Si layer, and the density thereof is less than half that of single crystal Si. Nevertheless, single crystallinity is maintained, and it is also possible to epitaxially grow a single crystal Si layer on top of the porous layer.

The non-porous silicon epitaxial growth of the Si layer on the porous silicon layer includes molecular beam epitaxial growth, bias sputtering plasma CVD, and photo-CVD.
A growth method such as a growth method, a liquid phase growth method, or a CVD method can be considered, but is not particularly limited.

Further, as a method of selectively removing the porous silicon layer by etching, there is electroless wet chemical etching.

The porous Si selective etching method of the present invention will be described below.

Since the porous layer has a large amount of voids formed therein, the density thereof is reduced to less than half. as a result,
Since the surface area is remarkably increased as compared with the volume, the chemical etching rate thereof is remarkably increased as compared with the etching rate of a normal single crystal layer. Therefore, as the etching solution, hydrofluoric acid (or buffered hydrofluoric acid ... abbreviated as BHF hereinafter), or hydrofluoric acid (or BHF) to which hydrogen peroxide solution is added, or hydrofluoric acid (or BHF) to which alcohol is added , Or hydrofluoric acid (or BHF)
Electroless wet chemical etching in which a mixed solution of hydrogen peroxide water and alcohol is used as a selective etching solution without stirring in the presence of alcohol and infiltrating with stirring in the absence of alcohol. As a result, only porous Si can be selectively removed by etching.

[0030]

EXAMPLES The present invention will be described below with reference to specific examples.

(Embodiment 1) FIG. 1 is a schematic sectional view showing a manufacturing process of Embodiment 1 of the present invention.

A P-type (10
0) The single crystal Si substrate 1 was anodized in an HF solution to make it porous (FIG. 1A).

The anodization conditions were as follows.

Applied voltage: 2.6 V Current density: 30 mA · cm ⁻² Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1:
1: 1 hour: 1.6 hours Porous Si thickness: 200 μm Porosity: 56% Next, ordinary C was placed on the P-type (100) porous Si substrate 1.
A high quality epitaxial Si single crystal film 2 was deposited by 1 μm by the VD method (FIG. 1 (b)). The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 500 sccm Carrier gas: H ₂ ... 180 l / min Substrate temperature: 950 ° C. Pressure: 80 Torr Growth time: 3 min A 500 angstrom oxide layer 3 is formed on the surface of the epitaxial layer 2. (Fig. 1 (c)).

Next, another Si substrate 4 is prepared,
Tungsten silicide 5 was formed as a metal layer on the surface by sputtering to a thickness of 1 μm (FIG. 1D).

Next, the surface of the oxide layer 3 of the substrate having the porous layer is adhered to the metal surface layer 5 of the other substrate, and heated in an oxygen atmosphere at 600 ° C. for 0.5 hour to obtain both of them. The Si substrates were firmly bonded.

Then, the bonded substrates are mixed with a mixed solution of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide (10:
At 6:50), selective etching is performed without stirring.
After 65 minutes, only the non-porous silicon single crystal layer 2 remains unetched, and the non-porous silicon single crystal 2 is used as a material for etching stop, and the porous Si substrate 1 is selectively etched and completely removed. (Fig. 1 (e)).

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, it is 50 angstroms or less even after 65 minutes, and the selection ratio with respect to the etching rate of the porous layer reaches 10 5 or more, The etching amount (tens of angstroms) in the non-porous silicon single crystal layer is a practically negligible reduction in film thickness.

That is, the porous Si substrate 1 having a thickness of 200 μm is removed, and the silicon single crystal layer having good crystallinity is formed on the substrate 4 having the metal layer 5 via SiO ₂ 3. 2 could be formed. (Embodiment 2) Embodiment 2 of the present invention will be described with reference to sectional views of manufacturing steps shown in FIG.

A P-type (10
0) The single crystal Si substrate 1 was made porous by anodization in an HF solution.

The anodization conditions were the same as in Example 1.

M on the P-type (100) porous Si substrate 1
BE (Molecular Beam Epitaxy: Molecular Be)
The non-porous silicon single crystal epitaxial layer 2 was grown at a low temperature of 0.1 micron by an am epitaxy method. The deposition conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ^-9 Torr Growth rate: 0.1 nm / sec Next, a 500 Å oxide layer 3 was formed on the surface of the epitaxial layer 2 (FIG. 2A). ).

Next, another Si substrate 4 is prepared,
Tungsten silicide 5 was formed as a metal layer on the surface by sputtering to a thickness of 1 μm and further patterned to form a desired wiring pattern (FIG. 2).
(B)).

Next, the two substrates were superposed on each other and heated in an oxygen atmosphere at 700 ° C. for 0.5 hours to firmly bond the two Si substrates.

Then, the bonded substrates are mixed with buffered hydrofluoric acid (36% ammonium fluoride and 4.5% hydrofluoric acid mixed solution), alcohol and 30% hydrogen peroxide solution (10: 6). : 50), selective etching is performed without stirring. After 205 minutes, only the non-porous silicon single crystal layer remained without being etched, and the porous Si substrate was selectively etched and completely removed using the non-porous silicon single crystal as a material for the etching stop.

That is, the porous Si substrate having a thickness of 200 μm is removed, and SiO ₂ 3 is formed on the substrate 4 having the metal layer 5 formed in a desired wiring pattern.
Through this, a silicon single crystal layer 2 having good crystallinity could be formed (FIG. 2C).

(Embodiment 3) A third embodiment of the present invention will be described with reference to sectional views of manufacturing steps shown in FIG.

A P-type (10
0) The single crystal Si substrate 1 was made porous by anodization in an HF solution.

The anodization conditions were the same as in Example 1.

On the P-type (100) porous Si substrate 1, a Si epitaxial layer 2 was formed on the P-type (100) porous Si substrate 1 by plasma CVD.
It was grown at a low temperature of 1 micron. The deposition conditions are as follows.

Gas: SiH ₄ High frequency power: 100 W Temperature: 800 ° C. Pressure: 1 × 10 ^-2 Torr Growth rate: 2.5 nm / sec Next, this non-porous silicon single crystal epitaxial layer 2
A 500 angstrom oxide layer (SiO
₂ ) 3 was formed by the thermal CVD method (FIG. 3 (a)).

Next, another Si substrate 4 is prepared,
Al 7 is formed on the surface as a metal layer by the sputtering method.
μm and Al ₂ O ₃ 6 was further formed by anodic oxidation (FIG. 3B).

Next, the two substrates were superposed on each other and heated in an oxygen atmosphere at 450 ° C. for 0.5 hour, so that the two Si substrates were firmly bonded.

Thereafter, the bonded substrates are selectively etched with a mixed solution (1: 5) of 49% hydrofluoric acid and 30% hydrogen peroxide while stirring. After 62 minutes, only the non-porous silicon single crystal layer remained without being etched, and the porous Si substrate 1 was selectively etched and completely removed using the non-porous silicon single crystal as an etch stop material.

That is, the porous Si substrate having a thickness of 200 μm is removed, and the metal layer (Al) 7 is formed.
It was possible to form the silicon single crystal layer 2 having good crystallinity on the substrate 4 having the insulating layer (Al ₂ O ₃ ) 6 (FIG. 3C). (Embodiment 4) Embodiment 4 of the present invention will be described with reference to the cross sectional views of the manufacturing process of FIG.

A P-type (10
0) The single crystal Si substrate 1 was made porous by anodization in a 50% HF solution. The current density at this time was 100 mA / cm ² . The porosification rate at this time was 8.4 μm / min. The entire P-type (100) Si substrate 1 having a thickness of 200 μm was made porous in 24 minutes.

An epitaxial Si single crystal film 2 is formed on the P-type (100) porous Si substrate 1 by an ordinary CVD method.
μm was deposited. The deposition conditions are as follows.

Source gas: SiH ₂ Cl ₂ ... 500 s
ccm Carrier gas: H ₂ ... 180 l / min Substrate temperature: 950 ° C. Pressure: 80 Torr Growth time: 3 min Next, this non-porous silicon single crystal epitaxial layer 2
A 500 angstrom oxide layer (SiO
₂ ) 3 was formed by the thermal CVD method (FIG. 3 (a)). next,
As another substrate, fused silica (f
prepared glass substrate 10 is prepared,
As a metal layer, ITO 9 was formed on the surface by 1000 Å by a sputtering method, and further SiO ₂ 3 ′ was formed by a sputtering method (FIG. 4B).

Next, the two substrates were superposed on each other and heated in an oxygen atmosphere at 400 ° C. for 0.5 hour to firmly bond the two substrates.

Then, plasma CVD is used to form Si ₃ N
₄ of 0.1 μm is deposited to cover the two bonded substrates, and only the nitride film on the porous substrate is removed by reactive ion etching.

Then, the bonded substrates are mixed with a mixed solution of 49% hydrofluoric acid, alcohol, and 30% hydrogen peroxide (10:
At 6:50), selective etching is performed without stirring.
After 65 minutes, only the non-porous silicon single crystal layer 2 remained without being etched, and the porous Si substrate 1 was selectively etched and completely removed by using the single crystal Si2 as an etch stop material.

That is, the porous Si substrate having a thickness of 200 μm is removed, and the transparent conductive film (IT
The insulating layer (SiO 2) is formed on the transparent substrate 10 having (O) 9
₂ ) A silicon single crystal layer 2 having good crystallinity could be formed through 3 '(FIG. 4 (c)).

Also, instead of the Si ₃ N ₄ layer, the same effect can be obtained by coating with apiezon wax or electron wax, and only the porous Si substrate can be completely removed. (Embodiment 5) Embodiment 5 of the present invention will be described with reference to the cross sectional views of the manufacturing process of FIG.

A P-type (10
0) The single crystal Si substrate 1 was made porous by anodization in an HF solution.

The anodization conditions were the same as in Example 1.

On the P-type (100) porous Si substrate 1, the Si epitaxial layer 2 was grown at a low temperature of 0.1 micron by the bias sputtering method (hereinafter abbreviated as BS method) (FIG. 5).
(A)). The deposition conditions are as follows. (Surface cleaning conditions) Temperature: 350 ° C. Atmosphere: Ar Pressure: 15 mTorr Substrate potential: 10 V Target potential: −5 V High frequency power: 5 W RF frequency: 100 MHz Plasma potential was 12 V. (Deposition conditions) RF frequency: 100 MHz High frequency power: 100 W Temperature: 350 ° C. Ar gas pressure: 15 mTorr Growth time: 5 min Film thickness: 0.1 μm Target DC potential: −150 V Substrate DC potential: +20 V Plasma potential was 39 V .. Next, a stainless steel substrate 12 was prepared as the other substrate, and a low resistance polysilicon layer 11 was formed on this surface by a low pressure CVD method (FIG. 5B). However, the low resistance polysilicon layer 11 may be omitted.

Next, the two substrates were superposed on each other and heated in a nitrogen atmosphere at 900 ° C. for 0.5 hour to firmly bond the two substrates.

Then, the bonded substrates are selectively etched with a mixed solution of 49% hydrofluoric acid and alcohol (10: 1) without stirring. After 82 minutes, only the non-porous silicon single crystal layer remained without being etched, and the single crystal S
Porous Si substrate 1 using i as a material for etch stop
Was selectively etched and completely removed.

That is, the porous Si substrate having a thickness of 200 μm was removed, and the silicon single crystal layer 2 having good crystallinity was formed on the metal substrate (stainless steel) 12 (FIG. 5). (C)). (Sixth Embodiment) A sixth embodiment of the present invention will be described with reference to sectional views of manufacturing steps shown in FIG.

A P-type (10
0) The single crystal Si substrate 1 was made porous by anodization in an HF solution.

The anodization conditions were the same as in Example 1.

M on the P-type (100) porous Si substrate 1
BE (Molecular Beam Epitaxy: Molecular Be)
The non-porous silicon single crystal epitaxial layer 2 was grown at a low temperature of 0.1 micron by an am epitaxy method. The deposition conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ^-9 Torr Growth rate: 0.1 nm / sec Next, a 500 Å oxide layer 3 was formed on the surface of this epitaxial layer (FIG. 6A). ..

Next, another Si substrate 4 is prepared,
Tungsten silicide 5 as a metal layer is formed on the surface by sputtering to a thickness of 1 μm, and then S is deposited by a CVD method.
An iO ₂ layer 3'was formed to a thickness of 1 µm (Fig. 6 (b)).

Next, the two substrates were superposed and heated in an oxygen atmosphere at 700 ° C. for 0.5 hours, so that the Si substrates were firmly bonded.

Then, the bonded substrates were mixed with buffered hydrofluoric acid (a mixed solution of 36% ammonium fluoride and 4.5% hydrofluoric acid), alcohol and a 30% hydrogen peroxide solution (10: 6). : 50), selective etching is performed without stirring. After 205 minutes, only the non-porous silicon single crystal layer 2 remains without being etched, and the non-porous silicon single crystal 2 is used as an etch stop material to form porous Si.
The substrate 1 was selectively etched and completely removed.

That is, the porous Si substrate having a thickness of 200 μm is removed, and good crystallinity is provided on the substrate 4 having the metal layer 5 via the insulating layer SiO ₂ 3, 3 ′. The silicon single crystal layer 2 having it was formed (FIG. 6).
(C)). (Embodiment 7) Embodiment 7 of the present invention will be described with reference to sectional views of manufacturing steps shown in FIG.

P type (10
0) The single crystal Si substrate 1 was made porous by anodization in an HF solution.

The anodization conditions were the same as in Example 1.

M on the P-type (100) porous Si substrate 1
BE (Molecular Beam Epitaxy: Molecular Be)
The non-porous silicon single crystal epitaxial layer 2 was grown at a low temperature of 0.1 micron by an am epitaxy method. The deposition conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ^-9 Torr Growth rate: 0.1 nm / sec Next, a 500 Å oxide layer 3 was formed on the surface of the epitaxial layer 2 (FIG. 7A). ).

Next, a stainless steel substrate 12 was prepared as another substrate (FIG. 7B).

Next, the two substrates were superposed and heated in a nitrogen atmosphere at 700 ° C. for 0.5 hours to firmly bond the two Si substrates.

Then, the bonded substrates were mixed with buffered hydrofluoric acid (mixed aqueous solution of 36% ammonium fluoride and 4.5% hydrofluoric acid), alcohol and 30% hydrogen peroxide solution (10: 6). : 50), selective etching is performed without stirring. After 205 minutes, only the non-porous silicon single crystal layer remained without being etched, and the porous Si substrate was selectively etched and completely removed using the non-porous silicon single crystal as a material for the etching stop.

That is, the porous Si substrate having a thickness of 200 μm is removed, and the silicon single crystal layer 2 having good crystallinity is formed on the metal substrate 12 via the insulating layer SiO ₂ 3. It was able to be formed (FIG.7 (c)). (Embodiment 8) As Embodiment 8, an example in which a metal layer and an epitaxial layer are directly bonded to each other without an insulating film interposed therebetween will be described below.

Epitaxial growth is performed on the porous Si substrate by the CVD method under the following conditions.

SiH ₂ Cl ₂ 500 SCCM H ₂ 180 l / min. Substrate temperature 950 ° C. Pressure 80 Torr Growth time 3 min. Another Si substrate is prepared, and the thermal oxide film 5 is first formed on the surface.
After forming 000Å, 1μ of tungsten is sputtered
m.

Next, the above-mentioned substrates are attached to each other, and
By heating at 00 ° C. for 0.5 hour in N ₂ atmosphere, the two substrates were firmly bonded.

When the bonding temperature was raised to around 1000 ° C., the epitaxial layer and the tungsten layer caused a silicide reaction, and the bond became stronger.

The method of etching removal is the same as in the other embodiments.

[0093]

As described above, according to the present invention,
Since the metal layer or the metal substrate having a good heat dissipation property is used as the base of the semiconductor substrate, a substrate having a better heat dissipation property can be obtained as compared with the conventional SOI structure using an insulating substrate having a poor heat dissipation property. It is advantageous in that the miniaturization and miniaturization are advantageous, and the effect of further improving the reliability can be obtained.

Further, by making a direct contact for directly connecting the substrate having a metal surface and the non-porous silicon single crystal layer serving as the active layer, a contact larger than that of the conventional structure in which a contact hole is formed for connection is formed. It is possible to obtain a surface, which makes it possible to prevent an increase in contact resistance even if the element is miniaturized. Also, the manufacturing process can be simplified.

By forming the metal surface as a wiring layer and providing a shield wire with each wiring and the insulating layer sandwiched therebetween, crosstalk can be prevented without hindering miniaturization.

Further, according to the present invention, in order to obtain a thin film Si crystal layer excellent in crystallinity as a single crystal wafer on a light transmissive substrate such as quartz through a metal layer such as ITO, It is possible to provide an excellent method in terms of stability, uniformity, controllability, and economy.

[Brief description of drawings]

FIG. 1 is a schematic sectional view of a semiconductor substrate showing a manufacturing process of a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a semiconductor substrate showing a manufacturing process of a second embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view of a semiconductor substrate showing a manufacturing process of a third embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view of a semiconductor substrate showing a manufacturing process of a fourth embodiment of the present invention.

FIG. 5 is a schematic cross-sectional view of a semiconductor substrate showing a manufacturing process of a fifth embodiment of the present invention.

FIG. 6 is a schematic cross-sectional view of a semiconductor substrate showing a manufacturing process of a sixth embodiment of the present invention.

FIG. 7 is a schematic cross-sectional view of a semiconductor substrate showing a manufacturing process of a seventh embodiment of the present invention.

[Explanation of symbols]

1 Porous Si Substrate 2 Non-Porous Epitaxial Si Single Crystal Layer 3, 3'Insulating Layer (SiO ₂ ) 4 Other Si Substrate 5 Metal Layer (Tungsten / Silicide) 6 Insulating Layer (Al ₂ O ₂ ) 7 Metal Layer (Al) 9 metal layer (transparent conductive film ITO) 10 translucent substrate (quartz substrate) 11 low resistance polysilicon layer 12 metal substrate (stainless substrate)

Front Page Continuation (72) Inventor Yoshio Nakamura 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Akira Ishizaki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.

Claims (9)

[Claims] 1. A step of making a silicon substrate porous, a step of forming a non-porous silicon single crystal layer on the porous substrate, the surface of the non-porous silicon single crystal layer being the other metal surface. A method for manufacturing a semiconductor substrate, comprising: a step of adhering to a substrate having a substrate; and a step of selectively etching and removing the porous silicon layer of the adhered substrate. 2. The step of bonding to the substrate having the other metal surface, the surface of the non-porous silicon single crystal layer is bonded to the substrate having the other metal surface via an insulating layer. The method for manufacturing a semiconductor substrate according to claim 1, wherein the method is a step. 3. The method for manufacturing a semiconductor substrate according to claim 1, further comprising the step of forming the metal surface as a wiring layer. 4. The method for manufacturing a semiconductor substrate according to claim 1, wherein at least a part of the metal surface is in contact with the non-porous silicon single crystal layer. 5. The method for manufacturing a semiconductor substrate according to claim 1, wherein the non-porous silicon single crystal layer is an epitaxial layer formed by epitaxial growth. 6. The method for producing a semiconductor substrate according to claim 1, wherein the substrate having a metal surface is made of a light-transmissive substrate on which a transparent conductive film (ITO) is laminated. 7. The method for manufacturing a semiconductor substrate according to claim 1, wherein the substrate having a metal surface is a support substrate having metal films laminated thereon. 8. The method for manufacturing a semiconductor substrate according to claim 1, wherein the substrate having a metal surface is a metal substrate. 9. The method for manufacturing a semiconductor substrate according to claim 1, wherein the substrate having the metal surface is a stainless steel substrate.