JPH0521456A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a highly reliable and miniaturized semiconductor device. CONSTITUTION:An oxide film 2 is formed on the sidewall of a gate electrode 1 formed on a semiconductor substrate 5; after that, a thin thermal oxide film 9 is formed. Thereby, etching damage 6 caused at the interface between the sidewall oxide film 2 and the semiconductor substrate 5 is taken into the thermal oxide film 9. When ions are implanted in this state, implantation damage 7 is caused inside the thermal oxide film 9 and it is possible to restrain the semiconductor substrate from being damaged. Consequently, a heat treatment can be executed at a low temperature, a shallow junction from which damage has been removed can be formed, and a highly reliable and miniaturized semiconductor device can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to removal of crystal defects in the semiconductor device and suppression of their occurrence.

[0002]

2. Description of the Related Art MOS (Me) as a typical semiconductor device
The tal-Oxide-Semiconductor (transistor) type transistor is being reduced in the area occupied by it as the degree of integration is increased. Various structures have been presented for the problems that arise. FIG. 6 is a cross-sectional view of a MOS type transistor formed by a conventional manufacturing method. In the figure, 1 is a gate electrode, 2 is a sidewall oxide film formed on the sidewall of the gate electrode 1, 3 is a gate oxide film, 4 is a field oxide film, and 5 is a semiconductor substrate.

Next, a conventional method of manufacturing a semiconductor device will be described with reference to FIGS. As shown in FIG. 4A, the semiconductor substrate 5 on which the field oxide film 4 is formed
A gate oxide film 3 is formed on the
It is formed by the VD method, and the gate electrode 1 is formed by etching. Next, as shown in FIG. 4B, ion implantation is performed to form a low-concentration impurity layer. The ion species at this time are phosphorus (P ⁺ ) in the case of NMOS and BF ₂ ⁺ or B ⁺ in the case of PMOS. Next, as shown in FIG. 4C, an oxide film is deposited by the CVD method, and RIE (R
The oxide film 2 is formed on the side wall of the gate electrode 1 by means of active ion etching. At this time, damage 6 due to etching occurs at the interface between the sidewall oxide film 2 and the semiconductor substrate 5. Next, as shown in FIG. 5A, ion implantation for forming high-concentration impurity layers (source and drain regions) is performed. In this case, in the case of NMOS, arsenic (A
s ⁺ ), and in the case of PMOS, BF ₂ ⁺ is injected. At this time, the surfaces of the semiconductor substrate 5 and the gate electrode 1 become amorphous layers, and injection damage 7 occurs. Then, as shown in FIG. 5B, heat treatment is performed at about 900 ° C. for 20 to 20 ° C.
Do about 30 minutes. The processing atmosphere is N ₂ atmosphere.
By this heat treatment, a low concentration junction is formed under the sidewall oxide film 2, and a high concentration junction is formed in the other source / drain regions 8. This junction is generally LDD (Lightly
It is called a Doped Drain) junction. This LDD
The junction has an effect of mitigating an electric field generated in the drain junction during operation of the transistor, and therefore has an effect of suppressing deterioration of the transistor which is caused by a high electric field.
By the way, the etching damage 6 and the implantation damage 7 shown in FIGS. 4C and 5A are recovered and removed to some extent by the high temperature heat treatment described in FIG. However, formation of a shallow junction is one of the methods for preventing characterization such as reduction in threshold voltage (short channel effect) of a transistor having a short gate length. In order to achieve this, it is necessary to lower the heat treatment temperature in FIG. 5 (b). This is shown in FIG. 4 (c) and FIG. 5 (a).
It will indicate the difficulty of damage, defect removal, and recovery at. FIG. 5C shows a state in which etching damage 6 and implantation damage 7 still exist when the heat treatment temperature is 850 ° C. or lower.

[0004]

Since the conventional method of manufacturing a semiconductor device has been carried out as described above, when the heat treatment required for developing the next-generation semiconductor device is performed at a low temperature, etching is performed. Since the damage and the implantation damage cannot be sufficiently recovered, there is a problem that the reliability of the semiconductor device is deteriorated due to an increase in the junction leak current in the junction of the semiconductor device.

The present invention has been made in order to solve the above-mentioned problems, and it is possible to remove damage due to etching damage and to prevent the occurrence of ion implantation damage that occurs when performing ion implantation for forming a junction. An object of the present invention is to provide a method for manufacturing a semiconductor device that can be suppressed and can obtain a highly reliable miniaturized semiconductor device.

[0006]

A semiconductor device according to the present invention comprises a first step of forming an oxide film on a side wall of a gate electrode formed on a semiconductor substrate, and a surface of the semiconductor substrate and the gate electrode. It includes a second step of forming a thin thermal oxide film and a third step of performing heat treatment after implanting impurities in the state of the second step.

[0007]

In the present invention, the thin thermal oxide film formed after the sidewall oxide film is formed incorporates the etching damage at the interface of the semiconductor substrate, which occurs during the sidewall oxide film formation.
Further, generation of implantation damage due to subsequent ion implantation on the surfaces of the semiconductor substrate and the gate electrode is suppressed.

[0008]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. 1 to 3 are sectional views showing one embodiment of the present invention. In each figure, the portions corresponding to those in FIG. 4 and FIG. As shown in FIG. 1A, a field oxide film 4 and a gate oxide film 3 are formed on a semiconductor substrate 5, a polycrystalline silicon film is further formed by a CVD method, and a gate electrode 1 is formed by etching.
Next, as shown in FIG. 1B, ion implantation for forming a low concentration impurity layer is performed. The ion species at this time is NM
Phosphorus (P ⁺ ) is used in the case of OS, and boron or BF ₂ ⁺ is used in the case of PMOS, and an appropriate injection amount is about 10 ³ / cm ² . Next, as shown in FIG. 1C, an oxide film is deposited by a CVD method and RIE is performed to form a sidewall oxide film 2. This process causes damage 6 at the interface between the sidewall oxide film 2 and the semiconductor substrate 5 due to etching.

Next, in the state of FIG. 1C, as shown in FIG. 2A, a thin thermal oxide film 9 is formed on the surface of the semiconductor substrate 1 and the surface of the gate electrode 1. The thickness of the thermal oxide film 9 is preferably about several hundred Å. However, this film thickness needs to be optimized from the degree of damage caused by etching, the energy of ions to be implanted in the next process step, and the like.
Also, the oxidation temperature at this time is preferably 850 ° C. or lower,
The processing atmosphere may be either wet or dryO ₂ atmosphere. And, at this time, the damage due to etching
Are taken into the thermal oxide film 9. Next, as shown in FIG. 2B, impurities such as ion implantation are performed in order to form high-concentration impurity layers (source and drain regions) with the thermal oxide film 9 left. The ion implantation species at this time is NM
Arsenic for OS, boron or BF for PMOS
_2, which is a ^+. The dose is about 10 ¹⁵ / cm ² . Further, the implantation energy is about several tens KeV, but higher energy in consideration of the oxide film thickness is required than the implantation energy in the conventional example. In FIG. 2B, the amorphization that occurs during ion implantation occurs in the thermal oxide film 9, and the amorphization of the surfaces of the semiconductor substrate 5 and the gate electrode 1 is avoided. That is, the implantation damage 7 that occurs during ion implantation occurs only in the thermal oxide film 9,
Injection damage 7 to the semiconductor substrate 5 and the gate electrode 1
Is suppressed. Next, as shown in FIG.
A heat treatment is performed to activate the implanted impurities. The heat treatment temperature at this time is 850 ° C. or lower, and the treatment atmosphere is N 2.
₂ or O ₂ , or in an inert gas. The processing time is about 20 to 30 minutes. By this heat treatment, a low concentration junction is formed under the sidewall oxide film 2, and a high concentration junction is formed in the other source / drain regions 8. At this time, since the heat treatment temperature is lower than the conventional heat treatment temperature, the diffusion depth of the impurity layer becomes shallow, and the formed junction becomes shallow. This shallow junction shortens the gate length, and the semiconductor device can be miniaturized.

Next, as shown in FIG. 3, the thermal oxide film 9 is removed with a dilute hydrofluoric acid solution. As a result, the etching damage 6 and the implantation damage 7 are also removed.

As described above, in this embodiment, the thin thermal oxide film 9 formed after the sidewall oxide film 2 is formed takes in the etching damage 6 therein, and further, the semiconductor substrate 5 and the gate having the injection damage 7 generated at the time of ion implantation. The generation of the electrode 1 will be suppressed. As a result, the heat treatment can be performed at a low temperature, a shallow junction can be formed without damage, and a highly reliable semiconductor device, for example, a MOS transistor can be configured.

[0012]

As described above, according to the present invention, the first step of forming the oxide film on the side wall of the gate electrode formed on the semiconductor substrate and the thinning on the surface of the semiconductor substrate and the gate electrode are performed. A second step of forming a thermal oxide film, and a third step of performing heat treatment after implanting impurities in the state of the second step
The thin thermal oxide film formed after the sidewall oxide film is formed can remove the etching damage caused by the sidewall oxide film formation and the implantation damage caused by the ion implantation. There is an effect that a junction can be formed and a highly reliable miniaturized semiconductor device can be obtained.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view showing an embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 3 is a cross-sectional view showing one embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.

FIG. 5 is a cross-sectional view showing a method of manufacturing a conventional semiconductor device.

FIG. 6 is a cross-sectional view showing a conventional semiconductor device.

[Explanation of symbols]

 1 gate electrode 2 sidewall oxide film 5 semiconductor substrate 6 etching damage 7 implantation damage 9 thin thermal oxide film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/322 Q 8617-4M

Claims (1)

Claim: What is claimed is: 1. A first step of forming an oxide film on a sidewall of a gate electrode formed on a semiconductor substrate, and forming a thin thermal oxide film on the surfaces of the semiconductor substrate and the gate electrode. And a third step of performing heat treatment after implanting impurities in the state of the second step.