JPH05211221A - Measuring method of quantity of charge-up in manufacturing process of semiconductor device - Google Patents

Abstract

PURPOSE:To measure the quantity of a charge-up by using a MOS capacitor, in which impurities having different concentration are added previously to a gate oxide film composed of silicon oxide, and inspecting the breakdown of the gate oxide film having any impurity concentration by the charge-up. CONSTITUTION:A MOS capacitor has a field oxide film 2 composed of silicon oxide formed onto an N-type silicon substrate 1 and a gate oxide film 3 and using a polycrystalline silicon film, to which phosphorus is added, as a gate electrode 14, and arsenic having different concentration is added to the gate oxide films of the MOS capacitor (A) 5, the MOS capacitor (B) 6, the MOS capacitor (C) 7, the MOS capacitor (D) 8 and the MOS capacitor (E) 9 respectively. The MOS capacitors having low arsenic concentration in the gate oxide films are broken down with the increase of dosage, the increase of the quantity of a charge-up. The higher impurity concentration in the gate oxide film is, the more breakdown is generated at low voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring a charge-up amount in a semiconductor device manufacturing process.

[0002]

2. Description of the Related Art As a first example of a conventional method for measuring a charge-up amount of a semiconductor device, as shown in FIG. 7, an element formation region partitioned by a field oxide film 2 provided on a silicon substrate 1 is formed. Whether the gate oxide film 3 of the MOS capacitor on the silicon substrate 1 has been destroyed after the silicon substrate 1 on which the MOS capacitor composed of the thin gate oxide film 3 and the gate electrode 4 formed on the surface has undergone the process of using charged particles There is a method of measuring the amount of charge-up by checking whether or not it is.

As a second example, MNOS (metal nitride) before and after the step of using charged particles.
There is also a method of measuring the amount of charge-up by measuring the amount of electrical change according to the amount of accumulated charged particles in a capacitor having an oxide silicon structure (Monthly Semi
director World 1987, November,
31-37). As shown in FIG. 8, the gate electrode 4 is positively charged up through the process of using charged particles, and the gate electrode 4 is an N-type silicon substrate 1.
In contrast, when the potential is positive with respect to the gate oxide film 3, electrons in the silicon substrate are injected into the thin gate oxide film 3 having a thickness of 2 nm by the tunnel effect due to the electric field of charge-up.
And the silicon nitride film 12 are trapped at the interface. Therefore, the CV characteristic of the capacitor having the MNOS structure shifts more positively than that before the step of using the charged particles. Therefore, the charge-up amount can be measured by examining the shift amount of the flat band voltage of the capacitor having the MNOS structure.

As a third example, there is a method of measuring the amount of charge up by measuring the amount of electrical change in accordance with the amount of accumulated charged particles, which is electrically writable as shown in FIG. There is also a method of using a nonvolatile memory element having a floating gate (see Japanese Patent Laid-Open No. 1-69025). When the control gate 13 is positively charged up due to the process of using charged particles and the control gate 13 has a positive potential with respect to the drain region 14, an electric field due to the charge-up is applied to the tunnel oxide film 15, Electrons are injected from the region 14 into the floating gate 16. Therefore, the threshold voltage of the N-channel MOS transistor 17 in the non-volatile memory element shifts more positively than that before the structure using charged particles. Therefore, the charge-up amount can be measured by examining the shift amount of the threshold voltage of the N-channel MOS transistor 17 in this nonvolatile memory element.

[0005]

However, the above-mentioned conventional method of measuring the charge-up amount is the same as that of the first MOS.
In the method of examining the dielectric breakdown of the gate oxide film of the capacitor, it is difficult to quantify the charge-up amount because it is a binary judgment as to whether or not the gate oxide film has been destroyed.

Further, in the method of examining the shift amount of the flat band voltage in the capacitor having the second MNOS structure, the tunnel oxide film is destroyed when the charge-up amount increases and a voltage higher than a certain value is applied to the tunnel oxide film. It becomes impossible to measure the charge-up amount. In other words, there is a problem that the charge-up amount is large, such that it cannot be used in, for example, an ion implantation process.

Further, N in the third nonvolatile memory element
In the method of examining the shift amount of the threshold voltage of the channel MOS transistor, since the control gate voltage and the threshold voltage have the relationship shown in FIG. 10, the charge-up amount is small and the control gate voltage does not exceed a certain value. In this case, there is a problem that the threshold voltage of the MOS transistor does not change and the charge-up amount cannot be measured.

[0008]

According to a charge-up amount measuring method in a manufacturing process of a semiconductor device of the present invention, a plurality of MOS capacitors having a gate oxide film made of silicon oxide to which impurities having different concentrations are added are formed. After subjecting a silicon substrate to a manufacturing process of a semiconductor device using charged particles, the dielectric breakdown state of the MOS capacitor is examined, and the charge-up amount is calculated from the impurity concentration in the oxide film of the MOS capacitor having the lowest impurity concentration subjected to dielectric breakdown. It is comprised including the means to measure.

[0009]

The inventors of the present invention depend on the concentration of impurities arbitrarily added to the gate oxide film made of silicon oxide of the MOS capacitor. It has been found that the withstand voltage strength of the MOS capacitor changes. FIG. 11 is a diagram showing the IV characteristic of the MOS capacitor, in which A: 5 × 10 is included in the gate oxide film.
¹⁹ cm ^-3 , B: 3 x 10 ¹⁹ cm ^-3 , C: 1 x 10 ¹⁹ cm
³ shows an IV characteristic curve of a MOS capacitor to which ^-3 arsenic was added. This is an investigation of a MOS capacitor having a gate oxide film made of silicon oxide with a thickness of 20 nm and using a polycrystalline silicon film to which phosphorus is added as an electrode. As is clear from the figure, the higher the impurity concentration in the gate oxide film, the lower the voltage at which dielectric breakdown occurs.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor chip for explaining a first embodiment of the present invention. This is a MOS capacitor having a field oxide film 2 made of silicon oxide and a gate oxide film 3 formed on an N-type silicon substrate 1 and using a polycrystalline silicon film to which phosphorus is added as a gate electrode 4, and a MOS capacitor A5. , MOS capacitors B6, M
The gate oxide films of the OS capacitor C7, the MOS capacitor D8, and the MOS capacitor E9 are each 1 × 10 ¹⁹ cm.
^-3 , 2 x 10 ¹⁹ cm ^-3 , 3 x 10 ¹⁹ cm ^-3 , 4 x 10 ¹⁹
cm ⁻³ , 5 × 10 ¹⁹ cm ⁻³ arsenic was added. FIG. 2 shows the results of an investigation on the dose-dependence of charge-up in ion implantation, which is one of the semiconductor device manufacturing processes, using this capacitor. The implanted ions at this time are arsenic ions and the acceleration energy is 70 k.
eV, beam current 4 mA, dose 5 × 10
^It was changed from ¹⁴ cm ⁻² to 1 × 10 ¹⁶ cm ⁻² . As shown in FIG. 2, it can be seen that the MOS capacitor having a low arsenic concentration in the gate oxide film is dielectrically broken down as the dose amount is increased, that is, as the charge-up amount is increased.

By the way, when the same evaluation was performed by the method using the conventional MNOS structure MOS capacitor, 1
The tunnel oxide film was destroyed at a dose amount of × 10 ¹⁵ cm ^-2 or more, and the charge-up amount could not be measured. Further, when the same evaluation was carried out by a method using a conventional MOS capacitor, 5 × 10 ¹⁵ cm - gate oxide film is destroyed by ² or more dose, a dose of less than 5 × 10 ¹⁵ cm ^-2 Charge up caused by 5 × 10 ¹⁵ cm ^-2
It was possible to distinguish the difference in charge-up that occurs with the above dose amount, but it was not possible to perform more detailed charge-up evaluation.

3 and 4 are a plan view and a sectional view taken along the line AA 'of a semiconductor chip for explaining a second embodiment of the present invention.

As shown in FIGS. 3 and 4, an electrode 10 having an area several orders of magnitude larger than the gate area is connected to the gate electrode 4. Therefore, since the electric field generated by the charge-up of the electrodes is larger than that in the case of the first embodiment, the sensitivity to the charge-up can be increased. FIG. 5 shows the result of investigation on the relationship between the charge-up and the plasma processing time when the plasma processing, which is one of the semiconductor device manufacturing processes, is performed according to the second embodiment. Further, FIG. 6 shows the results of the same investigation conducted by the method using the conventional nonvolatile memory element. It can be seen from FIGS. 5 and 6 that a small amount of charge-up that cannot be observed in the conventional example can be observed in the second embodiment.

As a method of adding impurities to the gate oxide film of the MOS capacitor used in the present invention, a method of performing ion implantation after forming the gate oxide film and then performing a heat treatment in a nitrogen atmosphere, or a gate oxide film A method of uniformly adding impurities to the gate oxide film, such as a method of thermally diffusing the impurities into the gate oxide film after the formation of Al.

[0016]

As described above, in the charge-up amount measuring method of the present invention, a MOS capacitor in which impurities of various concentrations are added in advance to a gate oxide film made of silicon oxide is used. Since it depends on the impurity concentration added to the gate oxide film, the charge-up amount can be measured by investigating what kind of impurity concentration the gate oxide film has caused by the dielectric breakdown.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment of the present invention.

FIG. 2 is a diagram showing a result of investigation on dose dependency of charge-up in ion implantation according to the first embodiment.

FIG. 3 is a plan view of a semiconductor chip for explaining a second embodiment of the present invention.

FIG. 4 is a sectional view taken along the line AA ′ of FIG.

FIG. 5 is a diagram showing a result of investigating a relationship between charge-up and plasma processing time when performing plasma processing according to the second embodiment of the present invention.

FIG. 6 is a diagram showing the relationship between charge-up and plasma processing time when plasma processing is performed using a conventional nonvolatile memory element for comparison with the second embodiment of the present invention.

FIG. 7 is a cross-sectional view of a semiconductor chip for explaining a first example of a charge-up amount measuring method in a conventional semiconductor device manufacturing process.

FIG. 8 is a cross-sectional view of a semiconductor chip for explaining a second example of the charge-up amount measuring method in the conventional semiconductor device manufacturing process.

FIG. 9 is a sectional view of a semiconductor chip for explaining a third example of the charge-up amount measuring method in the conventional manufacturing process of the semiconductor device.

FIG. 10 is a diagram showing a relationship between a control gate of a nonvolatile memory element and a shift amount of a threshold voltage.

FIG. 11: M in which impurities are arbitrarily added to the gate oxide film
The figure which shows the IV characteristic of an OS capacitor.

[Explanation of symbols]

 1 N-type silicon substrate 2 field oxide film 3 gate oxide film 4 gate electrode 5 MOS capacitor A 6 MOS capacitor B 7 MOS capacitor C 8 MOS capacitor D 9 MOS capacitor E 10 electrode 11 interlayer insulating film 12 silicon nitride film 13 control gate 14 Drain region 15 Tunnel oxide film 16 Floating gate 17 N-channel transistor 18 P-type silicon substrate 19 Source region 20 Wiring

Claims (1)

[Claims] 1. A semiconductor device manufacturing process using charged particles on a silicon substrate having a plurality of MOS capacitors each having a gate oxide film made of silicon oxide doped with impurities having different concentrations, and then the MOS capacitors. And measuring the charge-up amount from the impurity concentration in the oxide film of the MOS capacitor having the lowest impurity concentration that has undergone the dielectric breakdown, and measuring the charge-up amount in the manufacturing process of the semiconductor device.