JPH05183541A - Transmission line duplex system - Google Patents

Abstract

PURPOSE:To prevent a token from being received over both transmission lines when the length of each token is shorter than a time length of a distance difference of the transmission lines by delaying a signal arrived first so as to give a same phase to that of the signal generated on the other transmission line. CONSTITUTION:A counter circuit 9 starts counting while receiving a state of a signal line S11 when a head (SD) of a signal on a signal line 1 comes first and stops counting when a head SD of a signal on a signal line S2 comes. The result of count is latched by a latch circuit 10 and given to a shift register circuit 11 whose shift length is variable as a shift length. Thus, the signal on the signal line S1 has the same phase as the phase of the signal on the signal line S2. When an SD comes on one signal line and no SD is generated on the other signal line within a time equivalent to a maximum delay time width, the circuit 3 generates a signal S19 to reset D flip-flops 7,8 and to stop the operation of counters 9,12 and the result is given to the shift register 11 whose shift length with a maximum delay time width is variable.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission line duplexing apparatus which has a plurality of sets of signal lines of a normal system and a standby system for transmission and switches the transmission system when a transmission failure occurs.

[0002]

2. Description of the Related Art Conventionally, when the transmission lines are duplicated and the distances between the transmission lines are different, the transmission lines to be used are first determined on a first-come-first-served basis, and when a transmission failure occurs, the signal is transmitted sooner. The transmission path that appears was selected.

[0003]

However, when the length of the minimum frame transmitted on the transmission lines is shorter than the time length of the distance difference between the respective transmission lines, the disadvantage that the frames are received over both transmission lines. was there. Therefore, it is an object of the present invention to provide an apparatus capable of preventing the reception over both transmission paths even in that case.

[0004]

SUMMARY OF THE INVENTION According to the present invention, a plurality of sets of transmission lines having different lengths, a normal system and a standby system, are provided with signal lines from the regular system to the standby system or from the standby system to the regular system when a transmission failure occurs. In the redundant transmission line switching device, the time difference from the occurrence time of the beginning of the signal received from the transmission path with the shorter delay time to the occurrence time of the beginning of the signal received from the other transmission path (however, A means for timing the time that does not exceed the theoretical maximum delay time that can be considered from the distance between transmission lines, and a variable shift amount connected to the transmission line with the shorter delay time with the measured amount as the transmission data shift length. And a shift register.

[0005]

By the above means, the time difference between the respective generation points is given as the shift length of the shift register circuit of variable shift length, the signal arriving earlier is delayed, and the same phase as the signal generated on the other transmission line is provided. .. As a result, if the length of each token is shorter than the time length of the distance difference between the transmission paths, the tokens will not be received over both transmission paths.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of the present invention, and FIG. 2 is a timing chart diagram showing signal states on a transmission line of an embodiment of the present invention. In FIG. 1, the signals shown in the time chart of FIG. 2 are generated on the signal lines S1 and S2. The circuit 1 and the circuit 2 in FIG. 1 detect the leading portion (SD) of the signal, and the signal line S3
The detected SD is input to the circuit 3 by the means for sending to S4 and S4. When the signal line S3 sends out SD earlier than the signal line S4, the circuit 3 expects in advance from the generation time of SD appearing on the signal line S3 to the generation time of SD appearing on the signal line S4. A circuit for transmitting a high level signal within a time range that does not exceed the maximum delay time width calculated from the difference in the distance between the transmission paths. During this period, the low level is output to the signal line S6. The circuits 4 and 5 are AND circuits and connect the signal lines S3 and S4 to the signal line S5.
And the signal line S7 and the signal line S8 based on the state of the signal line S6.
To send to. The circuit 6 is a set / reset type flip-flop, which outputs a high level signal to the signal line S9 when the signal line S3 detects SD, and outputs a high level signal to the signal line S10 when the signal line S4 detects SD. The circuit 7 and the circuit 8 are D-type flip-flops, and the signal lines S9 and S
The state of 10 is latched by the signal lines S7 and S8 and output to the signal lines S11 and S12. The circuit 9 is a counter, which starts counting in response to the state of the signal line S11 when SD of the signal line S1 comes in first, and stops counting when SD of the signal line S2 enters. The count result is latched by the latch circuit 10 and given to the shift register circuit 11 having a variable shift length as the shift length. By doing so, the signal line S1
The upper signal has the same phase as the signal on the signal line S2. If the signal appearing on the signal line S2 is earlier than the signal appearing on S1, the circuits 12, 13 and 14 will cause the above circuits 9, 10, 11 to operate.
The same operation will be performed respectively. If SD occurs on one signal line and SD does not occur on the other signal line within the maximum delay time width, the circuit 3 outputs the signal S1.
9 to reset the D-type flip-flops of the circuits 7 and 8 to stop the operation of the counters 9 and 12, and the shift length of the maximum delay time width is given to the variable shift register circuit 11 as the shift length. ..

[0007]

As described above, according to the present invention, the time difference between the beginnings of the signals generated on one transmission line and the beginnings of the signals generated on the other transmission line is determined by the shift length. It is given as the shift length of the variable shift register circuit, and the signal arriving earlier is delayed so that it has the same phase as the signal generated on the other transmission line, so that the length of each token is longer than the time length of the distance difference of the transmission line. If it is too short, the signal will not be received over both transmission paths, so that the transmission quality can be greatly improved.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a timing chart diagram of an embodiment of the present invention.

[Explanation of symbols]

 1, 2 SD detection circuit 3 circuits 6 set / reset type flip-flop 7, 8 D type flip-flop 9, 12 counter 10, 13 latch 11, 14 shift register

Claims (1)

[Claims] 1. A transmission line duplexer for switching a signal line from a normal system to a standby system or from a standby system to a regular system when a transmission line having a plurality of sets of a normal system and a standby system and having different lengths is delayed. The time difference between the beginning of the signal received from the transmission path with the shorter time and the beginning of the signal received from the other transmission path (however, theoretically from the distance between the transmission paths A means for timing a time that does not exceed the maximum possible delay time) and a shift register with a variable shift amount connected to the transmission path with the shorter delay time, which uses the measured amount as the shift length of the transmission data. A transmission line duplexing device.