JPH05158751A - Monitoring system for processing state for microcomputer - Google Patents
Monitoring system for processing state for microcomputerInfo
- Publication number
- JPH05158751A JPH05158751A JP3319535A JP31953591A JPH05158751A JP H05158751 A JPH05158751 A JP H05158751A JP 3319535 A JP3319535 A JP 3319535A JP 31953591 A JP31953591 A JP 31953591A JP H05158751 A JPH05158751 A JP H05158751A
- Authority
- JP
- Japan
- Prior art keywords
- processing
- microcomputer
- recognition circuit
- execution
- program
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E50/00—Technologies for the production of fuel of non-fossil origin
- Y02E50/10—Biofuels, e.g. bio-diesel
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E50/00—Technologies for the production of fuel of non-fossil origin
- Y02E50/30—Fuel from waste, e.g. synthetic alcohol or diesel
Landscapes
- Debugging And Monitoring (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はマイクロコンピュータシ
ステムに関し、特にマイクロコンピュータの処理の状態
監視に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer system, and more particularly to monitoring the status of microcomputer processing.
【0002】[0002]
【従来の技術】従来の処理状態監視方式は、マイクロコ
ンピュータ開発支援装置を使用してプログラムの実行状
況を調べることにより処理状態を監視していた。2. Description of the Related Art In the conventional processing state monitoring method, the processing state is monitored by checking the program execution state using a microcomputer development support device.
【0003】[0003]
【発明が解決しようとする課題】従来の処理状態監視方
式では、マイクロコンピュータシステムで使用している
マイクロプロセッサの種類毎にマイクロコンピュータ開
発支援装置が必要であった。またマイクロコンピュータ
開発支援装置の操作が複雑で実行状況の調査に時間がか
かり、マイクロコンピュータの処理実行中に実時間で処
理状態を監視できないという問題点があった。In the conventional processing state monitoring system, a microcomputer development support device is required for each type of microprocessor used in the microcomputer system. Further, there is a problem that the operation of the microcomputer development support device is complicated and it takes a long time to investigate the execution status, so that the processing status cannot be monitored in real time during the processing execution of the microcomputer.
【0004】本発明の目的は、マイクロコンピュータシ
ステムにおけるプログラムの処理状態を監視するマイク
ロコンピュータの処理状態監視方式を提供することにあ
る。An object of the present invention is to provide a processing state monitoring system of a microcomputer for monitoring the processing state of a program in a microcomputer system.
【0005】[0005]
【課題を解決するための手段】本発明のマイクロコンピ
ュータの処理状態監視方式は、マイクロコンピュータの
プログラムの各処理個々に対応して割り付けられ前記プ
ログラムにより制御可能なラッチ機能を備えた複数の処
理実行認識回路と、この処理実行認識回路が出力するラ
ッチ情報を可視表示する前記処理認識回路に対応した表
示装置とを有し、前記プログラムが各処理実行の毎に出
力する処理実行開始情報により対応する前記処理実行認
識回路が作動し当該処理終了の毎に出力する処理実行終
了情報を受けるまで前記作動を継続し、この処理実行認
識回路が出力するラッチ情報により対応する表示装置に
可視表示する。According to the processing state monitoring system of a microcomputer of the present invention, a plurality of processing executions having a latch function which is assigned corresponding to each processing of a program of the microcomputer and which can be controlled by the program are executed. It has a recognition circuit and a display device corresponding to the process recognition circuit that visually displays the latch information output by the process execution recognition circuit, and corresponds by the process execution start information that the program outputs for each process execution. The operation is continued until the processing execution recognition circuit operates and receives the processing execution end information output every time the processing ends, and the information is visually displayed on the corresponding display device by the latch information output from the processing execution recognition circuit.
【0006】[0006]
【実施例】次に、本発明について図面を参照して説明す
る。図1は本発明の一実施例を示ブロック図、図2は処
理状態被監視プログラムの流れ図、図3は図1の処理実
行認識回路の出力波形を示す図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a flow chart of a processing state monitored program, and FIG. 3 is a diagram showing output waveforms of the processing execution recognition circuit of FIG.
【0007】図1に示す本実施例は、マイクロコンピュ
ータ1が具備するプログラムの各処理に対応しその処理
実行状態を検知し、検出結果をランプ等の表示器に出力
する処理実行認識回路2,3,4から構成する。ここで
マイクロコンピュータ1が具備するプログラムは3つの
処理で構成され、1番目の処理から順に処理状態が処理
実行認識回路2,3,4に出力するようプログラムされ
ているものとする。The present embodiment shown in FIG. 1 corresponds to each processing of a program included in the microcomputer 1, detects a processing execution state thereof, and outputs a detection result to a display such as a lamp. It consists of 3 and 4. Here, it is assumed that the program included in the microcomputer 1 is composed of three processes and is programmed so that the process states are sequentially output to the process execution recognition circuits 2, 3 and 4 from the first process.
【0008】マイクロコンピュータ1は、最初に処理1
のプログラムを実行すると、図2に示すように処理実行
認識回路2に対し処理1の開始信号を出力する(S1
1)。処理実行認識回路2は、この処理1開始信号を受
けると作動し、図3に示すようにレベル1を出力し、ラ
ンプ5を点灯する。プログラムが処理1の実行中(S1
2)は処理実行認識回路2はラッチし、図3に示すよう
にレベル1を継続して出力する。マイクロコンピュータ
1が1番目の処理1(S12)を終了すると、処理1終
了信号を出力する(S13)。処理実行認識回路2は、
この終了信号受け図3に示すようにラッチを解除し、レ
ベル0を出力しランプ6を消灯する。The microcomputer 1 first executes the process 1
2 is executed, a start signal of the process 1 is output to the process execution recognition circuit 2 as shown in FIG. 2 (S1).
1). The process execution recognition circuit 2 operates upon receiving the process 1 start signal, outputs level 1 and lights the lamp 5, as shown in FIG. The program is executing process 1 (S1
In 2), the process execution recognition circuit 2 latches and continuously outputs level 1 as shown in FIG. When the microcomputer 1 finishes the first process 1 (S12), it outputs a process 1 end signal (S13). The process execution recognition circuit 2
Receiving this end signal, the latch is released as shown in FIG. 3, level 0 is output, and the lamp 6 is turned off.
【0009】続いてマイクロコンピュータ1が処理2の
プログラムを実行すると、処理実行認識回路3は、この
処理2開始信号を受信すると作動し、図3に示すように
レベル1を出力し、ランプ6を点灯する。プログラムが
処理2を実行中(S22)は、処理実行認識回路3はラ
ッチし、図3に示すようにレベル1を継続して出力す
る。マイクロコンピュータ1が2番目の処理(S22)
を終了すると、処理2の終了信号を出力する(S2
3)。処理実行認識回路3は、この終了信号を受け図3
に示すようにラッチを解除し、レベル0を出力しランプ
6を消灯する。Subsequently, when the microcomputer 1 executes the program of the process 2, the process execution recognition circuit 3 operates upon receiving the process 2 start signal, outputs level 1 as shown in FIG. Light. While the program is executing process 2 (S22), the process execution recognition circuit 3 latches and continuously outputs level 1 as shown in FIG. The microcomputer 1 performs the second processing (S22)
When the process ends, the end signal of the process 2 is output (S2
3). The process execution recognition circuit 3 receives this end signal and
As shown in, the latch is released, level 0 is output, and the lamp 6 is turned off.
【0010】次の処理3についても同様な動作を繰り返
す。なお図3は時間t1に上述した処理1〜3の動作を
順次実行し、時間t2は上述の処理1を終了し、処理2
が継続中を示す。このようにプログラムの各処理を実行
する際、現在実行中の処理に対応するランプが点灯する
ので、プログラムのバグによる2つ以上の処理の併走や
処理の未終了等が識別できる。The same operation is repeated for the next processing 3. Note that in FIG. 3, the operations of the above-described processes 1 to 3 are sequentially executed at time t1, and at time t2, the above-described process 1 is ended and the process 2
Indicates that it is continuing. In this way, when each process of the program is executed, the lamp corresponding to the process currently being executed is turned on, so that it is possible to identify the parallel running of two or more processes or the unfinished process due to a bug in the program.
【0011】マイクロコンピュータ1が3つの処理から
なるプログラムを実行した場合について上述したが、本
発明はプログラム処理数を限定するものではない。The case where the microcomputer 1 executes a program including three processes has been described above, but the present invention does not limit the number of program processes.
【0012】[0012]
【発明の効果】以上の説明でしたように本発明は、マイ
クロコンピュータ開発支援装置を使用することなく、マ
イクロコンピュータの処理実行中に実時間でその処理状
態を容易に監視できる効果がある。As described above, the present invention has an effect that the processing state can be easily monitored in real time during the processing execution of the microcomputer without using the microcomputer development support device.
【図1】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.
【図2】被監視プログラムの流れ図である。FIG. 2 is a flow chart of a monitored program.
【図3】図1の処理実行認識回路の出力波形を示す図で
ある。FIG. 3 is a diagram showing an output waveform of a process execution recognition circuit of FIG.
【符号の説明】 1 マイクロコンピュータ 2,3,4 処理実行認識回路 5,6,7 ランプ[Explanation of Codes] 1 Microcomputer 2, 3, 4 Processing execution recognition circuit 5, 6, 7 Lamp
Claims (1)
処理個々に対応して割り付けられ前記プログラムにより
制御可能なラッチ機能を備えた複数の処理実行認識回路
と、この処理実行認識回路が出力するラッチ情報を可視
表示する前記処理認識回路に対応した表示装置とを有
し、前記プログラムが各処理実行の毎に出力する処理実
行開始情報により対応する前記処理実行認識回路が作動
し当該処理終了の毎に出力する処理実行終了情報を受け
るまで前記作動を継続し、この処理実行認識回路が出力
するラッチ情報により対応する表示装置に可視表示する
ことを特徴とするマイクロコンピュータの処理状態監視
方式。1. A plurality of process execution recognizing circuits each having a latch function which is assigned corresponding to each process of a program of a microcomputer and which can be controlled by the program, and visible latch information output by the process execution recognizing circuit. A display device corresponding to the process recognition circuit for displaying, and the corresponding process execution recognition circuit operates according to the process execution start information output by the program each time the process is executed, and outputs each time the process ends. A processing state monitoring system for a microcomputer, characterized in that the above-mentioned operation is continued until the processing execution end information is received, and the information is visually displayed on a corresponding display device by the latch information output from the processing execution recognition circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3319535A JPH05158751A (en) | 1991-12-04 | 1991-12-04 | Monitoring system for processing state for microcomputer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3319535A JPH05158751A (en) | 1991-12-04 | 1991-12-04 | Monitoring system for processing state for microcomputer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05158751A true JPH05158751A (en) | 1993-06-25 |
Family
ID=18111333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3319535A Withdrawn JPH05158751A (en) | 1991-12-04 | 1991-12-04 | Monitoring system for processing state for microcomputer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05158751A (en) |
-
1991
- 1991-12-04 JP JP3319535A patent/JPH05158751A/en not_active Withdrawn
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990311 |