JPH05145088A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To make a voltage of a threshold voltage component drop in each step after a voltage is applied in the forward direction of diodes and to give an input protective function of a semiconductor integrated circuit device without making a steady-state current flow by a method wherein the device is provided with an input protective circuit formed by connecting a plurality of pieces of the diodes in series in the forward direction between a signal conductor from an input/output pad and a high-potential power conductor. CONSTITUTION:When a voltage higher than a supply voltage is inputted from other element in a semiconductor integrated circuit device, a potential on the side of a signal conductor 4 is set at a potential higher than that in a high-potential power supply 1 and a forward potential is applied to diodes 5. However, if a potential difference of three times or higher of the total of threshold voltages of the diodes is not applied to both endmost ends of the diodes 5, a high current does not flow. As the semiconductor integrated circuit device has an input protective circuit formed by connecting a plurality of pieces of the diodes 5 in series in the forward direction between the conductor 4 from an input/output pad 3 and the power supply 1, a voltage drop of a threshold voltage component in each step is generated when a voltage is applied in the forward direction of the diodes and even if an output signal of a high supply voltage is inputted, a high current does not flow regularly.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to improvement of an input protection circuit.

[0002]

2. Description of the Related Art FIG. 6 is a circuit diagram showing an input protection circuit in, for example, a conventional semiconductor integrated circuit device, in which 1 is a high potential power supply (hereinafter referred to as V _DD ) and 2 is a low potential power supply (hereinafter V D). _SS ) 3 is an input / output pad, 4 is a signal line from the input / output pad 3, 6 is a diode inserted between V _DD 1 and the signal line 4, 7 is V _SS 2 and the signal line 4. A diode inserted between the input lines, 8 is an input protection resistor connected to the signal line 4, and 9 is an input buffer.
It leads to more internal areas.

Next, the operation will be described. When a surge voltage exceeding the absolute rated voltage is externally applied to the input / output pins of the semiconductor integrated circuit device, the surge voltage penetrates into the chip from the input / output pad 3 through the signal line 4. At this time,
The abnormal voltage on the signal line 4 flows into V _DD 1 and V _SS 2 through the diodes 6 and 7 inserted between the signal line 4 and V _DD 1 and V _SS 2. As a result, it is possible to prevent the abnormal voltage from being directly applied to the input section of the input buffer 9.

[0004]

Since the conventional semiconductor integrated circuit device is configured as described above, the power supply voltage (V _DD ′) higher than the power supply voltage (V _DD ) of this semiconductor integrated circuit device is used. When the H level output of another semiconductor integrated circuit device is input to the input protection circuit of the semiconductor integrated circuit device, V _DD ′> V _{DD, and} therefore the signal line and V
_A forward voltage is applied to the diode inserted between the _DDs , which turns on the diode, _causing a constant current to flow from the input / output pin to V _DD. The semiconductor integrated circuit device could not be connected.

The present invention has been made to solve the above problems, and when ICs having different power supply voltages coexist, one semiconductor integrated circuit device is connected to another semiconductor integrated circuit device having a high power supply voltage. Even if it is done, the purpose is to obtain an input protection circuit in which no current flows to the V _DD side, and further to provide a structure suitable for this circuit.

[0006]

A semiconductor integrated circuit device according to the present invention comprises a plurality of diodes connected in series in the forward direction between a signal line from an input / output pad and V _DD .

[0007]

In the present invention, since a plurality of diodes are connected in series in the forward direction between the signal line from the input / output pad and V _DD , when a voltage is applied in the forward direction, the threshold voltage ( V _TH ) can be dropped.

[0008]

1 is a diagram showing an input protection circuit of a semiconductor integrated circuit device according to an embodiment of the present invention. In the figure,
The same reference numerals as those in FIG. 6 indicate the same or corresponding portions, and 5 is V _DD 1
Are a plurality of diodes inserted between the signal line 4 and the signal line 4, and are connected in series with the signal line 4 side from the input / output pad 3 as the anode and the high potential power source 1 side as the cathode.

Next, the operation will be described. Now, consider a case where a voltage higher than the power supply voltage of the semiconductor integrated circuit device is input from another element to the semiconductor integrated circuit device having the input protection circuit of the present invention.

At this time, comparing the potentials of the signal line 4 and the high-potential power source 1, the potential on the signal line 4 side becomes higher and the forward potential is applied to the diode 5. However, the sum of the threshold voltage (V _TH ) of each diode, that is, 3 in the case of FIG.
A large current does not flow unless a potential difference equal to or more than double V _TH is applied to both ends of the diode 5.

As described above, according to one embodiment of the present invention, the input protection circuit is formed by connecting the plurality of diodes 5 in series in the forward direction between the signal line 4 from the input / output pad 3 and V _DD . Therefore, when a voltage is applied in the forward direction, a voltage drop corresponding to the threshold voltage (V _TH ) is generated in each stage, and an H level output signal of another semiconductor integrated circuit device operating at a high power supply voltage is generated. Even if input, a large current does not constantly flow unless a voltage higher than the total of V _TH of each diode is input.

FIG. 2 is a sectional view showing a structure for realizing an input protection circuit of a semiconductor integrated circuit device according to an embodiment of the present invention. In the figure, 13 is a p-substrate and 10 is a p-substrate 13.
, 11 is a p ⁺ region formed in the n well 10 region, and 12 is an n ⁺ region similarly formed in the n well 10.

Although a plurality of diodes cannot be formed unless they are electrically independent, as shown in FIG.
The wells 10 are electrically independent of each other, and one diode is formed by the p ⁺ region 11 and the n well 10 in the well. The circuit shown in FIG. 1 can be realized by connecting a plurality of these diodes in series.
The n ⁺ region 12 in the n well 10 is a region for electrically connecting to the metal wiring layer.

FIG. 3 is a sectional view showing another embodiment of the structure for realizing the input protection circuit of the semiconductor integrated circuit device of the present invention. In the figure, the same reference numerals as those in FIGS. 1 and 2 denote the same or corresponding portions, 14 is a p region formed in the n well 10 region, 15 is an n ⁺ region formed in the n well 10 region, and 16 is n region formed in the p region 14 and 17 are p regions
Reference numeral 18 denotes a p ⁺ region formed in the region 14, 18 denotes a p ⁺ region formed in the n region 16, and 19 denotes an n ⁺ region formed in the n region 16.

The p region 14 makes the n well 10 region and the n region 16 electrically independent from each other, and two pn junctions exist in the n well 10 to form two diodes. The circuit of FIG. 1 can be realized by using a plurality of these diodes.

FIG. 4 is a sectional view showing still another embodiment of the structure for realizing the input protection circuit of the semiconductor integrated circuit device according to the present invention. In the figure, the same reference numerals as those in FIGS. 1 and 2 indicate the same or corresponding portions, 20 is a p-well formed in the p-substrate 13, 21 is an electrically independent p-well 20 and the p-substrate 13. It is an n region. 22 a and 22 b are p ⁺ regions formed in the p well 20, and 23 is an n ⁺ region formed in the p well 20.

In the p well 20, p ⁺ regions 22a and n ⁺
One diode is formed between the region 23 and the region 23. At the same time, resistance exists between the p ⁺ region 22a and the p ⁺ region 22b. For p diffusion region, since it is possible to increase the resistance value as compared with the n diffusion region, said p ⁺
The resistance between the region 22a and the p ⁺ region 22b can be used as the protection resistor 8 in FIG.

The signal extracted from the n ⁺ region 23 may be electrically connected to the anode side of the diode (see diode 5, FIG. 1) in the next stage. The next-stage diode may have a structure as shown in FIGS.

Further, by electrically connecting the input signal line 4 from the input / output pad 3 to the cathode side of a different diode and further connecting the anode side to V _SS , the diode 7 on the V _SS side (see FIG. 1). To get At this time, the diode may have the structure shown in FIGS.

FIG. 5 is a cross-sectional view when the lower layer region of the input / output pad 3 is used in realizing the circuit shown in FIG.
In this embodiment, the circuit structure shown in FIG. 2 is used. In FIG, 2 designate the same or corresponding parts, the input-output pads on the chip 24, 25 is SiO ₂
Insulating films 26 and the like are contact holes for connecting the input / output pad 24 and the p ⁺ region 11.

The input / output pad 24 has a relatively large area,
Conventionally, the lower layer has not been used, but since the lower layer region of the input / output pad 24 (3) is used as described above, the chip occupation area of the input protection circuit can be reduced.

[0022]

As described above, the semiconductor integrated circuit device according to the present invention includes the input protection circuit in which a plurality of diodes are connected in series in the forward direction between the signal line from the input / output pad and V _DD . When a voltage is applied in the forward direction, the voltage corresponding to the threshold voltage (V _TH ) can be dropped for each stage, and therefore, even if the output signal of another semiconductor integrated circuit device having a high power supply voltage is input. There is an effect that the input protection function can be provided without the steady current flowing.

Further, since the diode is formed by utilizing the region under the input / output pad, there is an effect that an input protection circuit having a small chip occupation area can be constructed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an input protection circuit of a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing an embodiment of a structure for realizing the circuit of FIG.

3 is a cross-sectional view showing another embodiment of the structure for realizing the circuit of FIG.

4 is a sectional view showing still another embodiment of the structure for realizing the circuit of FIG.

5 is a cross-sectional view of a lower layer region of an input / output pad in a structure realizing the circuit of FIG.

FIG. 6 is a diagram showing an input protection circuit of a conventional semiconductor integrated circuit device.

[Explanation of symbols]

1 High-potential power supply (V _DD ) 2 Low-potential power supply (V _SS ) 3,24 Input / output pad 4 Signal line 5 Diode between V _DD and signal line 7 Diode between V _SS and signal line 8 Input protection resistor 9 Input buffer 10 n-well 11, 17, 18, 22a, 22b p ⁺ region 12, 15, 19, 23 n ⁺ region 13 p substrate 14 p region 16, 21 n region 20 p well 25 insulating film 26 through hole

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hirotaka Nakamura 4-1-1 Mizuhara, Itami City, Hyogo Prefecture Mitsubishi Electric Corp. Kita Itami Works

Claims (5)

[Claims] 1. In a semiconductor integrated circuit device having an input protection circuit, a signal line from an input / output pad and a high potential power line are connected in series with the signal line side as an anode and the high potential power line side as a cathode. At least two or more diodes connected to each other, and at least one diode connected between the signal line and the low potential power supply line with the signal line side serving as a cathode and the low potential power supply line side serving as an anode. A semiconductor integrated circuit device comprising: 2. The semiconductor integrated circuit device according to claim 1, wherein each of the diodes is formed in an n well which is electrically independent of each other, and at least one p ⁺ region and at least one p ⁺ region are formed in the n well. A semiconductor integrated circuit device comprising one or more n ⁺ regions. 3. The semiconductor integrated circuit device according to claim 1, wherein each diode is formed in one or in a plurality of n wells electrically independent of each other, and the n well is at least One or more p regions and at least one or more n ⁺ regions, at least one or more n regions and at least one or more p ⁺ regions in the p regions, and at least in the n regions A semiconductor integrated circuit device having a structure including one or more p ⁺ regions and at least one or more n ⁺ regions. 4. The semiconductor integrated circuit device according to claim 1, comprising at least two or more p ⁺ regions and at least one or more n ⁺ regions in a p-well electrically independent of each other. In the p-well, a diode, which is directly connected to the anode from the signal line of the diodes connected between the signal line and the high potential power supply line, and a protection resistor are provided. Integrated circuit device. 5. The semiconductor integrated circuit device according to claim 1, wherein the diode is formed in a lower layer region of the input / output pad.