JPH05144872A - Method of joining bump electrodes - Google Patents
Method of joining bump electrodesInfo
- Publication number
- JPH05144872A JPH05144872A JP30633091A JP30633091A JPH05144872A JP H05144872 A JPH05144872 A JP H05144872A JP 30633091 A JP30633091 A JP 30633091A JP 30633091 A JP30633091 A JP 30633091A JP H05144872 A JPH05144872 A JP H05144872A
- Authority
- JP
- Japan
- Prior art keywords
- bump electrode
- metal layer
- base metal
- bump
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000010953 base metal Substances 0.000 claims abstract description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 238000002844 melting Methods 0.000 claims description 6
- 230000005496 eutectics Effects 0.000 claims description 3
- 229910018140 Al-Sn Inorganic materials 0.000 claims description 2
- 229910018564 Al—Sn Inorganic materials 0.000 claims description 2
- 230000004927 fusion Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 229910018523 Al—S Inorganic materials 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007712 rapid solidification Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はバンプ電極の接合方法、
詳しくはワイヤレスボンディング法、特にフリップチッ
プボンディング法またはテープキャリアボンディング法
により半導体チップをバンプ電極を介して基板またはテ
ープキャリアに電気的、機械的に接合する方法に関す
る。BACKGROUND OF THE INVENTION The present invention relates to a bump electrode joining method,
More specifically, it relates to a method for electrically and mechanically bonding a semiconductor chip to a substrate or a tape carrier via bump electrodes by a wireless bonding method, particularly a flip chip bonding method or a tape carrier bonding method.
【０００２】[0002]
【従来の技術】従来、半導体チップのバンプ電極として
はんだ等の金属を使用するが、その場合、はんだ等の金
属は表面が酸化膜で覆われているためにバンプ電極を熱
圧着により接合する際、前記酸化膜が加熱、加圧だけで
は破れ難く介在するので、十分な接合強度が得られない
という問題点がある。2. Description of the Related Art Conventionally, a metal such as solder is used as a bump electrode of a semiconductor chip. In that case, when the bump electrode is joined by thermocompression bonding, the surface of the metal such as solder is covered with an oxide film. However, since the oxide film is not easily broken and is interposed only by heating and pressurization, there is a problem that sufficient bonding strength cannot be obtained.
【０００３】そのため、バンプ電極の表面に酸化膜が形
成されないようにフラックス等を使用した処理を施す
が、処理工程が増えて作業性が低下するとともに低温下
での実装が不可能という不具合がある。Therefore, although a treatment using a flux or the like is carried out so that an oxide film is not formed on the surface of the bump electrode, the number of treatment steps is increased, the workability is deteriorated, and mounting at a low temperature is impossible. .
【０００４】又、硬質なバンプ電極と軟質なバンプ電極
とを夫々形成して、その硬質バンプ電極を軟質バンプ電
極に食い込ませる接合法が知られているが（特開平２−
５５４０号公報）、該接合法によれば、多ピン化に伴っ
て接合荷重が増大して装置が大型化するばかりでなく、
バンプ電極の形成工程が複雑化しコスト増になる等の不
具合がある。There is also known a bonding method in which a hard bump electrode and a soft bump electrode are respectively formed, and the hard bump electrode is bitten into the soft bump electrode (Japanese Patent Laid-Open No. HEI 2-
No. 5540), according to the joining method, not only the joining load increases with the increase in the number of pins and the size of the apparatus increases, but also
There is a problem that the bump electrode forming process becomes complicated and the cost increases.
【０００５】[0005]
【発明が解決しようとする課題】本発明は斯る従来不具
合を解消すべく、工程簡素にし、かつ多ピンであっても
低荷重で接合可能にするとともに、バンプ電極の接合を
確実にして信頼性の高い実装方法を提供することを目的
とする。SUMMARY OF THE INVENTION In order to solve such a conventional problem, the present invention simplifies the process, enables bonding with a low load even with a large number of pins, and ensures reliable bonding of bump electrodes. The purpose is to provide a highly flexible implementation method.
【０００６】[0006]
【課題を解決するための手段】斯る本発明は、半導体チ
ップのＡｌパッド上にＳｎ基合金からなるバンプ電極を
配設し、基板またはテープキャリアのリード線に前記バ
ンプ電極を接合させるバンプ電極の接合方法において、
前記バンプ電極に先尖り略円錐状の突起部を形成すると
ともに、リード線にはバンプ電極より低融点の下地金属
層を形成し、前記基板またはテープキャリアを加熱して
下地金属層が溶融した状態でバンプ電極を押接し、その
突起部を溶融下地金属層に挿入させ融着させることを特
徴とする。According to the present invention, bump electrodes made of an Sn-based alloy are provided on Al pads of a semiconductor chip, and the bump electrodes are joined to lead wires of a substrate or a tape carrier. In the joining method of
A state where the bump electrode is formed with a pointed substantially conical projection and a lead metal layer having a melting point lower than that of the bump electrode is formed on the lead wire, and the substrate or tape carrier is heated to melt the base metal layer. It is characterized in that the bump electrode is pressed against and the protrusion is inserted into the molten base metal layer and fused.
【０００７】又、本発明の請求項２は、上記バンプ電極
を融着させる温度が、下地金属層の融点以上でＡｌ−Ｓ
ｎ共晶温度（２２８℃）以下であることを特徴とする。According to a second aspect of the present invention, the temperature at which the bump electrodes are fused is equal to or higher than the melting point of the underlying metal layer, Al-S.
It is characterized in that the temperature is n eutectic temperature (228 ° C.) or lower.
【０００８】[0008]
【作用】本発明によれば、半導体チップを基板またはテ
ープキャリアに接近させて、バンプ電極の突起部を溶融
状の下地金属層に挿入させることで、挿入された突起部
は容易に溶融し、そのＳｎ成分が下地金属層に拡散して
突起部と下地金属層とが溶着する。According to the present invention, the semiconductor chip is brought close to the substrate or the tape carrier and the protrusion of the bump electrode is inserted into the molten base metal layer, whereby the inserted protrusion is easily melted, The Sn component diffuses into the base metal layer, and the protrusion and the base metal layer are welded.
【０００９】又、請求項２によれば、バンプ電極を融着
させる温度が、Ａｌ−Ｓｎ共晶温度（２２８℃）以下で
あることから、ＡｌパッドとＳｎ基合金のバンプ電極と
の境界面（Ａｌ／Ｓｎ界面）の拡散が発生しにくい。According to a second aspect of the present invention, the temperature at which the bump electrodes are fused is equal to or lower than the Al—Sn eutectic temperature (228 ° C.), so that the interface between the Al pad and the Sn-based alloy bump electrode is Diffusion of (Al / Sn interface) hardly occurs.
【００１０】[0010]
【実施例】本発明の実施例を図面により説明すれば、図
１は接合前の半導体チップ１と基板２とを示す。DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the drawings, an embodiment of the present invention will be described. FIG. 1 shows a semiconductor chip 1 and a substrate 2 before bonding.
【００１１】半導体チップ１には、Ａｌパッド３が形成
され該パッド３上（図では下面で示される）にバンプ電
極４を配設し、基板２には、Ｃｕからなるリード線５が
形成され該リード線５上に下地金属層６を形成してな
る。説明の便宜のため、上記バンプ電極４およびリード
線５は拡大した状態の各一対のみを図示するが、実際に
はピン数に応じた多数のバンプ電極およびリード線が所
定の間隔をおいて配列されるものである。An Al pad 3 is formed on the semiconductor chip 1, bump electrodes 4 are arranged on the pad 3 (shown by the lower surface in the figure), and a lead wire 5 made of Cu is formed on the substrate 2. A base metal layer 6 is formed on the lead wire 5. For convenience of explanation, only one pair of the bump electrodes 4 and the lead wires 5 are shown in an enlarged state, but in reality, a large number of bump electrodes and lead wires are arranged at a predetermined interval according to the number of pins. Is done.
【００１２】バンプ電極４は半田材料の一つであって、
Ｓｎ基合金、詳しくは本出願人が先願（特願平２−２２
２７２９号）で開示した如く、Ｓｎを主要元素とし、そ
れにＡｇ，Ｓｂ，Ｚｎ，Ｐｂ，Ｉｎ，Ｎｉ等の添加元素
を加えた合金からなる。上記Ｓｎ合金は、急冷凝固法に
より細いワイヤー状に作製されたものであり、そのワイ
ヤー先端を加熱してボールを形成し、該ボールをチップ
１のＡｌパッド３上に圧着させた状態で該ワイヤーを引
張ることにより切断して前記バンプ電極４が形成され
る。The bump electrode 4 is one of the solder materials,
The Sn-based alloy, for details, the applicant of the present invention has a prior application (Japanese Patent Application 2-22
No. 2729), it is made of an alloy in which Sn is a main element and additive elements such as Ag, Sb, Zn, Pb, In, and Ni are added to it. The Sn alloy is produced in the form of a thin wire by a rapid solidification method, the tip of the wire is heated to form a ball, and the ball is pressed onto the Al pad 3 of the chip 1 to form the wire. Is pulled to cut the bump electrode 4 to form the bump electrode 4.
【００１３】バンプ電極４には、先尖り円錐状の突起部
４ａを一体に形成する。この突起部４ａは前記バンプ電
極４を形成する際に同時に形成、すなわち前記ボールを
チップ１のＡｌパッド３上に圧着させワイヤーを引張り
切断する際に形成される。突起部４ａの長さは、前記ボ
ール形成時の加熱温度の調整によって所望長さに設定で
きる。The bump electrode 4 is integrally formed with a projection 4a having a pointed conical shape. The protrusion 4a is formed at the same time when the bump electrode 4 is formed, that is, when the ball is pressed onto the Al pad 3 of the chip 1 and the wire is pulled and cut. The length of the protruding portion 4a can be set to a desired length by adjusting the heating temperature during the ball formation.
【００１４】下地金属層６は前記バンプ電極４より低融
点の金属層であり、メッキ処理等によってリード線５上
に被着させたものである。The base metal layer 6 is a metal layer having a melting point lower than that of the bump electrode 4, and is deposited on the lead wire 5 by plating or the like.
【００１５】上記実施例において、半導体チップ１およ
び基板２中の各部の組成、実寸法等を例示すれば、バン
プ電極４は、組成：Ｓｎ−１Ａｇ−５Ｓｂ−１Ｚｎ（各
元素の前の数字は添加量：wt％、残りがＳｎである。以
下同じ）、本体部長さ：４０μｍ、突起部４ａの長さ：
１００μｍ、下地金属層６は、組成：Ｐｂ−６３Ｓｎ、
融点：１８３℃、厚さ：１０μｍである。又、Ａｌパッ
ド３は厚さ：１μｍ、リード線５は厚さ：１０μｍであ
る。In the above-mentioned embodiment, the composition, actual size, etc. of each part in the semiconductor chip 1 and the substrate 2 are illustrated. The bump electrode 4 has a composition: Sn-1Ag-5Sb-1Zn (the numbers before each element are Addition amount: wt%, the balance is Sn (the same applies hereinafter), body length: 40 μm, protrusion 4a length:
100 μm, the base metal layer 6 has a composition: Pb-63Sn,
Melting point: 183 ° C., thickness: 10 μm. The Al pad 3 has a thickness of 1 μm, and the lead wire 5 has a thickness of 10 μm.
【００１６】而して上記半導体チップ１のバンプ電極４
と基板２の下地金属層６との接合操作を説明すると、図
２に示す如く２００℃の加熱温度を有する熱盤７上に前
記基板２を載せ、リード線５上の下地金属層６を溶融さ
せ、その上方よりバンプ電極４を下向きにし半導体チッ
プ１を下降させてバンプ電極４を下地金属層６に押接さ
せる。バンプ電極４は、その突起部４ａが溶融状態にあ
る前記下地金属層６に挿入されながら、該挿入部分が順
次に溶融してＳｎ成分が下地金属層６に拡散し溶着す
る。従って、バンプ電極４と下地金属層６とが溶着一体
的となって強固な接合構造が得られる。Then, the bump electrode 4 of the semiconductor chip 1
The bonding operation between the substrate 2 and the base metal layer 6 of the substrate 2 will be described. As shown in FIG. 2, the substrate 2 is placed on a heating plate 7 having a heating temperature of 200 ° C., and the base metal layer 6 on the lead wire 5 is melted. Then, the bump electrode 4 is directed downward from above, and the semiconductor chip 1 is lowered to press the bump electrode 4 against the underlying metal layer 6. The bump electrode 4 is inserted into the base metal layer 6 in a molten state while the protruding portions 4a are sequentially melted, and the Sn component is diffused and welded to the base metal layer 6. Therefore, the bump electrode 4 and the base metal layer 6 are welded and integrated to obtain a strong joint structure.
【００１７】尚、上記実施例は半導体チップと基板との
接続について説明したが、半導体チップとテープキャリ
アとの接続についても同様である。Although the above embodiment has described the connection between the semiconductor chip and the substrate, the same applies to the connection between the semiconductor chip and the tape carrier.
【００１８】[0018]
【効果】本発明によれば、バンプ電極の突起部を溶融状
の下地金属層に挿入して溶着させるので、フラックス等
の前処理を施さなくともバンプ電極を下地金属層に確実
に接合させることができ、工程簡素であるとともに低温
下での実装を可能にして作業性を高めることができる。[Effects] According to the present invention, since the projections of the bump electrodes are inserted into the molten base metal layer and welded, the bump electrodes can be securely bonded to the base metal layer without pretreatment such as flux. Therefore, the process can be simplified, and the mounting can be performed at a low temperature to enhance the workability.
【００１９】また、バンプ電極の前記突起部が先尖り円
錐状であるので、該突起部を溶融状の下地金属層に挿入
させることで、突起部は容易に溶融し、したがって接合
荷重を低くすることができ、多ピンの場合であっても装
置の大型化を抑えることができる。Further, since the protrusion of the bump electrode has a pointed conical shape, the protrusion is easily melted by inserting the protrusion into the molten base metal layer, thus reducing the bonding load. Therefore, even if the number of pins is large, it is possible to prevent the device from increasing in size.
【００２０】又、請求項２によれば、ＡｌパッドとＳｎ
基合金のバンプ電極との境界面（Ａｌ／Ｓｎ界面）の拡
散が防止されるので、接合強度の劣化がなく信頼性を高
めることができる。According to claim 2, the Al pad and the Sn are
Since diffusion of the boundary surface (Al / Sn interface) of the base alloy with the bump electrode is prevented, the bonding strength is not deteriorated and the reliability can be improved.
【図１】接合前の半導体チップおよび基板の部分拡大図
である。FIG. 1 is a partially enlarged view of a semiconductor chip and a substrate before joining.
【図２】接合した状態を示す同部分拡大図である。FIG. 2 is an enlarged view of the same portion showing a joined state.
１……半導体チップ ２……基板 ３……Ａｌパッド ４……盤 ４ａ…突起部 ５……リード線 ６……下地金属層 ７……熱盤 1 ... Semiconductor chip 2 ... Substrate 3 ... Al pad 4 ... Board 4a ... Projection 5 ... Lead wire 6 ... Base metal layer 7 ... Hot plate
Claims (2)
金からなるバンプ電極を配設し、基板またはテープキャ
リアのリード線に前記バンプ電極を接合させるバンプ電
極の接合方法において、前記バンプ電極に先尖り略円錐
状の突起部を形成するとともに、リード線にはバンプ電
極より低融点の下地金属層を形成し、前記基板またはテ
ープキャリアを加熱して下地金属層が溶融した状態でバ
ンプ電極を押接し、その突起部を溶融下地金属層に挿入
させ融着させることを特徴とするバンプ電極の接合方
法。1. A bump electrode bonding method in which a bump electrode made of an Sn-based alloy is provided on an Al pad of a semiconductor chip and the bump electrode is bonded to a lead wire of a substrate or a tape carrier. In addition to forming a pointed conical protrusion, a lead metal layer having a lower melting point than the bump electrode is formed, and the substrate or tape carrier is heated to press the bump electrode while the base metal layer is melted. A method of joining bump electrodes, which comprises contacting the protrusions and inserting the protrusions into the molten underlayer metal layer for fusion.
地金属層の融点以上でＡｌ−Ｓｎ共晶温度（２２８℃）
以下であることを特徴とする請求項１記載のバンプ電極
の接合方法。2. The temperature at which the bump electrodes are fused is equal to or higher than the melting point of the underlying metal layer and the Al—Sn eutectic temperature (228 ° C.).
The method for joining bump electrodes according to claim 1, wherein:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30633091A JPH05144872A (en) | 1991-11-21 | 1991-11-21 | Method of joining bump electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30633091A JPH05144872A (en) | 1991-11-21 | 1991-11-21 | Method of joining bump electrodes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05144872A true JPH05144872A (en) | 1993-06-11 |
Family
ID=17955812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30633091A Pending JPH05144872A (en) | 1991-11-21 | 1991-11-21 | Method of joining bump electrodes |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05144872A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5616520A (en) * | 1992-03-30 | 1997-04-01 | Hitachi, Ltd. | Semiconductor integrated circuit device and fabrication method thereof |
| WO2001026910A1 (en) * | 1999-10-08 | 2001-04-19 | Dai Nippon Printing Co., Ltd. | Non-contact data carrier and ic chip |
-
1991
- 1991-11-21 JP JP30633091A patent/JPH05144872A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5616520A (en) * | 1992-03-30 | 1997-04-01 | Hitachi, Ltd. | Semiconductor integrated circuit device and fabrication method thereof |
| WO2001026910A1 (en) * | 1999-10-08 | 2001-04-19 | Dai Nippon Printing Co., Ltd. | Non-contact data carrier and ic chip |
| US6686650B1 (en) | 1999-10-08 | 2004-02-03 | Dai Nippon Printing Co., Ltd. | Non-contact data carrier and IC chip |
| AU774105B2 (en) * | 1999-10-08 | 2004-06-17 | Dainippon Printing Co. Ltd. | Non-contact data carrier and IC chip |
| KR100455748B1 (en) * | 1999-10-08 | 2004-11-06 | 다이니폰 인사츠 가부시키가이샤 | Non-contact data carrier and ic chip |
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