JPH05135914A - Chip type thermistor and thermistor electrode and manufacture of chip type thermistor - Google Patents
Chip type thermistor and thermistor electrode and manufacture of chip type thermistorInfo
- Publication number
- JPH05135914A JPH05135914A JP3297082A JP29708291A JPH05135914A JP H05135914 A JPH05135914 A JP H05135914A JP 3297082 A JP3297082 A JP 3297082A JP 29708291 A JP29708291 A JP 29708291A JP H05135914 A JPH05135914 A JP H05135914A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- thermistor
- alumina substrate
- chip type
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims description 11
- 238000005245 sintering Methods 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 230000013011 mating Effects 0.000 claims description 4
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 claims description 4
- 239000002131 composite material Substances 0.000 claims description 3
- 239000007772 electrode material Substances 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 3
- 239000006185 dispersion Substances 0.000 abstract 2
- 230000002401 inhibitory effect Effects 0.000 abstract 1
- 238000009966 trimming Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000010304 firing Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000000047 product Substances 0.000 description 1
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Thermistors And Varistors (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はチツプ型サーミスタ及び
サーミスタ電極及びチツプ型サーミスタの製造方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type thermistor, a thermistor electrode and a method for manufacturing a chip type thermistor.
【0002】[0002]
【従来の技術】近年の小型・軽量化の要請より、使用さ
れる電気部品も小型化してきている。このためサーミス
タにおいても小型チツプ型のものが求められる様になつ
てきている。しかしながら、従来のこの種のチツプ形サ
ーミスタは、図6に示す構成であつた。即ち、図6に示
す様に、例えばアルミナ基板1の両側面上面に電極2を
設け、係る電極2間にサーミスタ体3を形成した構成で
あつた。2. Description of the Related Art Due to recent demands for smaller size and lighter weight, electric parts used are also becoming smaller. For this reason, the thermistor is also required to be a small chip type. However, the conventional chip type thermistor of this type has the configuration shown in FIG. That is, as shown in FIG. 6, for example, the electrodes 2 are provided on both side surfaces of the alumina substrate 1, and the thermistor body 3 is formed between the electrodes 2.
【0003】または、図7に示すように、アルミナ基板
1の上面に下部電極4を配設し、該下部電極4の上部に
サーミスタ体3を形成し、更にこのサーミスタ体3のを
サンドイツチするように上部電極5で挟んだ構成であつ
た。Alternatively, as shown in FIG. 7, a lower electrode 4 is provided on the upper surface of an alumina substrate 1, a thermistor body 3 is formed on the lower electrode 4, and the thermistor body 3 is further sandwiched. The upper electrode 5 was sandwiched between them.
【0004】[0004]
【発明が解決使用とする課題】しかしながら、図6に示
すサーミスタは、電極間の距離が離れているため、どう
しても抵抗値が大きくなり、低抵抗化は殆ど困難であつ
た。例えば、従来のこの種の製品では、抵抗値は、略1
MΩ〜100MΩの範囲とすることができるのみであつ
た。また、抵抗値のバラツキを抑えることも難しく、バ
ラツキはプラスマイナス30%程度になつてしまつてい
た。However, in the thermistor shown in FIG. 6, since the distance between the electrodes is large, the resistance value inevitably becomes large, and it is almost difficult to reduce the resistance. For example, in a conventional product of this type, the resistance value is about 1
It could only be in the range of MΩ to 100 MΩ. Further, it is difficult to suppress the variation in the resistance value, and the variation is about ± 30%.
【0005】また、図7に示す構成では、各部分の形成
時の厚みバラツキや、電極4,5とサーミスタ体3との
接合面積のバラツキから、特に大きな抵抗値のバラツキ
が発生してしまい、またトリミングも出来ないため、略
50%以上のバラツキが避けられず、抵抗値誤差の少な
いサーミスタを製造することは困難であつた。更に、上
部電極5を形成するため、どうしても上面に凹凸が発生
し、製造設備上のトラブル発生の原因となり、量産性が
落ちるという欠点があつた。Further, in the structure shown in FIG. 7, particularly large variations in resistance value occur due to variations in thickness when forming each portion and variations in the bonding area between the electrodes 4 and 5 and the thermistor body 3. Further, since the trimming cannot be performed, a variation of about 50% or more cannot be avoided, and it is difficult to manufacture a thermistor having a small resistance value error. Further, since the upper electrode 5 is formed, unevenness is inevitably generated on the upper surface, which causes troubles in the manufacturing equipment, and there is a drawback that mass productivity is deteriorated.
【0006】[0006]
【課題を解決するための手段】本発明は、上述の課題を
解決することを目的としてなされたもので、上述の課題
を解決する一手段として以下の構成を備える。即ち、所
定大きさのアルミナ基板上にサーミスタ体を形成して成
るチツプ型サーミスタであつて、アルミナ基板と、該ア
ルミナ基板上に所定距離離反して設けられた両電極基部
より相手電極基部方面に交互に所定長さ延出した電極端
子と、該電極端子上にサーミスタ体層を形成してチツプ
型サーミスタを構成する。The present invention has been made for the purpose of solving the above-mentioned problems, and has the following structure as one means for solving the above-mentioned problems. That is, a chip-type thermistor formed by forming a thermistor body on an alumina substrate of a predetermined size, wherein the alumina substrate and both electrode bases provided on the alumina substrate at a predetermined distance apart from each other are provided on the opposite electrode base surface. A chip type thermistor is formed by alternately forming electrode terminals extending a predetermined length and forming a thermistor body layer on the electrode terminals.
【0007】または、所定大きさのアルミナ基板上に配
設され上部にサーミスタ体を形成して成るチツプ型サー
ミスタにおけるサーミスタ電極であつて、該サーミスタ
電極は、アルミナ基板に所定間隔をもつて配設された両
電極基部と、該両電極基部より相手電極基部方面に交互
に所定長さ延出した電極端子部とで構成される。更に、
以上の電極は銀−パラジウム系厚膜グレースであり、サ
ーミスタ体はMn,Co,Fe,Cu系複合酸化物を主
体としたグレースとする。Alternatively, a thermistor electrode in a chip type thermistor which is provided on an alumina substrate of a predetermined size and has a thermistor body formed on the upper part thereof, the thermistor electrode being provided on the alumina substrate at a predetermined interval. Both of the electrode bases thus formed and electrode terminal portions alternately extending from the both electrode bases toward the mating electrode base by a predetermined length. Furthermore,
The above electrode is a silver-palladium-based thick film grace, and the thermistor body is a grace mainly composed of Mn, Co, Fe, and Cu-based composite oxides.
【0008】[0008]
【作用】以上の構成において、所定大きさのアルミナ基
板上に、所定間隔をもつて配設された両電極基部と該両
電極基部より相手電極基部方面に交互に所定長さ延出し
た電極端子部を形成する電極材料を所定厚さに形成する
電極形成工程と、該電極形成工程に続き該電極形成工程
で形成した電極上にサーミスタ体を形成するサーミスタ
形成工程と、該サーミスタ形成工程で形成されたサーミ
スタ体を加熱焼結する焼結工程とにより上記サーミスタ
を形成することにより、量産効果の高い、しかも電極間
抵抗値も低くできるチツプ型サーミスタ、およびサーミ
スタ電極を提供できる。In the above construction, both electrode bases arranged at a predetermined interval on an alumina substrate of a predetermined size and electrode terminals alternately extending from the two electrode bases toward the mating electrode base by a predetermined length. An electrode forming step of forming an electrode material forming a portion to a predetermined thickness, a thermistor forming step of forming a thermistor body on the electrode formed in the electrode forming step following the electrode forming step, and a thermistor forming step By forming the thermistor by a sintering process of heating and sintering the formed thermistor body, it is possible to provide a chip-type thermistor and a thermistor electrode which have a high mass-production effect and can have a low interelectrode resistance value.
【0009】[0009]
【実施例】以下、図面を参照して本発明に係る一実施例
を詳細に説明する。図1乃至図5は本発明に係る一実施
例を説明するための図であり、図1は本発明に係る一実
施例の構成を示す一部切り欠き斜視図、図2は本実施例
のサーミスタ体3を形成する前の電極配設状態を示す上
面図、図3は図1のX−X′面断面図、図4は図1Y−
Y′面断面図、図5は本実施例の製造工程図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described in detail below with reference to the drawings. 1 to 5 are views for explaining one embodiment according to the present invention, FIG. 1 is a partially cutaway perspective view showing a configuration of one embodiment according to the present invention, and FIG. FIG. 3 is a top view showing a state in which electrodes are arranged before forming the thermistor body 3, FIG. 3 is a sectional view taken along the line XX ′ in FIG. 1, and FIG.
FIG. 5 is a cross-sectional view of the Y'plane, and FIG. 5 is a manufacturing process diagram of this embodiment.
【0010】まず、図1乃至図4を参照して本発明に係
る一実施例の構成を説明する。図中、10は図5又は図
6に示すアルミナ基板1と同様のアルミナ基板であり、
本実施例ではアルミナ96%の焼結体となつている。1
1及び21はアルミナ基板10上に配設された両電極基
部であり、それぞれの電極基部11及び21より相手電
極基部方面に交互に所定長さ延出した電極端子12及び
22とにより本実施例のサーミスタ電極を形成してい
る。この電極形成状態は、図2に明らかな如く、各電極
基部11及び21、電極端子12及び22の互いの電極
配設間隔は略一定である。First, the configuration of an embodiment according to the present invention will be described with reference to FIGS. In the figure, 10 is an alumina substrate similar to the alumina substrate 1 shown in FIG. 5 or 6,
In this embodiment, the sintered body is 96% alumina. 1
Reference numerals 1 and 21 denote both electrode base portions arranged on the alumina substrate 10, and the present embodiment is constituted by the electrode terminals 12 and 22 alternately extending from the respective electrode base portions 11 and 21 toward the mating electrode base portion by a predetermined length. Forming the thermistor electrode. In this electrode formation state, as is apparent from FIG. 2, the electrode arrangement intervals of the electrode base portions 11 and 21 and the electrode terminals 12 and 22 are substantially constant.
【0011】そして、この様な電極部の上部にサーミス
タ体23を形成している。本実施例では、この電極とし
ては、銀−パラジウム系厚膜グレースを用いて、また、
サーミスタ体はMn,Co,Fe,Cu系複合酸化物を
主体としたグレースを用いて、それぞれ後述する様にこ
のグレースを加熱焼成している。以上に示す本実施例の
チツプ型サーミスタの製造方法を、図5の工程図に従つ
て以下説明する。A thermistor body 23 is formed on the upper portion of such an electrode portion. In this embodiment, a silver-palladium-based thick film grace is used as this electrode,
As the thermistor body, a grace mainly composed of Mn, Co, Fe, and Cu-based complex oxide is used, and this grace is heated and baked as described later. The method of manufacturing the chip type thermistor of the present embodiment shown above will be described below with reference to the process chart of FIG.
【0012】尚、以下の説明は1つのサーミスタのみを
製造する場合に限られるものではなく、複数のサーミス
タを同時に多数製造できることは勿論である。そして、
最終工程で各1つのサーミスタに分離すればよい。ま
ず、工程1のアルミナ基板10を所定大きさに形成する
アルミナ基板製造工程を実行し、所定製造単位の大きさ
のアルミナ基板を製作する。この単位は、任意の大きさ
であり、1つのサーミスタ毎に作成しても、例えば数十
個同時に作成してもよく、それぞれの場合に側して製作
すればよい。The following description is not limited to the case where only one thermistor is manufactured, and it goes without saying that a plurality of thermistors can be simultaneously manufactured. And
In the final step, each thermistor may be separated. First, the alumina substrate manufacturing process of forming the alumina substrate 10 in step 1 in a predetermined size is performed to manufacture an alumina substrate in a size of a predetermined manufacturing unit. This unit has an arbitrary size, and it may be prepared for each thermistor, for example, several tens of them may be prepared at the same time, and it may be produced depending on each case.
【0013】続いて、工程2で、アルミナ基板10の上
面に、図2に示す如き、それぞれの電極基部11,21
及び相手電極基部方面に交互に所定長さ延出した電極端
子12,22を形成する電極印刷工程を実行する。本実
施例では、図2に示す様な電極パターン11,12,2
1,22を、印刷/エツチング等の方法でアルミナ基板
10上に形成する。そして、工程3で例えば850°C
で約十分間加熱焼成してサーミスタ電極を形成する電極
焼成工程を実行する。Then, in step 2, on the upper surface of the alumina substrate 10, as shown in FIG.
Then, the electrode printing step of forming the electrode terminals 12 and 22 extending alternately by a predetermined length on the opposite electrode base surface is performed. In this embodiment, the electrode patterns 11, 12, 2 as shown in FIG.
1, 22 are formed on the alumina substrate 10 by a method such as printing / etching. Then, in step 3, for example, 850 ° C.
Then, an electrode firing step of forming a thermistor electrode by heating and firing for about 10 minutes is performed.
【0014】そして、工程4でアルミナ基板10の電極
パターン11,12,21,22上にサーミスタ体23
を形成し、これを工程5で例えば850°Cで約十分間
加熱焼成している。なお、上述した例では、電極の焼成
を工程3で、サーミスタ体23の焼成を工程5で、それ
ぞれ別個に行う例を示したが、本実施例はこの例に限る
ものではなく、工程2に続き工程4を実行し、次に電極
パターン及びサーミスタ体とを一度に焼成する工程を行
なつても良い。更に、この場合に、アルミナ基板10上
の電極等をトリミングすることも可能であり、最終的な
製品とする以前にパターン部をトリミングすることによ
り、抵抗値等のバラツキを更に低く抑えることができ
る。従って、抵抗値バラツキを抑える必要のある場合に
はトリミングを行う事が必須である。Then, in step 4, the thermistor body 23 is formed on the electrode patterns 11, 12, 21, 22 of the alumina substrate 10.
Is formed, and this is heated and baked in step 5 at, for example, 850 ° C. for about ten minutes. In the example described above, the electrodes are fired in the step 3 and the thermistor body 23 is fired in the step 5, respectively, but the present embodiment is not limited to this example. You may perform the following process 4, and then perform the process of baking an electrode pattern and a thermistor body at once. Further, in this case, it is possible to trim the electrodes and the like on the alumina substrate 10, and by trimming the pattern portion before the final product, it is possible to further suppress variations in resistance and the like. .. Therefore, it is essential to perform trimming when it is necessary to suppress variations in resistance value.
【0015】そして、最後に工程6で、必要に応じてサ
ーミスタを1つのチツプ毎に分離成形する。例えば、同
時に多数のサーミスタを一括製作した場合には、ここ
で、個々のチツプ毎に分離成形し、1つのチツプ毎に製
作した場合には周辺部の整形等を行う。この様にして製
作した本実施例のチツプサーミスタは、例えば、略幅
1.23mmプラスマイナス0.1mm、略長さ2.0
mmプラスマイナス0.1mm、アルミナ基板10の厚
さ略0.5mmプラスマイナス0.1mm、電極部の厚
さ略10μmプラスマイナス2μm、サーミスタ体23
の厚さ略25μmmプラスマイナス5μmに形成する。
或いは、他の例として、例えば、略幅1.6mmプラス
マイナス0.1mm、略長さ3.2mmプラスマイナス
0.1mm、アルミナ基板10の厚さ略0.6mmプラ
スマイナス0.1mm、電極部の厚さ略10μmプラス
マイナス2μm、サーミスタ体23の厚さ略25μmm
プラスマイナス5μmに形成する。Finally, in step 6, if necessary, the thermistor is separately molded for each chip. For example, when a large number of thermistors are manufactured at the same time, separate molding is performed for each chip, and when the chips are manufactured for each chip, the peripheral portion is shaped. The chip thermistor of this embodiment manufactured in this manner has, for example, a width of about 1.23 mm plus or minus 0.1 mm and a length of about 2.0.
mm plus or minus 0.1 mm, the thickness of the alumina substrate 10 is approximately 0.5 mm plus or minus 0.1 mm, the thickness of the electrode portion is approximately 10 μm plus or minus 2 μm, and the thermistor body 23
Of about 25 μm plus or minus 5 μm.
Alternatively, as another example, for example, a width of approximately 1.6 mm plus or minus 0.1 mm, a length of approximately 3.2 mm plus or minus 0.1 mm, a thickness of the alumina substrate 10 of approximately 0.6 mm plus or minus 0.1 mm, an electrode portion Thickness of the thermistor body 23 is about 25 μmm
It is formed within plus or minus 5 μm.
【0016】本実施例では、抵抗値が100Ω〜100
KΩでトリミング等を全く行わない場合でも抵抗値のバ
ラツキをプラスマイナス30%とすることができる。な
お、抵抗値のバラツキを低く抑えるため、トリミングを
実行した場合には、更に抵抗値のバラツキを低く抑える
ことができ、略プラスマイナス五%以内に抑えることが
できる。In the present embodiment, the resistance value is 100Ω to 100Ω.
Even if trimming or the like with KΩ is not performed at all, the variation in the resistance value can be set to plus or minus 30%. In addition, in order to suppress the variation in the resistance value to a low level, it is possible to further reduce the variation in the resistance value when trimming is performed, and it is possible to suppress the variation to approximately plus or minus 5%.
【0017】以上の説明の様に、本実施例によれば、所
定大きさのアルミナ基板上に、所定間隔をもつて配設さ
れた両電極基部と該両電極基部より相手電極基部方面に
交互に所定長さ延出した電極端子部を形成する電極材料
を所定厚さに形成する電極形成工程と、該電極形成工程
に続き該電極形成工程で形成した電極上にサーミスタ体
を形成するサーミスタ形成工程と、該サーミスタ形成工
程で形成されたサーミスタ体を加熱焼結する焼結工程と
により上記サーミスタを形成することにより、量産効果
の高い、しかも電極間抵抗値も低くでき、抵抗値のバラ
ツキを低く抑えることができるサーミスタを提供でき
る。As described above, according to the present embodiment, both electrode base portions arranged at a predetermined interval on the alumina substrate of a predetermined size and the electrode base portions of the two electrode base portions alternate with each other. An electrode forming step of forming an electrode material having a predetermined thickness to form an electrode terminal portion extending a predetermined length, and a thermistor forming of forming a thermistor body on the electrode formed in the electrode forming step following the electrode forming step By forming the thermistor by a process and a sintering process in which the thermistor body formed in the thermistor forming process is heated and sintered, the mass production effect is high, and the interelectrode resistance value can be lowered, resulting in a variation in the resistance value. A thermistor that can be kept low can be provided.
【0018】[0018]
【発明の効果】以上説明した様に本発明によれば、電極
間の距離を任意かつ一定にすることができ、低抵抗値の
サーミスタを提供できるとともに、その抵抗値のバラツ
キも最少に抑えることができる。As described above, according to the present invention, the distance between the electrodes can be arbitrarily and constant, a thermistor having a low resistance value can be provided, and the variation in the resistance value can be suppressed to the minimum. You can
【図1】本発明に係る一実施例の構成を示す一部切り欠
き斜視図である。FIG. 1 is a partially cutaway perspective view showing a configuration of an embodiment according to the present invention.
【図2】本実施例のサーミスタ体を形成する前の電極配
設状態を示す上面図である。FIG. 2 is a top view showing an electrode arrangement state before forming the thermistor body of the present embodiment.
【図3】図1のX−X′面断面図である。FIG. 3 is a sectional view taken along the line XX ′ in FIG.
【図4】図1のX−X′面断面図である。FIG. 4 is a sectional view taken along the line XX ′ of FIG.
【図5】本実施例の製造工程図である。FIG. 5 is a manufacturing process diagram of the present embodiment.
【図6】、FIG.
【図7】従来のサーミスタの例を示す図である。FIG. 7 is a diagram showing an example of a conventional thermistor.
1,10 アルミナ基板 2,4 電極 5 上部電極 11,21 電極基部 12,22 電極端子 3,23 サーミスタ体 1,10 Alumina substrate 2,4 Electrode 5 Upper electrode 11,21 Electrode base 12,22 Electrode terminal 3,23 Thermistor body
Claims (5)
タ体を形成して成るチツプ型サーミスタであつて、 アルミナ基板と、該アルミナ基板上に所定距離離反して
設けられた両電極基部より相手電極基部方面に交互に所
定長さ延出した電極端子と、該電極端子上にサーミスタ
体層を形成してなることを特徴とするチツプ型サーミス
タ。1. A chip-type thermistor comprising a thermistor body formed on an alumina substrate of a predetermined size, comprising an alumina substrate and a counter electrode composed of both electrode bases provided on the alumina substrate at a predetermined distance from each other. A chip-type thermistor comprising: electrode terminals extending alternately by a predetermined length toward the base and a thermistor body layer formed on the electrode terminals.
あり、サーミスタ体はMn,Co,Fe,Cu系複合酸
化物を主体としたグレースであることを特徴とする請求
項1記載のチツプ型サーミスタ。2. The chip type according to claim 1, wherein the electrode is a silver-palladium-based thick film grace and the thermistor body is a grace mainly composed of Mn, Co, Fe, and Cu-based composite oxides. Thermistor.
上部にサーミスタ体を形成して成るチツプ型サーミスタ
におけるサーミスタ電極であつて、 該サーミスタ電極は、アルミナ基板に所定間隔をもつて
配設された両電極基部と、該両電極基部より相手電極基
部方面に交互に所定長さ延出した電極端子部とで構成さ
れることを特徴とするサーミスタの電極。3. A thermistor electrode in a chip type thermistor which is provided on an alumina substrate of a predetermined size and has a thermistor body formed on the upper part thereof, the thermistor electrode being provided on the alumina substrate at a predetermined interval. An electrode for a thermistor, comprising: both electrode bases formed and electrode terminal portions alternately extending from the both electrode bases toward a mating electrode base by a predetermined length.
あり、サーミスタ体はMn,Co,Fe,Cu系複合酸
化物を主体としたグレースであることを特徴とする請求
項3記載のチツプ型サーミスタの電極。4. The chip type according to claim 3, wherein the electrode is a silver-palladium-based thick film grace, and the thermistor body is a grace mainly composed of Mn, Co, Fe, and Cu-based composite oxides. Electrode of the thermistor.
タ体を形成して成るチツプ型サーミスタの製造方法であ
つて、 所定大きさのアルミナ基板上に、所定間隔をもつて配設
された両電極基部と該両電極基部より相手電極基部方面
に交互に所定長さ延出した電極端子部を形成する電極材
料を所定厚さに形成する電極形成工程と、該電極形成工
程に続き該電極形成工程で形成した電極上にサーミスタ
体を形成するサーミスタ形成工程と、該サーミスタ形成
工程で形成された少なくともサーミスタ体を加熱焼結す
る焼結工程とを備えることを特徴とするチツプ型サーミ
スタの製造方法。5. A method for manufacturing a chip type thermistor, which comprises forming a thermistor body on an alumina substrate of a predetermined size, wherein both electrodes are arranged on the alumina substrate of a predetermined size with a predetermined interval. An electrode forming step of forming an electrode material having a predetermined thickness to form an electrode terminal portion that alternately extends a predetermined length from the base portion and the opposite electrode base portion toward the opposite electrode base surface; and the electrode forming step and the electrode forming step. 7. A method for manufacturing a chip type thermistor, comprising: a thermistor forming step of forming a thermistor body on the electrode formed in 1 .; and a sintering step of heating and sintering at least the thermistor body formed in the thermistor forming step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3297082A JPH05135914A (en) | 1991-11-13 | 1991-11-13 | Chip type thermistor and thermistor electrode and manufacture of chip type thermistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3297082A JPH05135914A (en) | 1991-11-13 | 1991-11-13 | Chip type thermistor and thermistor electrode and manufacture of chip type thermistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05135914A true JPH05135914A (en) | 1993-06-01 |
Family
ID=17841970
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3297082A Pending JPH05135914A (en) | 1991-11-13 | 1991-11-13 | Chip type thermistor and thermistor electrode and manufacture of chip type thermistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05135914A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6172592B1 (en) * | 1997-10-24 | 2001-01-09 | Murata Manufacturing Co., Ltd. | Thermistor with comb-shaped electrodes |
-
1991
- 1991-11-13 JP JP3297082A patent/JPH05135914A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6172592B1 (en) * | 1997-10-24 | 2001-01-09 | Murata Manufacturing Co., Ltd. | Thermistor with comb-shaped electrodes |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3812377B2 (en) | Through-type three-terminal electronic components | |
JPH10247601A (en) | Ntc thermistor element | |
JP2013539605A (en) | Resistance element and manufacturing method thereof | |
JPH05135914A (en) | Chip type thermistor and thermistor electrode and manufacture of chip type thermistor | |
CN1989578A (en) | Chip resistor and its manufacturing method | |
JP2888020B2 (en) | Negative multilayer thermistor | |
JP4046178B2 (en) | Chip resistor and manufacturing method thereof | |
JPH05135915A (en) | Chip type thermistor and manufacture thereof | |
JPS636121B2 (en) | ||
JP4512004B2 (en) | Chip resistor | |
JPH02303005A (en) | Manufacture of thick film resistance element | |
JPH0831393B2 (en) | Multilayer ceramic capacitor with fuse | |
JP2002151306A (en) | Electrical component and manufacturing method thereof | |
JP3058305B2 (en) | Thermistor and manufacturing method thereof | |
JP3214440B2 (en) | Method of manufacturing resistance element and resistance element | |
JPH0661014A (en) | Laminated thermistor | |
JP2000340413A (en) | Multiple chip resistor and manufacturing method thereof | |
JP3557762B2 (en) | Multiple chip resistor and mounting board for mounting it | |
JP2769625B2 (en) | Method of manufacturing multilayer printed filter for electric circuit | |
JPH077102U (en) | Fixed resistor | |
JP2003124007A (en) | Ntc thermistor element | |
JP2000114006A (en) | Resistance element | |
JP3307314B2 (en) | Multilayer resistance element and method of manufacturing the same | |
JPH0774005A (en) | Chip-type ceramic thermistor | |
JPH04317303A (en) | Method of manufacturing positive temperature coefficient thermistor |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19990226 |