JPH05130334A - Polygon mirror driving device - Google Patents

Abstract

(57) [Abstract] [Purpose] Fully digital phase comparator 40 in the control loop.
By providing the drive unit 39 in which the external parts are omitted, good control characteristics are obtained, and a low-noise, light and thin polygon mirror drive device is provided. A digital phase comparator 40 comprising a counter 41 for counting a reference clock, a latch circuit 42 for latching the data of the counter 41 with an FG signal, and a D / A converter 43 for digital-to-analog conversion of the latch circuit 42.
And a polygon mirror driving device including a power amplifier 21 for amplifying the output and a phase switching power amplifier 44.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polygon mirror driving device in which a motor unit equipped with a polygon mirror for optical scanning used in a laser beam printer or the like and a driving unit are integrated, and particularly, the structure of the driving unit. Regarding

[0002]

2. Description of the Related Art An example related to the prior art will be described with reference to FIGS. FIG. 4 is a diagram showing an outline of a polygon mirror driving device having a motor unit and a driving unit.

First, in FIG. 4, 1 is a base material, 2 is a printed circuit board, a coil for driving a motor, a coil of a frequency generator (hereinafter abbreviated as FG) for generating a frequency proportional to the rotation of the motor, and a drive IC 9. , A connector 8 for external connection, and other electronic components 10 are mounted. The printed circuit board 2 is fixed to the base material 1 with screws 4a and 4b via spacers 3a and 3b. The bearing portion 5 is integrated with the base material 1 and supports the rotor shaft 6. The rotor 7 has a motor magnet and an FG magnet arranged on the opposite surface of the printed circuit board 2. The rotor 7 is equipped with a polygon mirror 11 having 2 to 16 faces. This is a one-piece polygon mirror driving device, and the rotation speed of the motor is 3600 to 15000.
Selected in rpm.

In FIG. 5, a dotted line frame 13 represents a drive unit, and an IC
It is a convertible part. Reference numeral 14 is an oscillator that generates a stable clock with a vibrator 15 such as a crystal. Reference numeral 17 denotes a frequency divider, which is a load terminal 16 and changes the reference clock according to the motor speed. The phase comparator 18 compares the phase of the FG signal shaped by the operational amplifier 22 with the phase of the reference clock, and outputs the phase delay amount at the two terminals of the pulse width. Charge pump 1
9 is a low impedance and outputs an output with different polarities while the amount of slow speed is generated. This is shown in FIG.
It is (a). T0 represents the cycle of the reference clock. Figure 6
In (a), downwards are delayed and upwards are advanced. The impedance is high during the period when the slow speed amount is not generated. An integrated circuit is formed by the inverting amplifier 20, resistors R1 and R2 that define an integration constant, and a capacitor C, and the charge pump 19 is integrated. The integrated voltage is power-amplified by the power amplifier 21. Reference numerals 29, 30 and 31 denote position detectors for detecting the position of the rotor 7 of the motor, such as Hall elements for driving the motor in three phases. Reference numerals H1, H2, and H3 are position detectors 2.
The position signals or terminals of 9, 30, and 31 are represented.

The operational amplifiers 23, 24 and 25 have position signals H.
Waveform shaping of 1, H2, and H3. The waveform-shaped position signal is introduced into the phase switching power amplifier 26. The phase switching power amplifier 26 sends excitation power to the three-phase motor coil 27. The phase switching power amplifier 26 receives a predetermined power from the power amplifier 21.

The power supply of the drive unit 13 uses a 5V power supply at the terminal 3
2, a high-voltage power supply of 12 to 30 V is supplied from the terminal 33, which varies depending on the rotation speed, and is supplied to the charge pump 19, the inverting amplifier 20, the power amplifier 21, and the phase switching power amplifier 26.

FIG. 6B shows the rising characteristics of the motor drive according to the above-mentioned conventional description. Initially, the phase of the phase comparator 18 has a large number of delay signals, so that the output of the integrating circuit constituted by the inverting amplifier 20 once becomes almost a high voltage power supply voltage and overshoots more than the target control voltage. As a result, the speed also greatly overshoots the target speed, the rising characteristics are poor, and stable rotation may take several tens of seconds.

The above is the motor unit and drive unit 1 according to the prior art.
It was a body polygon mirror drive.

The size and weight of the polygon mirror driving device is approximately 50 × 70 × 25 mm and about 100 g.

[0010]

However, in the above-mentioned conventional technique, vibration noise is generated due to overshoot at the time of starting, and since an analog integrator circuit is used, external parts are required when integrated into an IC, which is troublesome during assembly. In addition to the point that the charge pump and the inverting amplifier need to have a large low output impedance and large gain, there is a problem that an area is required on the wafer.

Therefore, the present invention solves these problems, and an object of the present invention is to provide a light and thin polygon mirror driving device which makes a phase comparator completely digital so that external parts are unnecessary and has low noise. In offer.

[0012]

According to the present invention, a reference clock is counted in a polygon mirror driving device in which a motor section in which a polygon mirror is arranged on a rotor of a motor and a driving section for driving the motor section are not provided as one body. Counter and a latch circuit for latching the data of the counter every time the FG signal of the frequency generator that emits a signal in proportion to the speed of the motor, and a digital-analog conversion of the data of the latch circuit
/ A, a power amplifier for power-amplifying the output of the D / A converter, and a plurality of signals of a position detector which is supplied with power from the power amplifier and detects the rotor position of the motor. And a phase switching power amplifier for generating a phase switching signal to excite the drive coil of the motor.

Further, the digital phase comparator includes an adder for adding the data of the counter and the data before the latch circuit.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing a concrete configuration of an embodiment of the present invention. The same numbers and reference numerals as in the above figures have the same functions.

A dotted frame 39 indicates a portion of the drive unit which can be integrated into an IC. Reference numeral 40 denotes a completely digital comparator, which includes a counter 41 for counting the reference clock from the frequency divider 17, a latch circuit 42 for fetching the data of the counter 41 each time an FG signal arrives, and a digital signal for the data of the latch circuit 42. It is composed of a D / A converter for analog conversion. The D / A converter 43 and the power amplifier 21 are directly supplied with power from the high voltage power supply 33.

The power or voltage of the power amplifier 21 is related to the control amount of the motor, and becomes the power supplied to the phase switching power amplifier 44.

The phase switching power amplifier 43 includes the operational amplifiers 23, 24 and 25 for shaping the position signals H1, H2 and H3 of the position detectors 29, 30 and 31 shown in FIG. The three-phase output of the phase switching power amplifier 44 gives control power to the motor coil 27.

The above forms the control loop of an embodiment of the present invention. A counter 41 forming a digital phase comparator,
The capacity of the latch circuit 42 and the D / A converter is 4 to 12 bits.

The accuracy (accuracy) or stability of the rotation speed depends not only on this capacity, but also on many factors such as oscillator accuracy, FG signal detection accuracy, rotor eccentricity, shaft accuracy, and drive coil generated torque variation. To be done.

An example of the operation of the digital phase comparator 40 is shown in FIG.
Described in.

FIG. 2A shows the data of the counter 41 fetched by the latch circuit 42 in terms of time width. This is the control amount of the motor and is also the phase difference between the reference clock and the FG signal.

FIG. 2B shows the data of the latch circuit 42 as D
It is a figure which shows the voltage B and the speed A which were converted into analog by the / A converter 43. Incidentally, it is shown from the middle of the startup.

In the figure, T0 represents the full count cycle of the counter 41, which is also the cycle corresponding to the motor target rotation speed.

As shown in FIG. 5, since the analog integrator circuit is not used, a large overshoot of the control voltage does not occur, so that a large overshoot of the rotation speed does not occur.
Therefore, noise generation at startup is small. In addition, it has a feature that it is strong against external disturbance such as impact at the steady state.

Next, another embodiment of the present invention will be described with reference to FIG. FIG. 3 shows another configuration example of the digital phase comparator.

An adder 45 is added to the digital phase comparator 40 of FIG. 1 to change it to a recursive type. The operation of the adder 45 continuously executes the data of the latch circuit 42 and the data of the counter 41.

When the FG signal arrives, the operation result of the adder 45 is latched in the latch circuit 42. In this way, since past data remains, so-called PID control including an integral element, a speed ratio sequence element, and a differential element that alleviates a sudden control amount is performed, and control characteristics can be further improved.

Even if such a digital phase comparator is provided, the above-mentioned conventional charge pump 19 and inverting amplifier 20 occupy a large area on the wafer. Most of the comparators can be replaced, and the ratio of the power amplifiers 21 to 26 or 44 to the whole is insignificant, which does not increase the cost. The oscillator 15 is unavoidable, but the resistance R
1 and R2 and the capacitor C can be omitted to facilitate the assembly.

It should be noted that it is better to limit the variable range to 1/2 to 1 of the total voltage by adding 1 bit to the most significant digit of the capacity of the D / A converter 43 for obtaining the control voltage. Is obtained.

[0030]

According to the above-described structure of the present invention, by forming a completely digital phase comparator in the control loop, good control characteristics can be obtained and low noise can be achieved.
When it is realized, the effect that the external parts can be omitted is great.

[Brief description of drawings]

FIG. 1 is a diagram showing a specific configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing an operation example of FIG.

FIG. 3 is a diagram showing another configuration example of the digital phase comparator of the present invention.

FIG. 4 is a sectional view of a polygon mirror driving device according to the present invention.

FIG. 5 is a diagram showing a conventional example.

FIG. 6 is a diagram showing an operation example of FIG. 5;

[Explanation of symbols]

1 Base Substrate 7 Rotor 11 Polygon Mirror 14 Oscillator 17 Frequency Divider 18, 40 Phase Comparator 21 Power Amplifier 26, 44 Phase Switching Power Amplifier 27 Motor Coil 29, 30, 31 Position Detector 41 Counter 42 Latch Circuit 43 Digital Analog (D / A) converter 45 Adder 28 Frequency generator

Claims (2)

[Claims] 1. A polygon mirror driving device comprising a motor unit in which a polygon siller is arranged on a rotor of a motor and a driving unit for driving the motor unit, wherein the driving unit counts a reference clock. A counter, a latch circuit for latching the data of the counter every time an FG signal of a frequency generator emits a signal in proportion to the speed of the motor, and a D / A converter for converting the data of the latch circuit into digital / analog. A digital phase comparator, a power amplifier for power-amplifying the output of the D / A converter, and a phase switching signal from a plurality of signals from a position detector which is supplied with power from the power amplifier and detects the rotor position of the motor. And a phase-switching power amplifier for exciting the drive coil of the motor to generate a polygon mirror drive device. 2. The polygon mirror driving device according to claim 1, wherein the digital phase comparator includes an adder that adds the data of the counter and the data before the latch circuit.