JPH05129522A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH05129522A JPH05129522A JP28501491A JP28501491A JPH05129522A JP H05129522 A JPH05129522 A JP H05129522A JP 28501491 A JP28501491 A JP 28501491A JP 28501491 A JP28501491 A JP 28501491A JP H05129522 A JPH05129522 A JP H05129522A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- electrode
- insulating layer
- aluminum electrode
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体装置特にそのキ
ャパシタの構成に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to the structure of its capacitor.
【0002】[0002]
【従来の技術】図4は従来例を示した断面図であり、シ
リコン集積回路におけるキャパシタの構成を示したもの
である。2. Description of the Related Art FIG. 4 is a sectional view showing a conventional example and shows a structure of a capacitor in a silicon integrated circuit.
【0003】シリコン基板51の主面側に、フィ―ルド
絶縁層52、酸化シリコンを用いた層間絶縁層53、窒
化シリコンを用いたキャパシタ用絶縁層54、モリブデ
ンを用いたキャパシタ用電極55およびアルミニウムを
用いたキャパシタ用電極56(アルミニウム電極)が形
成されている。A field insulating layer 52, an interlayer insulating layer 53 made of silicon oxide, a capacitor insulating layer 54 made of silicon nitride, a capacitor electrode 55 made of molybdenum, and aluminum are provided on the main surface side of the silicon substrate 51. Is used to form a capacitor electrode 56 (aluminum electrode).
【0004】[0004]
【発明が解決しようとする課題】上記従来例では、キャ
パシタ用絶縁層54の膜厚が薄くなると(特に10nm
以下)、キャパシタの不良が増大することが確認され
た。この理由としては、熱処理工程の際にアルミニウム
電極56の表面にヒロックが形成され、このヒロックの
ために局部的な電界集中が生じ、その結果キャパシタの
絶縁耐圧が低下するためと考えられる。In the above-mentioned conventional example, when the film thickness of the capacitor insulating layer 54 becomes thin (especially 10 nm).
Below), it was confirmed that the number of defective capacitors increased. The reason for this is considered to be that hillocks are formed on the surface of the aluminum electrode 56 during the heat treatment process, and local concentration of an electric field occurs due to the hillocks, resulting in a decrease in the dielectric strength voltage of the capacitor.
【0005】本発明の目的は、キャパシタの少なくとも
一方の電極がアルミニウム電極で構成された半導体装置
において、キャパシタの不良を減少させることである。An object of the present invention is to reduce defective capacitors in a semiconductor device in which at least one electrode of the capacitor is formed of an aluminum electrode.
【0006】[0006]
【課題を解決するための手段】本発明における半導体装
置は、半導体基板の主面側に形成されたキャパシタの少
なくとも一方の電極がアルミニウム電極で構成された半
導体装置において、上記キャパシタのキャパシタ用絶縁
層と上記アルミニウム電極との間に導電性の保護層を形
成したことを特徴とする。上記保護層は、高融点金属ま
たは高融点金属化合物を用いて形成されていることが好
ましい。A semiconductor device according to the present invention is a semiconductor device in which at least one electrode of a capacitor formed on the main surface side of a semiconductor substrate is formed of an aluminum electrode. And a conductive protective layer is formed between the aluminum electrode and the aluminum electrode. The protective layer is preferably formed using a refractory metal or a refractory metal compound.
【0007】[0007]
【実施例】図1は、本発明の第1実施例を示した断面図
であり、シリコン集積回路におけるキャパシタの構成を
示したものである。シリコン基板11の主面側には、フ
ィールド絶縁層12、酸化シリコンを用いた層間絶縁層
13(膜厚500nm程度)、窒化シリコンを用いたキ
ャパシタ用絶縁層14(膜厚5〜10nm程度)、モリ
ブデン等の高融点金属を用いた下側キャパシタ用電極1
5(膜厚200nm程度)、上側キャパシタ用電極とな
るアルミニウム電極16(膜厚800〜1000nm程
度)、モリブデン等の高融点金属を用いた導電性の保護
層17(膜厚50〜100nm程度)が、それぞれ形成
されている。キャパシタ用絶縁層14、下側キャパシタ
用電極15、アルミニウム電極16および保護層17に
より、キャパシタが構成される。なお、キャパシタ用電
極15および保護層17には、高融点金属のほかに、高
融点金属化合物(高融点金属とシリコンとの化合物(シ
リサイド)、高融点金属の窒化物(例えばTiN)等)
を用いてもよい。このように、キャパシタ用絶縁層14
とアルミニウム電極16との間に保護層17を形成した
ため、熱処理の際にヒロックの形成が抑制され、キャパ
シタの絶縁耐圧が向上する。FIG. 1 is a sectional view showing a first embodiment of the present invention, showing the structure of a capacitor in a silicon integrated circuit. On the main surface side of the silicon substrate 11, a field insulating layer 12, an interlayer insulating layer 13 using silicon oxide (film thickness of about 500 nm), a capacitor insulating layer 14 using silicon nitride (film thickness of about 5 to 10 nm), Lower capacitor electrode 1 using refractory metal such as molybdenum
5 (thickness: about 200 nm), an aluminum electrode 16 (thickness: about 800 to 1000 nm) to be an upper capacitor electrode, and a conductive protective layer 17 (thickness: about 50 to 100 nm) using a refractory metal such as molybdenum. , Respectively. The capacitor insulating layer 14, the lower capacitor electrode 15, the aluminum electrode 16 and the protective layer 17 form a capacitor. In addition to the refractory metal, the capacitor electrode 15 and the protective layer 17 have a refractory metal compound (a compound of a refractory metal and silicon (silicide), a refractory metal nitride (for example, TiN), or the like).
May be used. In this way, the capacitor insulating layer 14
Since the protective layer 17 is formed between the aluminum electrode 16 and the aluminum electrode 16, the formation of hillocks is suppressed during the heat treatment, and the withstand voltage of the capacitor is improved.
【0008】図2は、本発明の第2実施例を示した断面
図であり、シリコン集積回路におけるキャパシタの構成
を示したものである。第1実施例における構成要素と実
質的に同一の構成要素には同一の番号を付し、説明を省
略する。本実施例では、下側キャパシタ用電極をアルミ
ニウム電極21(膜厚800〜1000nm程度)で形
成し、上側キャパシタ用電極22(膜厚200nm程
度)をモリブデン等の高融点金属または高融点金属化合
物(高融点金属とシリコンとの化合物(シリサイド)、
高融点金属の窒化物(例えばTiN)等)を用いて形成
し、キャパシタ用絶縁層14とアルミニウム電極21と
の間に導電性の保護層23(膜厚50〜100nm程
度)を形成したものである。本実施例でも、上記第1実
施例と同様の効果を奏する。FIG. 2 is a sectional view showing a second embodiment of the present invention, which shows the structure of a capacitor in a silicon integrated circuit. Constituent elements which are substantially the same as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted. In this embodiment, the lower capacitor electrode is formed of an aluminum electrode 21 (film thickness of about 800 to 1000 nm), and the upper capacitor electrode 22 (film thickness of about 200 nm) is formed of a high melting point metal such as molybdenum or a high melting point metal compound ( Compound of high melting point metal and silicon (silicide),
It is formed by using a refractory metal nitride (for example, TiN) or the like, and a conductive protective layer 23 (film thickness of about 50 to 100 nm) is formed between the capacitor insulating layer 14 and the aluminum electrode 21. is there. Also in this embodiment, the same effect as that of the first embodiment can be obtained.
【0009】図3は、本発明の第3実施例を示した断面
図であり、シリコン集積回路におけるキャパシタの構成
を示したものである。第1実施例における構成要素と実
質的に同一の構成要素には同一の番号を付し、説明を省
略する。本実施例では、下側キャパシタ用電極および上
側キャパシタ用電極をアルミニウム電極31および32
(いずれも、膜厚800〜1000nm程度)で形成
し、キャパシタ用絶縁層14とアルミニウム電極31と
の間並びにキャパシタ用絶縁層14とアルミニウム電極
32との間に、導電性の保護層33および34(いずれ
も、膜厚50〜100nm程度)を形成したものであ
る。本実施例でも、上記第1実施例および第2実施例と
同様の効果を奏する。FIG. 3 is a sectional view showing a third embodiment of the present invention, which shows the structure of a capacitor in a silicon integrated circuit. Constituent elements which are substantially the same as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted. In this embodiment, the lower capacitor electrode and the upper capacitor electrode are replaced by aluminum electrodes 31 and 32.
(Both having a film thickness of about 800 to 1000 nm), and conductive protective layers 33 and 34 between the capacitor insulating layer 14 and the aluminum electrode 31 and between the capacitor insulating layer 14 and the aluminum electrode 32. (Both have a film thickness of about 50 to 100 nm). Also in this embodiment, the same effects as those of the first and second embodiments are obtained.
【0010】[0010]
【発明の効果】本発明では、キャパシタ用絶縁層とアル
ミニウム電極との間に導電性の保護層を形成したため、
熱処理の際にヒロックの形成が抑制され、キャパシタの
絶縁耐圧が向上する。したがって、キャパシタの不良を
大幅に減少させることが可能となる。According to the present invention, since the conductive protective layer is formed between the insulating layer for capacitors and the aluminum electrode,
The formation of hillocks is suppressed during the heat treatment, and the withstand voltage of the capacitor is improved. Therefore, it is possible to significantly reduce the number of defective capacitors.
【図面の簡単な説明】[Brief description of drawings]
【図1】本発明の第1実施例を示した断面図である。FIG. 1 is a sectional view showing a first embodiment of the present invention.
【図2】本発明の第2実施例を示した断面図である。FIG. 2 is a sectional view showing a second embodiment of the present invention.
【図3】本発明の第3実施例を示した断面図である。FIG. 3 is a sectional view showing a third embodiment of the present invention.
【図4】従来例を示した断面図である。FIG. 4 is a cross-sectional view showing a conventional example.
【符号の説明】 11……シリコン基板(半導体基板) 14……キャパシタ用絶縁層 16、21、31、32……アルミニウム電極 17、23、33、34……保護層[Description of reference numerals] 11 ... Silicon substrate (semiconductor substrate) 14 ... Capacitor insulating layer 16, 21, 31, 32 ... Aluminum electrode 17, 23, 33, 34 ... Protective layer
Claims (2)
シタの少なくとも一方の電極がアルミニウム電極で構成
された半導体装置において、 上記キャパシタのキャパシタ用絶縁層と上記アルミニウ
ム電極との間に導電性の保護層を形成したことを特徴と
する半導体装置。1. A semiconductor device in which at least one electrode of a capacitor formed on the main surface side of a semiconductor substrate is composed of an aluminum electrode, wherein a conductive layer is provided between a capacitor insulating layer of the capacitor and the aluminum electrode. A semiconductor device having a protective layer.
金属化合物を用いて形成されていることを特徴とする請
求項1に記載の半導体装置。2. The semiconductor device according to claim 1, wherein the protective layer is formed using a refractory metal or a refractory metal compound.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28501491A JPH05129522A (en) | 1991-10-30 | 1991-10-30 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28501491A JPH05129522A (en) | 1991-10-30 | 1991-10-30 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05129522A true JPH05129522A (en) | 1993-05-25 |
Family
ID=17686037
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28501491A Pending JPH05129522A (en) | 1991-10-30 | 1991-10-30 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05129522A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6136640A (en) * | 1997-07-18 | 2000-10-24 | Stmicroelectronics S.A. | Process for fabricating a metal-metal capacitor within an integrated circuit, and corresponding integrated circuit |
US6166424A (en) * | 1997-07-03 | 2000-12-26 | Matsushita Electronics Corporation | Capacitance structure for preventing degradation of the insulating film |
US6175131B1 (en) | 1998-09-22 | 2001-01-16 | Sharp Kabushiki Kaisha | Semiconductor device having a capacitor and an interconnect layer |
US6294834B1 (en) * | 2000-01-21 | 2001-09-25 | United Microelectronics Corp. | Structure of combined passive elements and logic circuit on a silicon on insulator wafer |
US6486530B1 (en) * | 2000-10-16 | 2002-11-26 | Intarsia Corporation | Integration of anodized metal capacitors and high temperature deposition capacitors |
-
1991
- 1991-10-30 JP JP28501491A patent/JPH05129522A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6166424A (en) * | 1997-07-03 | 2000-12-26 | Matsushita Electronics Corporation | Capacitance structure for preventing degradation of the insulating film |
US6562677B1 (en) | 1997-07-03 | 2003-05-13 | Matsushita Electric Industrial Co., Ltd. | Capacitance element and method of manufacturing the same |
US6818498B2 (en) * | 1997-07-03 | 2004-11-16 | Matsushita Electric Industrial Co., Ltd. | Capacitance element and method of manufacturing the same |
US6136640A (en) * | 1997-07-18 | 2000-10-24 | Stmicroelectronics S.A. | Process for fabricating a metal-metal capacitor within an integrated circuit, and corresponding integrated circuit |
US6423996B1 (en) | 1997-07-18 | 2002-07-23 | Stmicroelectronics S.A. | Process for fabricating a metal-metal capacitor within an integrated circuit, and corresponding integrated circuit |
US6175131B1 (en) | 1998-09-22 | 2001-01-16 | Sharp Kabushiki Kaisha | Semiconductor device having a capacitor and an interconnect layer |
US6294834B1 (en) * | 2000-01-21 | 2001-09-25 | United Microelectronics Corp. | Structure of combined passive elements and logic circuit on a silicon on insulator wafer |
US6486530B1 (en) * | 2000-10-16 | 2002-11-26 | Intarsia Corporation | Integration of anodized metal capacitors and high temperature deposition capacitors |
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