JPH05121207A - Laminated varistor - Google Patents

Abstract

PURPOSE:To provide a laminated varistor able to prevent diversity of varistor voltage and electrostatic capacity while preventing a leakage current by improving a scattering property of an organic matter at the time of firing. CONSTITUTION:In the case where the outer electrodes 4 are formed on both end faces 2a, 2b of a sintered body 2 formed by laminating and integrally sintering semiconductor ceramic layers 5 and a plurality of inner electrodes 3 are buried in the sintered body 2 while one end face 3a of each inner electrode 3 is connected to an outer electrode 4 in order to constitute a lamination type varistor 1, the inner electrodes 3 are formed in a comb shape consisting of three belt-shaped electrode parts 3b extending in parallel at prescribed intervals a.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated varistor functioning as a voltage non-linear resistor, and in particular, the scattering of organic substances during firing can be improved to reduce variations in varistor voltage and electrostatic capacity. , A structure capable of reducing leakage current.

[0002]

2. Description of the Related Art Generally, a varistor is a resistor element whose resistance value changes non-linearly according to an applied voltage, and is used as, for example, a surge absorbing element for preventing an overvoltage from being applied to an electronic circuit. Further, in recent years, in the field of electronic devices such as communication devices, electronic components have been miniaturized and integrated, and accordingly, there has been a strong demand for miniaturization or low voltage of varistor. Conventionally, there is a laminated varistor as shown in FIGS. 6 and 7 to meet such a demand (see Japanese Patent Application No. 1-302496). In this laminated varistor 30, a pair of internal electrodes 33, 33 are embedded in a sintered body 32 formed by laminating a plurality of semiconductor ceramic layers 31, and only one end face 33a of each internal electrode 33 is sintered. Left and right end faces 32 of body 32
It is configured to be connected to the external electrodes 34, 34 formed on a and 32b. Further, in the ceramic layer 31 between the internal electrodes 33, a pair of unconnected internal electrodes 35, 35 which are not connected to the external electrodes 34 are inserted and arranged, and the unconnected internal electrodes 35 are enclosed in a sintered body 32. Has been done. The laminated varistor 30 obtains a voltage non-linear characteristic due to an electric barrier formed at the interface between the ceramic layer 31, the internal electrode 33, and the non-connected internal electrode 35.

[0003]

In the laminated varistor 30, as shown in FIG. 7, an internal electrode 33 and a non-connected internal electrode 35 are formed by printing Ag / Pd paste on a green sheet-shaped ceramic layer 31. Are formed, and these are sequentially laminated and then integrally sintered to form the sintered body 32. However, the above conventional laminated varistor 3
In No. 0, when organic substances such as a binder are scattered from the ceramic layer 31 during firing, the internal electrode 33 and the unconnected internal electrode 3
Since 5 becomes an obstacle, a force may be applied to the joint surface between each electrode 33, 35 and the ceramic layer 31, and the electrodes 33, 35 may peel off in some cases. As a result, the voltage non-linear characteristic cannot be obtained in the portion where the peeling occurs, which causes a problem that the varistor voltage and the capacitance vary. In addition, the internal electrode 33 during the above firing
In some cases, the mesh-shaped holes may be formed in the sintered internal electrode 33 and the unconnected internal electrode 35 due to the contraction of the metal of the unconnected internal electrode 35 and the evaporation of the organic matter. As a result, a semiconductor crystal grows through this hole, and the voltage non-linearity cannot be obtained in this crystal part, so that there is a problem that variations in varistor voltage or leakage current occur as in the above case. ..

The present invention has been made to solve the above-mentioned conventional problems, and improves the scattering of organic substances and the like during firing, and avoids the generation of pores due to shrinkage of metal and evaporation of organic substances. It is an object of the present invention to provide a laminated varistor capable of reducing variations in varistor voltage and electrostatic capacitance and reducing leakage current.

[0005]

According to the invention of claim 1, external electrodes are formed on both end faces of a sintered body obtained by laminating semiconductor ceramic layers and integrally sintering, and a plurality of external electrodes are formed in the sintered body. In a laminated varistor in which internal electrodes are embedded and only one end surface of each internal electrode is alternately connected to the external electrodes, the internal electrodes are comb-shaped on a plane orthogonal to the thickness direction of the semiconductor ceramic layer. It is characterized by being formed in. According to a second aspect of the invention, in a laminated varistor in which a non-connected internal electrode that is not connected to the external electrode is embedded in the semiconductor ceramic layer between the internal electrodes, the internal electrode is formed in a comb shape, and The internal electrodes are arranged so as not to overlap each other in the thickness direction of the ceramic layer.

[0006]

According to the laminated varistor of the first aspect of the present invention, since the internal electrodes are formed in a comb shape, the organic substances scattered from the ceramic layer during firing are discharged from the gaps between the internal electrodes, so that the scattering property is improved. It can be improved, and the peeling of the internal electrode can be prevented accordingly. As a result, the voltage non-linearity at the interface between the internal electrode and the ceramic layer can be ensured, and variations in varistor voltage and electrostatic capacitance can be reduced. According to the invention of claim 2, when disposing the unconnected internal electrodes in the semiconductor ceramic layer between the internal electrodes, the internal electrodes are formed in a comb shape, and the internal electrodes are overlapped in the thickness direction. Since it is not provided, only the internal electrodes and the non-connected internal electrodes overlap in the thickness direction, so that the overlap can be reduced as compared with the conventional structure. Therefore, it is possible to reduce the holes due to the contraction of the internal electrodes and the non-connected internal electrodes and the evaporation of the organic substance, and the growth of the crystals passing through the holes can be reduced. ..

[0007]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 are views for explaining a laminated varistor according to an embodiment of the present invention. In the figure, reference numeral 1 is a laminated varistor of the present embodiment, in which the first internal electrode 3 and the second internal electrode 3 are embedded in a rectangular parallelepiped sintered body 2 and the left side of the sintered body 2 is described. , Right edge 2
External electrodes 4 and 4 are formed on a and 2b.

The sintered body 2 is formed by laminating a plurality of semiconductor ceramic layers 5 and integrally sintering the laminated body. The interface between the first and second internal electrodes 3 and the ceramic layer 5 is formed. The voltage non-linear characteristic is obtained at.

One end face 3a of each internal electrode 3 is alternately exposed to the left and right end faces 2a, 2b of the sintered body 2, and the one end face 3a is electrically connected to the external electrode 4. Has been done. Further, the portion of the internal electrode 3 other than the one end surface 3a is located inside the ceramic layer 5, and is thereby embedded in the sintered body 2.

The first and second internal electrodes 3 have three strip-shaped electrode portions 3b extending in parallel with a predetermined gap a.
The electrode portions 3b face each other with the ceramic layer 5 interposed therebetween. As a result, each internal electrode 3
Has a comb shape on a plane orthogonal to the thickness direction of the ceramic layer 5.

Next, a method of manufacturing the laminated varistor 1 of this embodiment will be described. First, ZnO (97.9 mol%) was the main component, and CoCO ₃ (1.0 mol%), MnCO _{3
(0.5mol%), Sb 2 O} 3 (2.0mol%), Bi 2 O 3 (0.5mo
0.1% by weight of glass powder composed of B ₂ O ₃ , SiO ₂ , PbO, and ZnO is added to the ceramic material obtained by mixing the above (1%) in the above molar ratio to prepare a raw material powder. Further, this raw material powder is mixed with an organic binder to form a ceramic green sheet having a thickness of 10 μm by a reverse roller method, and the green sheet is cut into a rectangular shape to form a plurality of semiconductor ceramic layers 5. The uppermost ceramic layer 5 and the lowermost ceramic layer 5 are formed by stacking ten green sheets, and the central ceramic layer 5 is composed of only one sheet.

Next, an organic vehicle is mixed with a metal powder made of Pt to prepare an electrode paste, and this electrode paste is printed on the upper surface of the ceramic layer 5 to form a comb-shaped electrode portion 3b. The first and second internal electrodes 3 are formed. In this case, only one end surface 3a of each internal electrode 3 extends to the end edge of the ceramic layer 5, and the other peripheral end surface is located inside.

Next, as shown in FIG. 1, the ceramic layers 5 and the internal electrodes 3 are alternately overlapped with each other, and one end face 3a of each internal electrode 3 is alternately exposed to the left and right edges of the ceramic layer 5. The layers are laminated, and a pressure of ² t / cm ² is applied in the thickness direction of the layers to perform pressure bonding to form a layered body, and the layered body is cut into a predetermined size.

Next, the above laminated body is heated in the air at 1050 to 1150.
Sintered body 2 is obtained by firing at a temperature of ° C for 3 hours. Then, Ag: Pd = 7: on the left and right end faces 2a, 2b of the sintered body 2.
After applying the alloy paste having a weight ratio of 3, the external electrode 4 is formed by baking. As a result, the laminated varistor 1 of this embodiment is manufactured.

[0015]

[Table 1]

Table 1 shows the results of tests conducted to confirm the effects of this embodiment. This test was performed by making the laminated varistor 1 by the manufacturing method described in this example, and measuring the voltage-current characteristics, the capacitance, and the resistance value when 2 V was applied for 30 seconds. For comparison, the same measurement was performed on a conventional laminated varistor having a rectangular internal electrode. As is clear from Table 1, in the case of the conventional sample, the varistor voltage of 3 CV is 8.5% and the capacitance is 3%.
The CV is 10.2% and the resistance value is 0.92 MΩ, which causes variations in characteristics. On the other hand, in the case of the sample of this example, the varistor voltage 3CV is 1.0% and the electrostatic capacitance 3CV is 3.10%, and the variation can be greatly reduced. Also, the resistance value is improved to 1.20 MΩ, which shows that the leakage current can be reduced.

4 and 5 are views for explaining a laminated varistor according to an embodiment of the present invention. In the figure, the same reference numerals as those in FIGS. 1 and 2 indicate the same or corresponding portions. In the laminated varistor 10 of this embodiment, the first and second internal electrodes 11, 11 are embedded in the sintered body 2, and the external electrodes 4 are formed on both end surfaces 2a, 2b of the sintered body 2. The basic structure is almost the same as that of the above embodiment.

In the ceramic layer 5 between the first and second internal electrodes 11, a non-connected internal electrode 12 is arranged,
Each end face of the unconnected internal electrode 12 is located inside the sintered body 2. As a result, the unconnected internal electrode 12 is sealed in the sintered body 2 without being electrically connected to the external electrode 4.

The first and second internal electrodes 11 have four strip-shaped electrode portions 1 extending in parallel with a predetermined gap a.
1b is formed in a comb shape. The electrode portions 11b are arranged so as not to overlap each other in the thickness direction of the ceramic layer 5.

Next, a method of manufacturing the laminated varistor 10 of this embodiment will be described. The manufacturing method of the present embodiment is basically the same as the above-mentioned method, glass powder is added to a ceramic material containing ZnO as a main component to prepare a raw material powder, and a ceramic green sheet having a thickness of 10 μm is produced from the raw material powder. Is formed, and this green sheet is cut into a rectangular shape to form a large number of semiconductor ceramic layers 5.

Next, an electrode paste is printed on the upper surface of each ceramic layer 5 to form the comb-shaped first and second internal electrodes 11 and the unconnected internal electrodes 12. This unconnected internal electrode 12 has a ceramic layer 5 on the entire peripheral surface thereof.
It is formed so that it is located inside.

Next, as shown in FIG. 4, the ceramic layers 5 are sequentially laminated and laminated, and then pressure-bonded to form a laminated body, and the laminated body is cut into a predetermined size. Next, the laminated body is fired in air at a temperature of 1050-1150 ° C. for 3 hours to form a sintered body 2. Then, the external electrodes 4 are formed by baking on the left and right end faces 2a, 2b of the sintered body 2. As a result, the laminated varistor 10 of this embodiment is manufactured.

[0023]

[Table 2]

Table 2 shows the results of tests conducted to confirm the effect of this embodiment. In this test, the voltage-current characteristics, capacitance, and 4V of the laminated varistor 10 of this example were measured.
The resistance value when applied for 30 seconds was measured. For comparison, the same test was performed on a conventional laminated varistor in which the internal electrodes are rectangular and the unconnected internal electrodes are arranged. As is clear from Table 2, in the case of the conventional sample,
3CV of varistor voltage is 9.5%, 3CV of capacitance is 9.
The resistance value is 60% and the resistance value is 1.50 MΩ, and the characteristics vary. On the other hand, in the case of the sample of this example, the varistor voltage of 3 CV is 1.0%, and the capacitance is 3 CV.
Is 2.50%, and the variation can be greatly reduced. Also, the resistance value is improved to 2.10 MΩ, which shows that the leakage current can be reduced.

[0025]

As described above, according to the laminated varistor of the first aspect of the present invention, since the internal electrodes are formed in a comb shape, the scattering of organic substances can be improved, and the varistor voltage and the variation in capacitance can be reduced. There is an effect that can be reduced. According to the second aspect, when disposing the unconnected internal electrodes in the semiconductor ceramic layer between the internal electrodes, the comb-shaped internal electrodes are prevented from overlapping in the thickness direction. It is possible to reduce the variation in voltage and the leakage current.

[Brief description of drawings]

FIG. 1 is an exploded perspective view for explaining a laminated varistor according to an embodiment of the present invention.

FIG. 2 is a sectional view of the laminated varistor of the above embodiment.

FIG. 3 is a perspective view of the laminated varistor of the above embodiment.

FIG. 4 is an exploded perspective view for explaining a laminated varistor according to an embodiment of the present invention.

FIG. 5 is a sectional view of the laminated varistor of the above embodiment.

FIG. 6 is a sectional view showing a conventional laminated varistor.

FIG. 7 is an exploded perspective view showing a conventional laminated varistor.

[Explanation of symbols]

 1,10 Laminated Varistor 2 Sintered Body 3,11 Internal Electrode 3a One End Surface of Internal Electrode 4 External Electrode 5 Ceramic Layer 12 Unconnected Internal Electrode

Front page continuation (72) Inventor Yasunobu Yoneda 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto, Murata Manufacturing Co., Ltd. (72) Yukio Sakabe 2-26-10 Tenjin, Nagaokakyo, Kyoto Murata Manufacturing Co., Ltd.

Claims (2)

[Claims] 1. An external electrode is formed on both end faces of a sintered body obtained by laminating semiconductor ceramic layers and integrally sintering the sintered body, and a plurality of internal electrodes are embedded in the sintered body, and at the same time, each internal electrode A laminated varistor in which only one end face is alternately connected to the external electrode, wherein the internal electrode is formed in a comb shape on a plane orthogonal to the thickness direction of the semiconductor ceramic layer. 2. The semiconductor ceramic layer between the internal electrodes according to claim 1, wherein a non-connected internal electrode that is not connected to the external electrode is embedded, and the internal electrodes do not overlap each other in the thickness direction of the ceramic layer. A laminated varistor characterized by being arranged as described above.