[go: up one dir, main page]

JPH0498861A - Resin sealed type semiconductor device - Google Patents

Resin sealed type semiconductor device

Info

Publication number
JPH0498861A
JPH0498861A JP21613690A JP21613690A JPH0498861A JP H0498861 A JPH0498861 A JP H0498861A JP 21613690 A JP21613690 A JP 21613690A JP 21613690 A JP21613690 A JP 21613690A JP H0498861 A JPH0498861 A JP H0498861A
Authority
JP
Japan
Prior art keywords
leads
island
resin body
semiconductor chip
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21613690A
Other languages
Japanese (ja)
Inventor
Yukihiro Tsuji
辻　幸弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP21613690A priority Critical patent/JPH0498861A/en
Publication of JPH0498861A publication Critical patent/JPH0498861A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent leads from being deformed and deteriorating in evenness by a method wherein the leads formed into a trapezoid and arranged around an island, a semiconductor chip mounted on the island and electrically connected to the inner tips of the leads, and a resin body hermetically enveloping the semiconductor chip including the island and the bends of the leads so as to make the lowermost faces of the leads exposed at its base are provided. CONSTITUTION:An island 1, a lead frame provided with leads 5 formed into a trapezoid and provided around the island 1, a semiconductor chip 2 mounted on the island 1 are provided, where the electrodes of the semiconductor chip 2 and the inner tips of the leads 5 are connected together with metal fine wires 3. Then, the island 1, the bonding region of the leads 5, and the bends of the leads 5 are sealed up with a resin body 4 provided with a plane level with the lowermost plane of the leads 5. Furthermore, the leads 5 led outside from the side face of the resin body 4 are cut off at the point near the side face of the resin body 4 to separate from a lead frame. By this setup, leads can be prevented from both being deformed and deteriorating in evenness.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a resin-sealed semiconductor device.

〔従来の技術〕[Conventional technology]

樹脂封止型半導体装置は、樹脂封止の量産性が良く、材
料費が安いため広く用いられている。Resin-encapsulated semiconductor devices are widely used because resin encapsulation has good mass productivity and material costs are low.

第２図（ａ）〜（ｄ）は従来の樹脂封止型半導体装置の
製造方法を説明するための工程順に示した断面図である
。FIGS. 2(a) to 2(d) are cross-sectional views showing the order of steps for explaining a conventional method for manufacturing a resin-sealed semiconductor device.

第２図（ａ）に示すように、アイランド１の周囲にリー
ド５を配！して設けたリードフレームのアイランド１の
上に半導体チップ２をマウントし、半導体チップ２の電
極とリード５との間を金属細線３によりボンディング接
続する。As shown in FIG. 2(a), the leads 5 are arranged around the island 1! A semiconductor chip 2 is mounted on the island 1 of the lead frame provided as a lead frame, and the electrodes of the semiconductor chip 2 and the leads 5 are connected by bonding using thin metal wires 3.

次に、第２図（ｂ）に示すように、アイランド１及びリ
ード５のボンデング領域を含んで樹脂体４により封止す
る。Next, as shown in FIG. 2(b), the island 1 and the bonding area of the lead 5 are sealed with a resin body 4.

次に、第２図（ｃ）に示すように、樹脂体４の外部に導
出されたり−ド５をリードフレームより切離し、整形し
て半導体装置を構成する。Next, as shown in FIG. 2(c), the leads 5 led out of the resin body 4 are separated from the lead frame and shaped to form a semiconductor device.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上述した従来の樹脂封止型半導体装置は
、樹脂封止後に樹脂体から導出したリードを整形するた
めに、リードは、樹脂体から導出する部分が長くなり、
リードが外力を受けるとす−ド変形の発生や、リードの
平坦性か悪くなるという欠点がある。However, in the conventional resin-sealed semiconductor device described above, in order to shape the leads led out from the resin body after resin sealing, the portion of the leads led out from the resin body becomes long.
When the leads are subjected to external force, there are disadvantages in that deformation occurs and the flatness of the leads deteriorates.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の樹脂封止型半導体装置は、アイランドと、前記
アイランドの周囲に配置し且つ台形に整形して設けたリ
ードと、前記アイランド上にマウントして前記リードの
内側先端部との間を電気的に接続した半導体チップと、
前記アイランド及び前記リードの湾曲部を含み且つ前記
リードの最下面を底面内に露出させて封止した樹脂体と
を有する。The resin-sealed semiconductor device of the present invention has an island, a lead arranged around the island and shaped into a trapezoid, and an inner tip of the lead mounted on the island. A semiconductor chip connected to
The resin body includes the island and the curved portion of the lead and is sealed with the lowermost surface of the lead exposed in the bottom surface.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図（ａ）〜（Ｃ）は本発明の一実施例の製造方法を
説明するための工程順に示した断面図である。FIGS. 1(a) to 1(C) are cross-sectional views shown in order of steps for explaining a manufacturing method according to an embodiment of the present invention.

まず、第１図（ａ）に示すように、アイランド１と、ア
イランド１の周囲に配置して設は台形に整形したリード
５を有するリードフレームのアイランド１の上に半導体
チップ２をマウントし、半導体チップ２の！極とリード
５の内側先端部との閏を金属細線３でボンディング法に
より接続する。First, as shown in FIG. 1(a), the semiconductor chip 2 is mounted on the island 1 of a lead frame having an island 1 and leads 5 arranged around the island 1 and shaped into a trapezoid. Semiconductor chip 2! The pole and the inner tip of the lead 5 are connected by a bonding method using a thin metal wire 3.

次に、第１１Ｊ　（ｂ　）に示すように、アイランドｌ
及びリード５のボンデインク領域並びにリード５の湾曲
部６を含んでリード５の最下面と同一平面を有する樹脂
体４により封止する。Then, as shown in the 11th J (b), the island l
The bonding ink region of the lead 5 and the curved portion 6 of the lead 5 are sealed with a resin body 4 having the same plane as the lowermost surface of the lead 5.

次に、第１図（ｃ）に示すように、樹脂体４の側面より
外方に導出したリード５を樹脂体４の側面付近で切断し
てリードフレームより切離し、半導体装置を構成する。Next, as shown in FIG. 1(c), the leads 5 led out from the side surface of the resin body 4 are cut near the side surface of the resin body 4 and separated from the lead frame to form a semiconductor device.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、樹脂体の底部に樹脂体の
底面と同一平面内に露出されたリードの実装面以外は樹
脂体の中に封止することにより、リードの変形の発生や
平坦性の悪化を防止できるという効果を有する。As explained above, the present invention prevents deformation of the leads by sealing them in the resin body except for the mounting surface of the leads exposed in the same plane as the bottom surface of the resin body. It has the effect of preventing sexual deterioration.

【図面の簡単な説明】[Brief explanation of drawings]

第１図（ａ）〜（ｃ）は本発明の一実施例の製造方法を
説明するための工程順に示した断面図、第２図（ａ）〜
（ｃ）は従来の樹脂封止型半導体装置の製造方法を説明
するための工程順に示した断面図である。 １・・・アイランド、２・・・半導体チップ、３・・・
金属細線、４・・・樹脂体、ら・・・リード。FIGS. 1(a) to 1(c) are cross-sectional views showing the manufacturing method according to an embodiment of the present invention in the order of steps, and FIGS. 2(a) to 2(c)
(c) is a sectional view showing the order of steps for explaining a conventional method for manufacturing a resin-sealed semiconductor device. 1... Island, 2... Semiconductor chip, 3...
Fine metal wire, 4...resin body, ra...lead.

Claims (1)

【特許請求の範囲】[Claims] 　アイランドと、前記アイランドの周囲に配置し且つ台
形に整形して設けたリードと、前記アイランド上にマウ
ントして前記リードの内側先端部との間を電気的に接続
した半導体チップと、前記アイランド及び前記リードの
湾曲部を含み且つ前記リードの最下面を底面内に露出さ
せて封止した樹脂体とを有することを特徴とする樹脂封
止型半導体装置。an island, a lead arranged around the island and shaped into a trapezoid, a semiconductor chip mounted on the island and electrically connected to an inner tip of the lead; A resin-sealed semiconductor device comprising: a resin body that includes a curved portion of the lead and is sealed with the lowermost surface of the lead exposed in the bottom surface.
JP21613690A 1990-08-16 1990-08-16 Resin sealed type semiconductor device Pending JPH0498861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21613690A JPH0498861A (en) 1990-08-16 1990-08-16 Resin sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21613690A JPH0498861A (en) 1990-08-16 1990-08-16 Resin sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPH0498861A true JPH0498861A (en) 1992-03-31

Family

ID=16683833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21613690A Pending JPH0498861A (en) 1990-08-16 1990-08-16 Resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPH0498861A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0623954A1 (en) * 1993-05-07 1994-11-09 AT&T Corp. Molded plastic packaging of electronic devices
US5508557A (en) * 1992-10-09 1996-04-16 Rohm Co., Ltd. Surface mounting type diode

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5508557A (en) * 1992-10-09 1996-04-16 Rohm Co., Ltd. Surface mounting type diode
US5625223A (en) * 1992-10-09 1997-04-29 Rohm Co., Ltd. Surface mounting type diode
EP0623954A1 (en) * 1993-05-07 1994-11-09 AT&T Corp. Molded plastic packaging of electronic devices
US5548087A (en) * 1993-05-07 1996-08-20 At&T Corp. Molded plastic packaging of electronic devices

Similar Documents

Publication Publication Date Title
JP2003037219A (en) Resin sealed semiconductor device and method for manufacturing the same
JPH03177060A (en) Lead frame for semiconductor device
JPH05335474A (en) Resin sealed semiconductor device
JP4822038B2 (en) Discrete package, manufacturing method thereof, and lead frame used therefor
JPH0498861A (en) Resin sealed type semiconductor device
JPH07101698B2 (en) Method for manufacturing resin-sealed semiconductor device
JPS6086851A (en) Resin sealed type semiconductor device
JPH0621305A (en) Semiconductor device
JPH03105950A (en) Package of semiconductor integrated circuit
JPS5930538Y2 (en) semiconductor equipment
JPH11186447A (en) Resin sealing semiconductor device and its manufacture and its manufacturing device
JPS62235763A (en) Lead frame for semiconductor device
JPH0366150A (en) Semiconductor integrated circuit device
JP3013611B2 (en) Method for manufacturing semiconductor device
JPH06260580A (en) Lead frame and semiconductor device using the same
JPH1012802A (en) Lead frame and semiconductor device using the same
JP2003243599A (en) Lead frame and semiconductor device
JPH0239557A (en) Lead frame and semiconductor device
JPH02303056A (en) Manufacture of semiconductor integrated circuit
JPH11233700A (en) Resin encapsulated semiconductor device
JPH05243317A (en) Semiconductor device
JP2002033434A (en) Resin sealed semiconductor device
JPS61141162A (en) Semiconductor device and manufacture thereof
JP2000058738A (en) Lead frame and semiconductor device
JPS6223142A (en) Lead frame