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JPH0490624A - Interference compensating receiver - Google Patents

Interference compensating receiver

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Publication number
JPH0490624A
JPH0490624A JP20602490A JP20602490A JPH0490624A JP H0490624 A JPH0490624 A JP H0490624A JP 20602490 A JP20602490 A JP 20602490A JP 20602490 A JP20602490 A JP 20602490A JP H0490624 A JPH0490624 A JP H0490624A
Authority
JP
Japan
Prior art keywords
signal
interference
circuit
phase
amplitude
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20602490A
Other languages
Japanese (ja)
Inventor
Toshiyuki Kaizuka
貝塚 俊之
Kozo Morita
浩三 森田
Yasushi Motoyama
本山 泰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP20602490A priority Critical patent/JPH0490624A/en
Publication of JPH0490624A publication Critical patent/JPH0490624A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To simplify construction without necessitating the installation of the antenna device for interference wave reception by suppressing an interference signal interfering with the desired signal to be received and receiving only the desired signal. CONSTITUTION:A signal branched by a signal branching circuit 20 is passed through a transmission path with the length of approximately 1/2 of the difference between the electric length against the desired signal and the one against the interference signal in an interference signal suppress circuit 30, further, the amplitude and phase of the signal is controlled to obtain the amount of the control, the other signal is synthesized again, and the interference signal is suppressed. Therefore, only the desired signal can be received without affected by the influence of the interference signal. Thus, the communication quality can be maintained without affected by the influence of the interference wave even when the two antenna devices, which are the antenna device 10 for communication and the one for interference wave, are not utilized.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は無線通信における干渉補償形受信装置に係り、
受信しようとする希望信号に干渉を与える干渉信号を抑
圧し、希望信号を受信する無線伝送システムの干渉補償
形受信装置に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an interference compensated receiving device in wireless communication,
The present invention relates to an interference compensation receiving apparatus for a wireless transmission system that suppresses interference signals that interfere with a desired signal to be received and receives the desired signal.

〔従来の技術〕[Conventional technology]

無線通信において、電波干渉は重要な問題である。従来
よりかかる干渉を抑圧する技術が開発されている。第4
図は従来の干渉補償装置の一例を示す。一般にサイドロ
ーブキャンセラといわれる干渉補償装置等の制御方法(
例えば特許第1409006号に係る干渉補償装置)を
利用している。
Radio wave interference is an important problem in wireless communications. Conventionally, techniques for suppressing such interference have been developed. Fourth
The figure shows an example of a conventional interference compensation device. Control method for interference compensation devices, generally called sidelobe cancellers (
For example, an interference compensation device according to Japanese Patent No. 1409006 is used.

第4図において21は通信用のアンテナ装置であって受
信しようとする信号の他に干渉となる信号が混入してし
まう。このため干渉となる信号を受信するためのアンテ
ナ装置22か設けられる。
In FIG. 4, reference numeral 21 denotes a communication antenna device, which causes interference signals to be mixed in with signals to be received. For this reason, an antenna device 22 is provided for receiving signals that cause interference.

23はアンテナ装置22で受信した干渉波の振幅と位相
を制御して出力する振幅位相制御回路である。24は信
号合成分岐回路であり、2つの入力信号を合成した後、
この合成された信号を2系統に分岐して出力する。25
は受信機であり、受信しようとする通信信号を受信する
23 is an amplitude and phase control circuit that controls and outputs the amplitude and phase of the interference wave received by the antenna device 22. 24 is a signal synthesis branch circuit, which after synthesizing two input signals,
This combined signal is branched into two systems and output. 25
is a receiver and receives the communication signal to be received.

アンテナ装置22で受信された干渉波はアンテナ装置2
】に混入する干渉波と等振幅で逆位相となるよう振幅位
相振幅回路23て制御された後、信号合成分岐回路24
でアンテナ装置21の受信信号と合成され干渉波が抑圧
される。この合成された信号はさらに信号合成分岐回路
24て2系統に分岐され、一方は受信機25に入力され
る。また、もう一方の信号は振幅位相制御回路23に入
力され、信号合成分岐回路24からの出力信号に含まれ
る干渉波の残留分を検出する。また、その信号はアンテ
ナ装置22て受信した干渉波信号と振幅および位相を比
較し、続いて信号合成分岐回路24の出力において、干
渉波か抑圧されるために必要な振幅と位相の制御量を得
て、アンテナ装置22の受信干渉波信号の振幅と位相を
制御する。
The interference wave received by the antenna device 22 is transmitted to the antenna device 2.
] After being controlled by the amplitude/phase/amplitude circuit 23 to have the same amplitude and opposite phase as the interference wave mixed in, the signal synthesis branch circuit 24
It is combined with the received signal of the antenna device 21 to suppress interference waves. This combined signal is further branched into two systems by a signal combining branch circuit 24, and one is inputted to a receiver 25. The other signal is input to the amplitude and phase control circuit 23, and the residual interference wave included in the output signal from the signal synthesis branch circuit 24 is detected. Further, the amplitude and phase of the signal are compared with the interference wave signal received by the antenna device 22, and then, at the output of the signal synthesis branch circuit 24, the amplitude and phase control amounts necessary for suppressing the interference wave are determined. and controls the amplitude and phase of the interference wave signal received by the antenna device 22.

この結果、アンテナ装置21の受信信号中の干渉波か抑
圧されて希望する通信信号を干渉を受けずに受信機25
て受信可能となる。
As a result, the interference waves in the received signal of the antenna device 21 are suppressed, and the desired communication signal is transmitted to the receiver 25 without interference.
and can be received.

〔発明か解決しようとする課題〕[Invention or problem to be solved]

しかるに、従来では通信用のアンテナ装置21の他に干
渉波受信用のアンテナ装置22が必要であり、設置コス
トが高価なものとなる。
However, conventionally, an antenna device 22 for receiving interference waves is required in addition to the antenna device 21 for communication, and the installation cost becomes high.

また、干渉波が多重反射波である場合には通信用のアン
テナ装置21と干渉波用のアンテナ装置22の両アンテ
ナ装置に入力する干渉波の周波数特性か異なり、干渉波
の抑圧が困難であるという問題かあった。
Furthermore, when the interference waves are multiple reflected waves, the frequency characteristics of the interference waves input to both the communication antenna device 21 and the interference wave antenna device 22 are different, making it difficult to suppress the interference waves. There was a problem.

本発明は上記の点に鑑みなされたもので通信用のアンテ
ナ装置と干渉波用のアンテナ装置の2つのアンテナ装置
を用いなくとも干渉波の影響を受けずに通信品質を維持
することかできる干渉補償形受信装置を提供することを
目的とする。
The present invention was made in view of the above points, and it is possible to maintain communication quality without being affected by interference waves without using two antenna devices: a communication antenna device and an interference wave antenna device. An object of the present invention is to provide a compensated receiving device.

〔課題を解決するための手段〕[Means to solve the problem]

第1図は本発明の原理説明図である。 FIG. 1 is a diagram explaining the principle of the present invention.

アンテナ装置10で受信される希望信号と希望信号に干
渉を与える干渉信号が混在した受信信号を2系統に分岐
して出力する信号分岐回路20と、信号分岐回路20の
一方の出力端子からの出力信号を希望信号に対する電気
長と干渉信号に対する電気長の差が概略1/2の奇数倍
の波長となる長さをもつ伝送路を通過させ、さらに伝送
路を通過した信号又は、信号分岐回路20の他方の出力
端子からの信号のいずれか一方の信号の振幅と位相を制
御した後、伝送路を通過後、振幅と位相を制御された信
号と信号分岐回路20の他方の出力端子からの信号と合
成、又は、伝送路を通過した信号と信号分岐回路20の
他方の出力信号の振幅と位相を制御された信号とを合成
することによって干渉信号を抑圧する干渉信号抑圧回路
30と、干渉信号抑圧回路30から取り出された信号か
入力される受信機40とを有し、希望信号のみを受信す
る。
A signal branching circuit 20 that branches a received signal containing a desired signal received by the antenna device 10 and an interference signal that interferes with the desired signal into two systems and outputs the branched signal, and an output from one output terminal of the signal branching circuit 20. The signal is passed through a transmission line having a length such that the difference between the electrical length for the desired signal and the electrical length for the interference signal is approximately an odd multiple of 1/2 of the wavelength, and the signal that has passed through the transmission line or the signal branching circuit 20 After controlling the amplitude and phase of one of the signals from the other output terminal of the signal branching circuit 20 , after passing through the transmission path, the signal whose amplitude and phase has been controlled and the signal from the other output terminal of the signal branch circuit 20 or an interference signal suppression circuit 30 that suppresses the interference signal by combining the signal that has passed through the transmission path and a signal whose amplitude and phase have been controlled from the other output signal of the signal branching circuit 20; It has a receiver 40 into which the signal extracted from the suppression circuit 30 is input, and receives only the desired signal.

〔作用〕[Effect]

本発明では信号分岐回路20て分岐された一方の信号を
干渉信号抑圧回路30て希望信号に対する電気長と干渉
信号に対する電気長の差が概略1/2波長となる長さを
もつ伝送路を通過させ、さらに信号の振幅と位相を制御
してその制御量を得、再び他方の信号を合成させ、干渉
信号を抑圧することにより、希望信号を干渉信号の影響
を受けずに受信することかできる。
In the present invention, one of the signals branched by the signal branching circuit 20 is passed through the interference signal suppression circuit 30 through a transmission path having a length such that the difference between the electrical length for the desired signal and the electrical length for the interference signal is approximately 1/2 wavelength. The desired signal can be received without being affected by the interference signal by controlling the amplitude and phase of the signal, obtaining the control amount, and combining the other signal again to suppress the interference signal. .

〔実施例〕〔Example〕

第2図は本発明の一実施例の構成図を示す。同図におい
て、第1図と同一部分には同一符号を付し、その説明を
省略する。
FIG. 2 shows a configuration diagram of an embodiment of the present invention. In this figure, the same parts as in FIG. 1 are given the same reference numerals, and their explanations will be omitted.

30は干渉信号抑圧回路であり、信号合成分岐回路31
によって分岐された希望信号と干渉信号との間で通路差
を持たせるための伝送路32、及び振幅位相制御回路3
3よりなる。
30 is an interference signal suppression circuit, and a signal synthesis branch circuit 31
a transmission line 32 for creating a path difference between the desired signal and the interference signal branched by the signal, and an amplitude phase control circuit 3
Consists of 3.

ここで干渉波の周波数をfとし、隣接する希望波との周
波数差をΔfとすると、干渉波と希望波の真空中の波長
λ、λ′は次式て表すことかてきる。
Here, when the frequency of the interference wave is f and the frequency difference between the adjacent desired wave and the desired wave is Δf, the wavelengths λ and λ' of the interference wave and the desired wave in vacuum can be expressed by the following equations.

λ  =c/f               ・・・
(1)λ’=c/(f+△f)       ・・・(
2)但し、Cは真空中の電波伝播速度である。
λ = c/f...
(1) λ'=c/(f+△f) ...(
2) However, C is the radio wave propagation speed in vacuum.

伝送路32の長さをLとし、波長λの干渉波と波長λ′
の希望波か伝送路32を通過する間に0.5波長の差が
生じるとすると、 (L/λ’ )−(L/λ)=0.5   ・・・(3
)L  =  c/(2Δf)       ・・・(
4)となる。但し、上式は真空中を伝播する場合であり
、伝播する媒質によって速度が異なるため、これを考慮
して伝送路32の長さを決める必要かある。
Let the length of the transmission line 32 be L, and the interference wave of wavelength λ and the wavelength λ'
Assuming that a difference of 0.5 wavelength occurs between the desired wave and the transmission line 32, (L/λ')-(L/λ)=0.5 (3
)L = c/(2Δf)...(
4). However, the above equation applies to the case of propagation in a vacuum, and the speed varies depending on the propagating medium, so it is necessary to take this into consideration when determining the length of the transmission path 32.

従って、伝送路32の長さしを概略上式のように設定さ
れた伝送路32を通過した信号と信号分岐回路20から
出力された伝送路32を通過しないもう一方の信号とは
、干渉波または希望波の一方が逆相の時は他方は概略同
相になる。
Therefore, the signal passing through the transmission line 32 whose length is set approximately as shown in the above equation and the other signal output from the signal branching circuit 20 that does not pass through the transmission line 32 are the interference waves. Or, when one of the desired waves is out of phase, the other is approximately in phase.

そこで本実施例では、アンテナ装置IOで受信した信号
は信号分岐回路20で2系統に分岐され、分岐された一
方の信号は伝送路32を通過し、信号分岐回路20て分
岐されたもう一方の出力信号中の干渉波と等振幅で逆位
相となるように振幅位相制御回路33で振幅及び位相か
制御された後、信号合成分岐回路31で信号分岐回路2
0からのもう一方の出力信号と合成されることにより、
干渉波が抑圧され、概略同相の希望波か合成されて取り
出される。
Therefore, in this embodiment, the signal received by the antenna device IO is branched into two systems by the signal branching circuit 20, one branched signal passes through the transmission path 32, and the other branched signal is transmitted by the signal branching circuit 20. After the amplitude and phase are controlled by the amplitude and phase control circuit 33 so that the interference wave has the same amplitude and opposite phase as the interference wave in the output signal, the signal synthesis branch circuit 31 controls the signal branch circuit 2.
By being combined with the other output signal from 0,
Interference waves are suppressed, and desired waves approximately in phase are synthesized and extracted.

信号合成分岐回路31で合成された信号はさらに2系統
に分岐される。分岐された信号の一方は受信機40に入
力される。
The signal synthesized by the signal synthesis branch circuit 31 is further branched into two systems. One of the branched signals is input to the receiver 40.

信号合成分岐回路31で分岐されたもう一方の信号か入
力信号として供給される振幅位相制御回路33は、信号
合成分岐回路31の出力信号に含まれる干渉波の残留分
を検出し、伝送路32からの出力信号と振幅および位相
を比較し、信号合成分岐回路31の出力において干渉波
か抑圧されるために必要な、振幅と位相の制御量を得て
、アンテナ装置IOの出力信号の振幅と位相を制御する
The amplitude phase control circuit 33, which is supplied with the other signal branched by the signal synthesis branch circuit 31 as an input signal, detects the residual part of the interference wave included in the output signal of the signal synthesis branch circuit 31, and The amplitude and phase are compared with the output signal from the antenna device IO to obtain amplitude and phase control amounts necessary for suppressing interference waves at the output of the signal synthesis branch circuit 31. Control the phase.

この結果、受信機40に入力される信号は干渉波か抑圧
され、干渉波の干渉を受けずに希望波だけの受信か可能
となる。
As a result, any interference waves in the signal input to the receiver 40 are suppressed, making it possible to receive only the desired wave without interference from the interference waves.

なお、振幅位相制御回路33の動作は第4図に示した従
来の干渉補償形受信装置の振幅位相制御回路23と同一
の自動的に最適値に制御する方法か採用できる。しかし
、より簡易な構成とするには移相器および減衰器(増幅
器)などを手動で設定しても良い。
The operation of the amplitude and phase control circuit 33 may be performed using the same automatic control method as the amplitude and phase control circuit 23 of the conventional interference compensation receiver shown in FIG. 4. However, for a simpler configuration, the phase shifter, attenuator (amplifier), etc. may be manually set.

また、多数の周波数の信号を受信する場合であって、移
相器及び減衰器(または増幅器)等が大きな周波数特性
を持つ場合には各干渉波の周波数に対応した減衰器(ま
たは増幅器)及び移相器を用意し、周波数の切り換え毎
や、周波数毎に減衰量及び移相量の設定された減衰器(
または増幅器)及び移相器を切り換えるかあるいは周波
数切り換え毎に減衰器(または増幅器)及び移相器の設
定値を自動切り換えしてもよい。
In addition, when receiving signals with multiple frequencies, if the phase shifter, attenuator (or amplifier), etc. have large frequency characteristics, an attenuator (or amplifier) corresponding to the frequency of each interference wave and Prepare a phase shifter, and use an attenuator with the attenuation amount and phase shift amount set for each frequency change or frequency
Alternatively, the set values of the attenuator (or amplifier) and phase shifter may be automatically switched each time the frequency is changed.

第3図は本発明の他の実施例の構成図を示す。FIG. 3 shows a block diagram of another embodiment of the present invention.

同図中34は伝送路であり、第2図の伝送路32と同様
であり、35は信号合成分岐回路であり、第2図の信号
合成分岐回路31と同様であり、36は振幅位相制御回
路であり、第2図の振幅位相制御回路33と同様のもの
であり、同様の動作を行う。同図において、伝送路34
を通過した信号と信号分岐回路20の他方の出力信号の
振幅と位相を振幅位相制御回路36で制御された信号と
信号合成分岐回路35て合成することによって干渉信号
を抑圧する。
In the figure, 34 is a transmission line, which is the same as the transmission line 32 in FIG. 2, 35 is a signal synthesis branch circuit, which is similar to the signal synthesis branch circuit 31 in FIG. 2, and 36 is an amplitude phase control circuit. This circuit is similar to the amplitude phase control circuit 33 in FIG. 2, and performs the same operation. In the figure, the transmission line 34
The interference signal is suppressed by combining the amplitude and phase of the signal passed through the signal branching circuit 20 and the other output signal of the signal branching circuit 20 with the signal controlled by the amplitude phase control circuit 36 and the signal synthesis branching circuit 35.

なお、伝送路32.34の長さしは干渉波と希望波の間
で1/2波長の奇数倍の差が生じる長さであればよい。
Note that the lengths of the transmission lines 32 and 34 may be such that the difference between the interference wave and the desired wave is an odd number multiple of 1/2 wavelength.

〔発明の効果〕〔Effect of the invention〕

上述の如く、本発明によれば、干渉波受信用のアンテナ
装置の設置を必要とせず、構成か簡易でコスト的にも安
価である。
As described above, according to the present invention, it is not necessary to install an antenna device for receiving interference waves, and the structure is simple and inexpensive.

また、多重反射波等の周波数特性の複雑な干渉波に対し
ても2つのアンテナ装置に入力した周波数特性の異なる
信号同士を合成する場合と違って、一つのアンテナ装置
に入力した干渉波を2分岐した後、一方を逆相として合
成するので干渉波を抑圧するごとが可能であり、干渉を
受けずに通信信号を受信することができる。
In addition, unlike the case where signals with different frequency characteristics input to two antenna devices are combined for interference waves with complex frequency characteristics such as multiple reflected waves, interference waves input to one antenna device can be combined into two. After branching, one of the signals is combined with the opposite phase, so it is possible to suppress interference waves, and it is possible to receive communication signals without interference.

分岐回路、32.34・・・伝送路、33.36・・・
振幅位相制御回路、40・・・受信機。
Branch circuit, 32.34...Transmission line, 33.36...
Amplitude phase control circuit, 40...receiver.

Claims (1)

【特許請求の範囲】 アンテナ装置で受信される希望信号と該希望信号に干渉
を与える干渉信号が混在した受信信号を2系統に分岐し
て出力する信号分岐回路と、該信号分岐回路の一方の出
力端子からの出力信号を前記希望信号に対する電気長と
前記干渉信号に対する電気長の差が概略1/2の奇数倍
の波長となる長さをもつ伝送路を通過させ、さらに該伝
送路を通過した信号又は、前記信号分岐回路の他方の出
力端子からの信号のいずれか一方の信号の振幅と位相を
制御した後、前記伝送路を通過後、振幅と位相を制御さ
れた信号と前記信号分岐回路の他方の出力端子からの信
号と合成、又は、前記伝送路を通過した信号と前記信号
分岐回路の他方の出力信号の振幅と位相を制御された信
号とを合成することによって該干渉信号を抑圧する干渉
信号抑圧回路と、 該干渉信号抑圧回路から取り出された信号が入力される
受信機と を有し、希望信号のみを受信するよう構成したことを特
徴とする干渉補償形受信装置。
[Claims] A signal branching circuit that branches a received signal containing a desired signal received by an antenna device and an interference signal that interferes with the desired signal into two systems and outputs the branched signal, and one of the signal branching circuits. The output signal from the output terminal is passed through a transmission line having a length such that the difference between the electrical length for the desired signal and the electrical length for the interference signal is a wavelength that is approximately an odd multiple of 1/2, and further passed through the transmission line. After controlling the amplitude and phase of either the signal or the signal from the other output terminal of the signal branching circuit, the signal whose amplitude and phase has been controlled and the signal branching after passing through the transmission path. The interference signal is eliminated by combining the signal from the other output terminal of the circuit, or by combining the signal that has passed through the transmission line and the signal whose amplitude and phase are controlled from the other output signal of the signal branch circuit. 1. An interference compensation receiving device comprising: an interference signal suppression circuit for suppressing interference signals; and a receiver into which a signal extracted from the interference signal suppression circuit is input, and configured to receive only a desired signal.
JP20602490A 1990-08-03 1990-08-03 Interference compensating receiver Pending JPH0490624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20602490A JPH0490624A (en) 1990-08-03 1990-08-03 Interference compensating receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20602490A JPH0490624A (en) 1990-08-03 1990-08-03 Interference compensating receiver

Publications (1)

Publication Number Publication Date
JPH0490624A true JPH0490624A (en) 1992-03-24

Family

ID=16516637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20602490A Pending JPH0490624A (en) 1990-08-03 1990-08-03 Interference compensating receiver

Country Status (1)

Country Link
JP (1) JPH0490624A (en)

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