JPH0485922A - Manufacturing method of silicon thin film - Google Patents
Manufacturing method of silicon thin filmInfo
- Publication number
- JPH0485922A JPH0485922A JP20002190A JP20002190A JPH0485922A JP H0485922 A JPH0485922 A JP H0485922A JP 20002190 A JP20002190 A JP 20002190A JP 20002190 A JP20002190 A JP 20002190A JP H0485922 A JPH0485922 A JP H0485922A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- silicon layer
- silicon thin
- under
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 32
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 19
- 239000010703 silicon Substances 0.000 title claims abstract description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000034 method Methods 0.000 claims abstract description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 15
- 239000011261 inert gas Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 239000007789 gas Substances 0.000 claims abstract description 10
- 238000000137 annealing Methods 0.000 claims description 13
- 238000001947 vapour-phase growth Methods 0.000 claims description 6
- 239000013078 crystal Substances 0.000 abstract description 20
- 230000007547 defect Effects 0.000 abstract description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 17
- 239000010453 quartz Substances 0.000 abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 229910001873 dinitrogen Inorganic materials 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 150000003376 silicon Chemical class 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 238000004435 EPR spectroscopy Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000009027 insemination Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
【発明の詳細な説明】 （イ）産業上の利用分野 本発明は、シリコン薄膜の製造方法に関する。[Detailed description of the invention] (b) Industrial application fields The present invention relates to a method for manufacturing a silicon thin film.
さらに詳しくは各種半導体素子の基材や母材となるノリ
コン薄膜の製造方法に関する。More specifically, the present invention relates to a method for manufacturing Noricon thin films that serve as base materials and base materials for various semiconductor devices.
（ロ）従来の技術
従来から、各種半導体素子の基材や母材としてシリコン
薄１［ｉ（厚み５００人〜１μｍ程度）が用いられてお
り、このシリコン薄膜の物理化学的特性が半導体素子の
性能に大きな影響を及ぼすことが知られている。(b) Conventional technology Traditionally, silicon thin film (with a thickness of about 500 to 1 μm) has been used as a base material or parent material for various semiconductor devices, and the physicochemical properties of this silicon thin film are It is known to have a significant impact on performance.
例えば、シリコン薄膜からなる薄膜トランジスタ（ＴＰ
Ｔ）を利用した５−ＲＡＭにおいては、素子の低消費電
流化の為に、ＴＰＴのリーク電流の低減と、メモリセル
の安定化の為に、ＴＰＴのオン電流の増大が要求される
。そして、この要求性能を満たすには、気相成長して得
られ１こ多結晶シリコン薄膜中における結晶粒界、結晶
粒内の欠陥、すなわち局在準位をできるだけ低減させる
ことが必要である。For example, a thin film transistor (TP) made of a silicon thin film
In a 5-RAM using TPT, it is required to reduce the leakage current of the TPT in order to reduce the current consumption of the element, and to increase the on-state current of the TPT in order to stabilize the memory cell. In order to satisfy this required performance, it is necessary to reduce as much as possible the crystal grain boundaries and defects within the crystal grains, that is, the localized levels in the monocrystalline silicon thin film obtained by vapor phase growth.
例えば、シリコン薄膜を形成する代表的な手法として、
ＳｉＨ４を原料ガスとして用い、不活性ガス雰囲気下、
約６００℃程度の温度下で多結晶ノリコンを気相成長す
る方法が知られている。しかし、このような方法では、
結晶性の大きな（例えば、数μａ＋）多結晶シリコン薄
膜を得るのは困難であり、結晶欠陥ことに結晶粒界での
欠陥が減少されたシリコン薄膜は得られない。For example, a typical method for forming a silicon thin film is
Using SiH4 as a source gas, under an inert gas atmosphere,
A method is known in which polycrystalline noricon is grown in a vapor phase at a temperature of about 600°C. However, in such a method,
It is difficult to obtain a polycrystalline silicon thin film with high crystallinity (for example, several μa+), and it is impossible to obtain a silicon thin film in which crystal defects, especially defects at grain boundaries, are reduced.
そこで、ＳｉＨ４又は５ｉｔＨｓを原料ガスとして用い
、不活性ガス雰囲気下約５００℃の温度下で非晶質シリ
コンを気相成長させ、次いで同じく不活性ガス雰囲気下
で６００℃程度の温度で処理して多結晶化させる方法ら
行われている（非晶質−多結晶化法）。Therefore, using SiH4 or 5itHs as a source gas, amorphous silicon is grown in a vapor phase at a temperature of about 500°C in an inert gas atmosphere, and then treated at a temperature of about 600°C in the same inert gas atmosphere. Polycrystalline methods are being used (amorphous-polycrystalline method).
（ハ）発明が解決しようとする課題
上記非晶質−多結晶化法においては、大きな結晶粒（場
合によっては０５μｍ以上）の多結晶シリコン薄膜を得
ることができる。(c) Problems to be Solved by the Invention In the amorphous-polycrystalline method described above, a polycrystalline silicon thin film with large crystal grains (in some cases, 05 μm or more) can be obtained.
しかしながら、このようにして得られ１こ多結晶シリコ
ン薄膜には結晶粒中に多数の欠陥が存在するという問題
があった。However, the polycrystalline silicon thin film obtained in this manner has a problem in that many defects exist in the crystal grains.
本発明はかかる状況下なされたものであり、ことに結晶
欠陥が著しく減少された多結晶シリコン薄膜を効率良く
形成することができる方法を提供しようとするものであ
る。The present invention has been made under such circumstances, and particularly aims to provide a method that can efficiently form a polycrystalline silicon thin film in which crystal defects are significantly reduced.
（ニ）課題を解決するための手段
かくして本発明によれば、絶縁基板上に、非晶質シリコ
ン層を気相成長法で形成し、この非晶質シリコン層を不
活性ガス雰囲気下で約５００〜７００℃の温度で処理し
て結晶化させ、次いで不活性ガス雰囲気下で９００℃以
上の温度でアニール処理することからなるシリコン薄膜
の製造方法が提供される。(d) Means for Solving the Problems Thus, according to the present invention, an amorphous silicon layer is formed on an insulating substrate by a vapor phase growth method, and this amorphous silicon layer is grown in an inert gas atmosphere. A method of manufacturing a silicon thin film is provided, which comprises crystallizing the silicon thin film by treating at a temperature of 500 to 700°C, and then annealing at a temperature of 900°C or higher in an inert gas atmosphere.
本発明は、従来の非晶質−多結晶化法で得られた多結晶
ノリコン薄膜を、特定の高温下でアニル処理することに
より、結晶欠陥か著しく減少された多結晶シリコン薄膜
が得られるという事実の発見に基づくものである。The present invention claims that by annealing a polycrystalline silicon thin film obtained by the conventional amorphous-polycrystalization method at a specific high temperature, a polycrystalline silicon thin film with significantly reduced crystal defects can be obtained. It is based on factual findings.
本発明では、まず、熱酸化したＳｉ、石英等の絶縁基板
上に非晶質ノリコン層が形成される。この非晶質ノリコ
ン層は原料ガスとしてＳｉＨ４，５ｉｔＨａ等のンラン
やボリンラン類を用い、公知の気相成長法で形成するこ
とができる。通常、不活性ガス中５５０〜５７０”Ｃ程
度温Ｉ下で気相成長を行うことにり、非晶質シリコン層
を効率良く形成することができる。但し、前述したごと
く、６００℃程度の多結晶シリコンの気相成長条件下で
シリコン層を形成し、これにノリコノイオンをイオン注
入（例えば、ドーズＩ ２ Ｘ Ｌ Ｏ１５ａｍ−’、
エネルギ４０ＫｅＶ） して非晶質化させた、非晶質ノ
リコン層を用いることもできる。In the present invention, first, an amorphous Noricon layer is formed on an insulating substrate of thermally oxidized Si, quartz, or the like. This amorphous Noricon layer can be formed by a known vapor phase growth method using Nran or Borin Ran such as SiH4,5itHa as a raw material gas. Normally, an amorphous silicon layer can be efficiently formed by vapor phase growth in an inert gas at a temperature of about 550 to 570"C. However, as mentioned above, amorphous silicon layers can be grown at a temperature of about 600"C. A silicon layer is formed under crystalline silicon vapor phase growth conditions, and Norikono ions are ion-implanted into it (for example, at a dose of I 2 X L O15am-',
It is also possible to use an amorphous Noricon layer made amorphous by applying an energy of 40 KeV.
かかる非晶質ノリコン層は次いで不活性ガス雰囲気下で
約５００〜７００℃、好ましくは６００〜６５０ ’Ｃ
の温度で結晶化処理に付される。処理時間は、通常４８
〜９６時間程度で充分であり、これにより非晶質ノリコ
ン層は固相成長して多結晶シリコン層に変換される。な
お、この際の不活性ガスとしては、例えば窒素ガス、ア
ルゴンガス等が適している。Such amorphous Noricon layer is then heated at about 500-700'C, preferably 600-650'C under an inert gas atmosphere.
It is subjected to crystallization treatment at a temperature of . Processing time is usually 48
About 96 hours is sufficient, whereby the amorphous Noricon layer undergoes solid phase growth and is converted into a polycrystalline silicon layer. Note that, as the inert gas at this time, for example, nitrogen gas, argon gas, etc. are suitable.
このようにして得られた多結晶シリコン層は、次いでア
ニール処理に付される。アニール処理は、上記と同じく
不活性ガス雰囲気下で行われ、処理温度は９００℃以上
とされ、通常、ｌ０ＱＯ−１１５０℃とするのが好まし
い。The polycrystalline silicon layer thus obtained is then subjected to an annealing treatment. The annealing treatment is carried out in the same inert gas atmosphere as described above, and the treatment temperature is 900°C or higher, preferably 10QO-1150°C.
９００℃未満では、結晶欠陥が充分に減少された多結晶
シリコン薄膜を得ることが困難である。ここで処理時間
はランプアニール法を用いた場合には、通常３０〜３０
０秒程度とするのが適しており、１００〜２００秒とす
るのが好ましい。At temperatures below 900° C., it is difficult to obtain a polycrystalline silicon thin film with sufficiently reduced crystal defects. Here, the processing time is usually 30 to 30 minutes when using the lamp annealing method.
Approximately 0 seconds is suitable, and preferably 100 to 200 seconds.
このようにして得られたシリコン薄膜は、結晶粒界、結
品位内の欠陥が著しく減少したものであり、種々の半導
体素子の基材、母材として役立つしのである。The silicon thin film thus obtained has significantly reduced defects at grain boundaries and crystal grains, and is useful as a base material for various semiconductor devices.
（ホ）作用
不活性ガス雰囲気下、９００℃以上のアニール処理を行
うことにより、比較的大粒径の多結晶ノリコン薄層中の
結品内座欠陥が著しく減少されることとなる。(e) Function: By performing annealing treatment at 900° C. or higher in an inert gas atmosphere, crystal insemination defects in a thin layer of polycrystalline noricon with a relatively large grain size are significantly reduced.
（へ）実施例 以下、実施例により本発明をさらに詳しく説明する。(f) Example Hereinafter, the present invention will be explained in more detail with reference to Examples.
実施例１
（非晶質ノリコン層の形成）
まず、第１図（ａ）に示すように、石英基板１上にＳｉ
Ｈ，を原料ガスとするＣＶＤ法により窒素ガス流通下約
５００人の厚さの非晶質シリコン層２゛を形成した。こ
の際のＣＶＤの条件は以下の通りである。Example 1 (Formation of amorphous Noricon layer) First, as shown in FIG. 1(a), Si was deposited on a quartz substrate 1.
An amorphous silicon layer with a thickness of approximately 500 mm was formed by CVD using H, as a raw material gas under nitrogen gas flow. The CVD conditions at this time are as follows.
堆積温度二５００℃
堆積速度：〜１０人／ｗｉｎ
圧 カニ Ｄ、３Ｔｏｒｒ
流通（ＳｉＨａ） ： １００ｓｅｃ＋ｎＮ、流量：
３００ｓｃｃｍ
（多結晶化）
上記非晶質シリコン層形成基板を、窒素ガス流通下、６
００℃で９６時間加熱処理することにより、非晶質ンリ
コン層２゛を第１図（ｂ）に示すように結晶粒径約０．
５μｍの多結晶ノリコン層２に変換させた。なお、図中
３は多結晶シリコン層中に存在する結晶欠陥を示すもの
である。Deposition temperature: 2500°C Deposition rate: ~10 people/win Pressure Crab D, 3 Torr Distribution (SiHa): 100 sec + nN, flow rate:
300 sccm (Polycrystalization) The above amorphous silicon layer forming substrate was heated for 6 hours under nitrogen gas flow.
By heat-treating at 00°C for 96 hours, the amorphous silicon layer 2' has a crystal grain size of approximately 0.0°C as shown in FIG. 1(b).
It was converted into a polycrystalline Noricon layer 2 with a thickness of 5 μm. Note that 3 in the figure indicates a crystal defect existing in the polycrystalline silicon layer.
（高温アニール）
次いで、上記多結晶シリコン層形成基板を、窒素ガス流
通下、ランプアニール装置を用いて１１５０℃の温度で
１５０秒間アニール処理することにより、第１図に示さ
れるように、結晶欠陥が改善されたシリコン薄膜４を得
た。(High-temperature annealing) Next, the polycrystalline silicon layer-formed substrate is annealed at a temperature of 1150° C. for 150 seconds under nitrogen gas flow using a lamp annealing device to eliminate crystal defects as shown in FIG. A silicon thin film 4 with improved properties was obtained.
なお、このシリコン薄膜４の結晶欠陥については、ＥＳ
Ｒ（ＩＥ子ススピン共鳴によって評価を行ったが、それ
により、高温アニールをしない従来の多結晶シリコン薄
膜に比して、約１７１０であり、短時間の高温アニール
処理にも拘わらず、欠陥の量が著しく減少していること
が確認された。Regarding crystal defects in this silicon thin film 4, ES
R (Evaluation was performed by IE electron spin resonance, and it was found that it was approximately 1710 compared to a conventional polycrystalline silicon thin film that was not subjected to high-temperature annealing, and the amount of defects was reduced despite the short-time high-temperature annealing treatment. It was confirmed that there was a significant decrease in
なお、上記実施例では、ランプアニール装置によって加
熱を行ったか、電気炉を用いて１０００℃で３０分間高
温アニール処理を行っても同様の結果が得られた。In the above examples, similar results were obtained even when heating was performed using a lamp annealing device or high-temperature annealing treatment was performed at 1000° C. for 30 minutes using an electric furnace.
実施例２
ＳｉｔＨａを原料ガスとして、下記条件で非晶質シリコ
ン層を形成する以外、実施例１と同様にして５００人の
シリコン薄膜４を形成した。Example 2 A silicon thin film 4 of 500 people was formed in the same manner as in Example 1 except that an amorphous silicon layer was formed under the following conditions using SitHa as a source gas.
堆積温度二５００℃
堆積速度二〜７０、入／ｍｉｎ
圧 カニ Ｑ、２Ｔｏｒｒ
流通（ＳｉＪａ） ： １００１００５ｃ、流量： ３
００ｓｅｃ＠
このようにして得られたシリコン薄膜は、実施例１と同
様に、欠陥が著しく減少されたものであった。なお、本
実施例では、結晶粒径が１μｍを越える多結晶シリコン
薄膜を得た（実施例１より大）。Deposition temperature: 2500°C Deposition rate: 2-70, input/min Pressure: Crab Q, 2 Torr Distribution (SiJa): 1001005c, flow rate: 3
00sec@ The silicon thin film thus obtained had significantly fewer defects, as in Example 1. In this example, a polycrystalline silicon thin film with a crystal grain size exceeding 1 μm was obtained (larger than Example 1).
（ト）発明の効果
本発明によれば、結晶粒径が大きく、かつ粒内に欠陥の
少なく多結晶シリコン薄膜を形成゛することができ、こ
れを用いることにより、とくにリーク電流が小さくオン
電流の大きいＴＰＴを作製することができる。(G) Effects of the Invention According to the present invention, it is possible to form a polycrystalline silicon thin film having a large crystal grain size and few defects within the grains, and by using this, the leakage current is particularly small and the on-state current is small. It is possible to produce a TPT with a large value.
第１図（ａ）〜（ｃ）は、本発明のシリコン薄膜の製造
方法の製造工程を示す構成説明図である。
第１図
（ａ）
ｌ・・・・・石英基板、２・・・・多結晶ンリコン層、
２° ・・・・非晶質シリコン層、
３・・・・・欠陥、４・・・・・・ノリコン薄膜。
（ｂ）FIGS. 1(a) to 1(c) are structural explanatory diagrams showing the manufacturing steps of the silicon thin film manufacturing method of the present invention. Fig. 1(a) l: quartz substrate, 2: polycrystalline silicon layer,
2°...Amorphous silicon layer, 3...Defect, 4...Noricon thin film. (b)
Claims (1)
成し、この非晶質シリコン層を不活性ガス雰囲気下で約
５００〜７００℃の温度で処理して結晶化させ、次いで
不活性ガス雰囲気下で９００℃以上の温度でアニール処
理することからなるシリコン薄膜の製造方法。1. An amorphous silicon layer is formed on an insulating substrate by a vapor phase growth method, and this amorphous silicon layer is crystallized by treatment at a temperature of about 500 to 700°C in an inert gas atmosphere, and then an inert A method for producing a silicon thin film, which comprises annealing at a temperature of 900° C. or higher in a gas atmosphere.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2200021A JP2592984B2 (en) | 1990-07-28 | 1990-07-28 | Manufacturing method of silicon thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2200021A JP2592984B2 (en) | 1990-07-28 | 1990-07-28 | Manufacturing method of silicon thin film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0485922A true JPH0485922A (en) | 1992-03-18 |
| JP2592984B2 JP2592984B2 (en) | 1997-03-19 |
Family
ID=16417494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2200021A Expired - Fee Related JP2592984B2 (en) | 1990-07-28 | 1990-07-28 | Manufacturing method of silicon thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2592984B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6964890B1 (en) | 1992-03-17 | 2005-11-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| JP2010530642A (en) * | 2007-06-19 | 2010-09-09 | サンディスク スリーディー，エルエルシー | Junction diode with reduced reverse current |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01270309A (en) * | 1988-04-22 | 1989-10-27 | Seiko Epson Corp | Thin film formation method |
| JPH02154416A (en) * | 1988-12-07 | 1990-06-13 | Hitachi Ltd | Method for manufacturing semiconductor single crystal film |
-
1990
- 1990-07-28 JP JP2200021A patent/JP2592984B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01270309A (en) * | 1988-04-22 | 1989-10-27 | Seiko Epson Corp | Thin film formation method |
| JPH02154416A (en) * | 1988-12-07 | 1990-06-13 | Hitachi Ltd | Method for manufacturing semiconductor single crystal film |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6964890B1 (en) | 1992-03-17 | 2005-11-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| US7564057B1 (en) | 1992-03-17 | 2009-07-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having an aluminum nitride film |
| JP2010530642A (en) * | 2007-06-19 | 2010-09-09 | サンディスク スリーディー，エルエルシー | Junction diode with reduced reverse current |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2592984B2 (en) | 1997-03-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5275851A (en) | Low temperature crystallization and patterning of amorphous silicon films on electrically insulating substrates | |
| JPS6310573A (en) | Manufacturing method of semiconductor device | |
| US5624873A (en) | Enhanced crystallization of amorphous films | |
| US5470619A (en) | Method of the production of polycrystalline silicon thin films | |
| JPS6178119A (en) | Manufacture of semiconductor | |
| JPH02148831A (en) | Laser annealing method and thin film semiconductor device | |
| KR19980036973A (en) | Method of manufacturing polycrystalline thin film using microwave | |
| JP2746606B2 (en) | Method for producing large-particle polycrystalline film | |
| JPH0485922A (en) | Manufacturing method of silicon thin film | |
| JP3287834B2 (en) | Heat treatment method for polycrystalline semiconductor thin film | |
| JP3082164B2 (en) | Laser processing method and semiconductor device | |
| JPS58182816A (en) | Recrystallizing method of silicon family semiconductor material | |
| JP3093762B2 (en) | Method for manufacturing semiconductor device | |
| JPH0555142A (en) | Crystallizing method for amorphous semiconductor layer | |
| JPH02188499A (en) | Production of polycrystal silicon film having large crystal grain diameter | |
| JP3278237B2 (en) | Method for manufacturing thin film transistor | |
| JPH04120721A (en) | Semiconductor device and manufacture thereof | |
| JP3837527B2 (en) | Method for producing strained semiconductor single crystal | |
| KR960026967A (en) | Polycrystalline Thin Film Transistor and Manufacturing Method Thereof | |
| JPH04196312A (en) | Manufacture of semiconductor thin film | |
| JPH03257818A (en) | Manufacturing method of semiconductor device | |
| JPS6276514A (en) | Manufacture of semiconductor device | |
| JPH10116795A (en) | Equipment for manufacturing semiconductor material | |
| JPH033325A (en) | Formation of polycrystalline silicon film in semiconductor device | |
| JPH04311039A (en) | Manufacturing method of thin film transistor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20071219 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081219 Year of fee payment: 12 |
|
| LAPS | Cancellation because of no payment of annual fees |