JPH0481877B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a multilayer wiring board on which elements such as LSI are mounted, and in particular, a novel structure of a multilayer wiring board suitable for increasing the speed of electrical signal propagation within the board. and its manufacturing method.

[Background of the invention]

BACKGROUND ART In multilayer wiring boards for electronic computers, it is essential to use insulating substrates with low dielectric constants and high-density wiring in response to demands for faster electrical signal transmission and higher functionality.

On the other hand, conventional multilayer wiring boards use mainly thermosetting resins such as epoxy resins and polyimide resins, and copper-clad laminates as a base to form predetermined conductor wiring boards to form multiple layers. There is a method in which a thick wiring layer of a high-melting point metal is formed on an alumina green sheet, and then multi-layered and sintered.

Organic polymer films such as epoxy resins and alumina insulating base materials have large dielectric constants of 3 to 5 and 8 to 10, respectively, and there is a limit to how high-speed signal transmission can be achieved with wiring boards made of insulators.

On the other hand, as a method to achieve high-speed signal transmission, there are Japanese Patent Publications No. 57-39559 and No. 58-11117, which use air or other gas insulation between the inner layers of conductor wiring boards, and No. 48-41259, which uses aerial wiring as conductors. It is described in.

However, the special public service No. 57-39559 and the special public service No. 58-11117
In this case, between the signal layer wiring (X, Y
Since the organic insulating material is present in the dielectric direction), it is not possible to substantially reduce the dielectric constant. In addition, since chemical copper plating and electrolytic copper plating, which are common methods for constructing multilayer wiring boards, are used as the interlayer connection method, it is difficult to form minute through holes, etc., and the applicability to high-density wiring boards is low.

In addition, in Japanese Patent Publication No. 48-41259, a thin film conductor and through holes are formed by vapor deposition, and then the insulating resin layer that is the support is removed. , mechanical and physical strength cannot be ensured, making it impractical from a reliability standpoint.

[Purpose of the invention]

An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide a rational connection method that allows two-dimensional conductors formed with a predetermined conductor pattern to be laminated all at once or sequentially with a space between them.

Another object of the present invention is to provide a structure of a multilayer wiring board and a method for manufacturing the same, which enable high-speed electrical signal transmission within the wiring board.

[Summary of the invention]

As a result of various studies for the above purpose, the invention was achieved with the following features. That is, the present invention includes a step of forming a Ti metal film on one or both sides of a low-resistance metal plate, etching a predetermined portion of the Ti metal film, and
a step of exposing the steel and forming a land portion, a step of forming a resist pattern for forming a low melting point metal on the Ti metal film other than the land portion and its vicinity, a step of forming solder bumps on the land portion and its vicinity; a step of removing the resist pattern for forming a low melting point metal, a step of etching a predetermined portion of the Ti metal film and an exposed copper plate to form a two-dimensional conductor wiring board, heating a plurality of the two-dimensional conductor wiring boards,
This method of manufacturing a multilayer wiring board is characterized by comprising the steps of melting solder bumps, stacking them, and connecting them into one piece.

The bump-shaped low melting point metal on the land pattern is mainly composed of solder containing tin and lead as main components, and is formed by conventional photo-etching or selective resist masking by printing, and solder alloy is used. It is formed by plating, tin/lead two-layer plating, vapor deposition method, etc.

The main purpose of this low-melting point metal is to electrically connect the upper and lower layers (between each layer) of a predetermined conductor pattern wiring, but it also fixes the relative position between each layer and at the same time is used for three-dimensional assembly (multiplexing). It has the role of a support that ensures mechanical and physical strength.

Furthermore, by forming it in a bump shape, it is possible to maintain a hollow space between the above-mentioned layers, and a multilayer wiring board that is insulated with gas such as air becomes possible. In other words, the dielectric constant is reduced by gas insulation such as air,
High speed electrical signal transmission is achieved.

The conductive wiring constituting the conductive pattern of the present invention, that is, the signal pattern and the land pattern, is made of low-resistance materials such as Cu, Ag, Au, Al, Mo, W, Pt,
Although Ni etc. can be used, Cu is suitable from the viewpoint of cost and workability.

In addition, the wiring pattern of the conductor can be easily formed by using a plate-shaped conductor made of the above-mentioned material and using a combination of an ordinary photoetching method and an etching method for a conductive metal material. As the photoresist in this case, a positive type or negative type liquid photosensitive resist or a film type photosensitive resist (dry film) can be used.

The thickness of the plate conductor is not particularly limited, but is approximately 10 μm.
If the strength cannot be maintained mechanically or physically, a highly rigid metal such as Ni, Ti, Cr, etc. may be formed on the conductor such as Cu by plating, vapor deposition, or sputtering. It is possible to give rigidity to the entire structure by bonding or bonding.

[Embodiments of the invention]

An embodiment of the present invention will be explained in detail below using the drawings.

Example 1 FIG. 1a shows a plate-shaped conductor in which a Ti metal film 2 with a thickness of about 0.1 μm is formed on both sides of a copper plate 1 with a thickness of 20 μm using a normal vacuum evaporation method.

A negative photosensitive resist OMR-83 manufactured by Tokyo Ohka Co., Ltd. was applied with a spinner to both sides of this conductor, dried, and a glass photomask (not shown) having a connection land pattern at a predetermined position in a grid was adhered to both sides.
UV irradiation with 500WaXe-Hg lamp, OMR after exposure
The resist pattern 3 was developed using a 83 grade developer and washed with a special rinsing solution to form an etching resist pattern 3 having connection lands (FIG. 1b).

After that, the exposed Ti metal part was etched with a 50% sulfuric acid aqueous solution (solution temperature 50℃) (Fig. 1c), and
The resist film was removed by immersing it in a special stripping solution for OMR-83 (manufactured by Tokyo Ohka) to form a plate-shaped conductor (FIG. 1d) having a connection land (exposed copper).

Next, a negative photosensitive resist OMR-83 (manufactured by Tokyo Ohka) was applied with a spinner to both sides of the plate-shaped conductor.
After drying, attach a glass mask (not shown) to both sides to form a low-melting metal for connection in a predetermined position, and use a photo process of exposing to ultraviolet light using a Xe-Hg lamp, developing, and rinsing to form a resist for forming a low-melting metal. Pattern 4 was formed (Fig. 1e).

The plate-shaped conductive substrate obtained in Fig. 1e was subjected to alkaline degreasing (Nutra Clean 68, Shippray Co., Ltd.), which is a normal electroplating pretreatment process, and 5%
After HCl pickling treatment, solder with a tin/lead alloy ratio of 60/40 is applied to the specified part (connection pad part), and as shown in Figure 1 f, approximately A 20 μm connecting solder bump 5 was formed.

The soldering liquid composition and conditions used are as follows.

(Liquid composition) Tin borofluoride (45%)...110 to 330 ml/, preferably 220 ml/ Lead borofufluoride (45%)...50 to 150 ml/, preferably 175 ml/Borosic acid...50 to 150 ml/, preferably 175 ml/
Gelatin...1-10g/, preferably 6g/Boric acid...5-20g/, preferably 12g/ (Plating conditions) Liquid temperature...20-30℃, preferably 25℃ Current density...1-3A/ ^dm2 , Preferably, after forming solder bumps on the 2A/dm ² connection pads,
OMR- of resist pattern 4 for forming low melting point metal
83 exclusive stripping solution (manufactured by Tokyo Ohka) was used to peel and remove the conductor, thereby forming a plate-shaped conductor having solder bumps 5 for connection as shown in FIG. 1g.

Next, as shown in FIG. 1h, a conductor pattern forming resist 6 is coated on both sides of the plate-shaped conductor (solder bump forming conductor plate) using a negative photosensitive resist OMR-83 (Tokyo Ohka), dried, and a predetermined pattern is formed. A glass mask (not shown) with a signal wiring pattern is adhered to both sides, exposed to ultraviolet light using a Xe-Hg lamp, and then treated with OMR-83 exclusive developer and rinsing liquid to form an etching resist to obtain a signal conductor wiring pattern. Six patterns were formed (Fig. 1i).

The conductor pattern glass mask used in this example has a mesh wiring pattern, and the intersections of the wiring portions have connection pad patterns.

The Ti metal film 2 on both the front and back surfaces of the plate-shaped conductor substrate on which the etching resist pattern has been formed is removed by etching with a 50% sulfuric acid solution (50°C) (Fig. 2a), and then ammonium persulfate: 100 to 300 g/(preferably 200g/), ammonium chloride: 20-50g/
The exposed portion of the copper plate 1 is removed by etching using an etching solution (preferably 32g/) (FIG. 2b).

Thereafter, the conductor pattern forming resist film 6 is removed using a special stripping solution for OMR-83, and a two-dimensional conductor wiring having conductor wiring patterns and solder bumps 5 for connecting low melting point metals at the intersections of the wiring patterns as shown in FIG. did.

Next, the above-mentioned wiring conductor was placed in a furnace at about 300° C. for 15 minutes, and the connecting solder bumps 5 were melted (wetbacked) to form spherical solder bumps as shown in FIG. 2d.

The above spherical solder bump is a Ti
Since the solder wettability with respect to the metal film 2 is poor, that is, the Ti metal film acts as a dam to prevent solder flow, the surface tension of the molten solder forms a spherical solder.

Next, the above-mentioned two-dimensional conductor wiring bodies were stacked one after another at predetermined connection positions, and placed in a 300°C furnace for 15 minutes.
Solder connections are made at predetermined positions as shown in FIG. 2e.

Thereafter, using a CO ₂ gas laser with a maximum output of 10 KW, unnecessary conductor portions 7 are cut at a continuous output of 500 W to form a desired conductor circuit. After that, the two-dimensional conductor wiring bodies are sequentially stacked and melted in the same manner as above.
Repeatedly connecting or cutting unnecessary conductor parts,
As shown in FIG. 2f, a multi-layer wiring board having a hollow structure consisting of air insulating layers 8 between each layer and between conductors was manufactured.

Example 2 In forming a low melting point metal on the interlayer connection pad portion of Examples 1 and 3, on a predetermined connection pad,
First, a lead plating film of 8 μm is formed, and after washing with water, a tin plating film of 12 μm is formed on the lead plating, and a low melting point metal is formed by double layer plating with a tin/lead alloy ratio of 60/40 when heated and melted. did. The above lead and tin plating solution composition and conditions are as follows.

(Plated) Basic lead carbonate...10-40g/Sulfamic acid...50-150g/Ammonia water (28%)...20-80ml/Gelatin...0.5-3g/Liquid temperature: 20-30℃ Current density: 1- 3A/dm ² (Tin plating) Tin sulfate...10~40g/Sulfamic acid...20~60g/Tartaric acid...0.5~5g/Liquid temperature: 20~30℃ Current density: 0.5~2A/ ^dm2 Obtained by the above method Example 1
A conductor wiring body is formed by the same method as in 3, and then placed in a 300℃ furnace for 15 minutes to heat and melt lead and tin to form connection spherical solder bumps with a tin/lead alloy ratio of 60/40. Formed.

〔Effect of the invention〕

As explained above, in the present invention, since a Ti metal film with poor wettability for solder bumps is formed on one or both sides of a low-resistance metal plate, Ti metal film is The membrane acts as a dam and prevents solder from flowing.
Positioning accuracy can be greatly improved. Furthermore, since the Ti metal film increases the rigidity of the low-resistance metal plate, mechanical and physical strength can be ensured, and a highly reliable multilayer wiring board can be obtained.

[Brief explanation of the drawing]

1 and 2 are cross-sectional views of the manufacturing process of the multilayer wiring board of the present invention. 1... Copper plate, 2... Titanium metal film, 3... Etching resist, 4... Resist for forming low melting point metal, 5... Solder bump for connection, 6... Resist for forming conductor pattern, 7... Cutting unnecessary conductor Part 8...
...Air insulation layer.

Claims (1)

[Claims] 1 Step of forming a Ti metal film on one or both sides of a low-resistance metal plate; Step of etching a predetermined portion of the Ti metal film to expose the steel to form a land portion; A step of forming a resist pattern for forming a low melting point metal on the metal film, a step of forming a solder bump at the land portion and its vicinity, a step of removing the resist pattern for forming the low melting point metal, and a predetermined portion of the Ti metal film and exposure. A multilayer method comprising the steps of etching a copper plate to form a two-dimensional conductor wiring board, and heating a plurality of the two-dimensional conductor wiring boards to melt the solder bumps and stacking them to integrate the connections. Method of manufacturing wiring boards.