JPH0479003B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention selects two asynchronous original oscillation signals, a high frequency clock signal and a low frequency clock signal, as the original oscillation signals of the system clock of a microcomputer. The present invention relates to a switchable one-chip microcomputer, and particularly to a CMOS one-chip microcomputer that can stop the oscillation of a high-frequency clock signal when the clock signal is switched to a low-frequency clock signal, thereby reducing the power consumption of the entire system.

[Conventional technology]

Conventionally, a system clock control system of this type of one-chip microcomputer has the configuration shown in FIG. In the figure, 21 is an oscillation circuit, XAi is its oscillation input, XAo is its oscillation output, and an oscillation output φA is obtained inside the microcomputer. In addition, 22 is the above oscillation output φA
23 is a system clock control circuit that generates a system clock φ based on the oscillation operation.
This is an oscillation control circuit that controls stopping. In the control circuit 23, CA is a signal for controlling oscillation stop;
W is a signal for stopping the supply of the system clock φ to the inside of the microcomputer, and INT is an interrupt input for canceling the stop signal from the outside. Note that 24 indicates the entire system of a 1-chip microcomputer.

Next, the operation of this conventional circuit will be explained. Normally, at the start of operation, the oscillation circuit 21 starts oscillating and a system clock φ is generated, thereby executing the program in the microcomputer main body. At this time, the oscillation stop signal CA from the oscillation control circuit 23 or the internal clock supply stop signal W
is usually "L".

Next, when the microcomputer executes a specific command in the program, it outputs a control signal to the oscillation control circuit 23, which causes the CA or W signal to become "H" and stop the oscillation or clock supply. . Note that this stop signal is canceled by the INT input.

[Problem that the invention seeks to solve]

Conventional 1-chip microcomputers are configured as described above, and since only one type of frequency was used as the source oscillation of the system clock, processing performance may be reduced, so a mode to reduce power consumption and a high frequency It was not possible to meet the demand for a clock signal with a mode having high processing capacity.

This invention was made in order to solve the problems of the conventional circuit as described above.It has two asynchronous oscillation sources, and uses the system clock obtained from the oscillation source of a high frequency clock signal during normal high processing performance. It is an object of the present invention to provide a one-chip microcomputer that operates with a system clock obtained from a low frequency clock signal oscillation source when it is desired to reduce power consumption.

[Means for solving problems]

The one-chip microcomputer according to the present invention includes two circuits as oscillation circuits, one for high-frequency clock signals and one for low-frequency clock signals.
The present invention includes a switching circuit that selects one of the two asynchronous signal sources based on the value of the selection control signal generated by the selection value generation means.

In addition to being able to select this signal source, it is also possible to stop or restore the output of the high frequency clock signal, depending on the value of the oscillation stop signal generated by the oscillation stop signal value generation means independently of the selection value generation means. This is designed to stop or restore the high frequency clock signal.

[Effect]

The one-chip microcomputer according to the present invention has a high frequency mode and a low frequency mode of the system clock, and since these modes can be switched, high-speed processing and low-speed processing can be selected.

Furthermore, when the high frequency clock signal oscillation circuit has an operation mode and a stop mode, one of three states can be selected, which is the high speed processing, low speed processing, and low speed processing with low power consumption.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a one-chip microcomputer according to one embodiment of the present invention. In the figure, 11
is a high frequency clock signal oscillation circuit (first oscillation circuit), XAi is its oscillation input, XAo is its oscillation output, and φA is a high frequency clock signal, which is the oscillation output to the inside of the microcomputer. Reference numeral 12 denotes an oscillation circuit (second oscillation circuit) for a low frequency clock signal, which has low power consumption so as to reduce power consumption during oscillation. XBi
is its oscillation input, XBo is its oscillation output, and φB is a low frequency clock signal, which is the oscillation output to the inside of the microcomputer. 13 is a control circuit that generates the system clock φ in response to the original oscillation, and 14 is a clock signal switching circuit (selection circuit) that selects the two asynchronous signals φA and φB based on the control input S from the microcomputer main body. It is. 15
is an oscillation control circuit that controls the stopping of oscillation of the oscillator 11 or 12 by executing a program in the microcomputer main body, and controls the stopping of oscillation of the oscillating circuit 11 by its CA output, and controls the stopping of oscillation of the oscillating circuit 12 by its CB output. Controls oscillation stop. Further, W is a signal for controlling supply stop of the internal system clock φ. These stop control signals are canceled by external interrupt input INT. Also, 16 is 1
The entire system of a chip microcomputer is shown. This microcomputer 16 is
It is manufactured using a CMOS process.

Next, the operation of the above embodiment of the present invention will be explained. Normally, at the start of operation, the switching circuit 14 is on the high frequency clock signal φA side, and operates in the same way as a conventional microcomputer. At this time, the oscillation stop signals CA, CB or the internal clock supply stop signal W are normally "L". When the value of the selection control signal S changes due to the execution of a specific command in the program, the switching circuit 14 operates and the system clock φ
becomes low speed mode. Furthermore, by executing a command to set the oscillation stop signal CA to "H", the high frequency clock signal oscillation can be stopped and a low power consumption mode can be established. Furthermore, by executing the command to set the signal W to "H", the supply of the system clock to the internal circuit is also stopped, making it possible to further reduce power consumption. Returning from this mode is performed by an external (or internally generated by a timer, etc.) interrupt, which supplies the internal system clock again, and then executes the program to release the high-frequency clock signal oscillation stop and restart the system. The operation can be returned to normal high-speed processing mode.

In the above embodiment, a one-chip microcomputer is provided with a control signal CB for stopping low-frequency clock signal oscillation and a control signal W for stopping internal clock supply, but a one-chip microcomputer may be provided without these control signals. The same effects as in the above embodiment are achieved.

〔Effect of the invention〕

As described above, according to the one-chip microcomputer according to the present invention, two oscillation circuits, a high-frequency clock signal and a low-frequency clock signal, can be selected as the oscillation source of the system clock of the one-chip microcomputer, so that high-speed This has the advantage of being able to select two modes: processing mode and low-speed processing mode.

Further, the signal from the high frequency clock signal oscillation source is configured to be able to be stopped or restored, and the above-mentioned selection is performed by the value of the selection control signal generated by the selection value generation means, and the above-mentioned stop or restoration is made by the selection value generation means. Since this is performed using the value of the oscillation stop signal independently generated by the oscillation stop signal value generation means, there is an effect that processing can be performed in a plurality of modes such as high speed processing and low speed processing with low power consumption.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of a system clock control system of a one-chip microcomputer according to an embodiment of the present invention, and FIG. 2 is a diagram showing the configuration of a system clock control system of a conventional one-chip microcomputer. . 11, 12...first and second oscillation circuits, 14...
...Clock signal switching circuit (selection circuit).

Claims (1)

[Scope of Claims] 1: a high-frequency clock signal oscillation circuit that outputs a high-frequency clock signal; a low-frequency clock signal oscillation circuit that outputs a low-frequency clock signal; and either the high-frequency clock signal or the low-frequency clock signal. selection value generation means for generating a value of a selection control signal for selecting one; and selection value generation means for generating a value of an oscillation stop signal for indicating whether output of the high frequency clock signal is to be stopped or restored. oscillation stop signal value generation means that independently generates the high frequency clock signal and the low frequency clock signal; the high frequency clock signal and the low frequency clock signal are input, and based on the value of the selection control signal, one of the high frequency clock signal and the low frequency clock signal is input; A switching circuit selects and outputs it as a system clock signal of the one-chip microcomputer, and controls whether to stop or restore the output of the high frequency clock signal.
A one-chip microcomputer comprising: an oscillation control circuit that outputs the oscillation stop signal based on the value of the oscillation stop signal to the high frequency clock signal oscillation circuit.