JPH0464177A - Image display device - Google Patents

Abstract

PURPOSE:To realize the reduction of display processing time and the low pricing of an image display device by converting a picture element address by a conversion rule set in advance, and making access image memory with a conversion address. CONSTITUTION:This device is equipped with an address conversion means 15 which outputs the conversion address by converting the picture element address by the conversion rule set in advance, a supply means 12 which supplies the picture element address to the address conversion means 15, and an access means 13 which makes access the image memory 16 with the conversion address. A display address is converted to the conversion address by an address conversion RAM, and access to the image memory 16 is performed by using the conversion address. Thereby, it is possible to dispense with memory for processing and to realize the low pricing of the image display device.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an image display device for displaying image data stored in an image memory.

(Prior Art) Conventionally, as an image display device, for example, an image processing device shown in FIG. 3 is known.

Referring to FIG. 3, display address counter 2
The display address is output from 01, and the image memory 202
given to. Image memory 202 stores image data having a plurality of pixel data, and each pixel data is stored at a different address. The image memory 202 sequentially stores pixel data in response to the display address.
In other words, image data is output. This image data is then transferred to a digital-to-analog (D/A) converter 20.
3, the signal is converted into an analog image signal and provided to the image display section.

Here, with reference also to FIG. 4, for example, the image memory 20
2 has addresses (0000), (0001), ・
..., (9900).

. . , 9900th pixel data p1 . The data is at addresses (0000), (0001),..., as shown in Figure 4(b).
(9900), . . . , 0th pixel data p1, 9900th pixel data p1, . . . are displayed, respectively. That is, in conventional image display devices, the position of pixel data on the image display section and the pixel data address on the image memory are in a one-to-one relationship.

Therefore, in a conventional image display device, when performing processing such as enlarging, reducing, or rotating an image to be displayed, it is necessary to perform processing different from display processing.

As an example, when performing reduction processing, image data is once transferred from the image memory to the reduction processing memory. Then, using a processing device such as a CPU, for example, if the reduction magnification is 172, the image data is thinned out at a ratio of 1 pixel to 2 pixels, and then the 1/2 reduced image is displayed on the image display section. The address on the processing memory is calculated for each pixel so that it will be displayed. Based on these calculated addresses, the image data is read out from the processing memory and transferred to the display area in the image memory, after which the reduced image is displayed. It should be noted that similar processing is performed for enlargement, rotation, etc. of the image for display.

Margin below (Problem to be Solved by the Invention) As mentioned above, when reducing, enlarging, or rotating an image in a conventional image display device, a separate processing memory is provided to perform reduction processing on image data. When trying to display an image in a reduced size, not only does the display process take time, but processing memory must also be provided in addition to the image memory, resulting in high costs. There is.

An object of the present invention is to provide an inexpensive image display device that can perform display processing such as reduction in a short time.

(Means for Solving the Problems) According to the present invention, there is provided an image memory that stores image data having a plurality of pixel data in correspondence with a pixel address for each pixel data, and image data read out from the image memory. In an image display device that has an image display section that displays a pixel address and reads image data by accessing the image memory using a pixel address, the pixel address is converted according to a preset conversion rule to obtain a converted address. an address conversion means for outputting, a supply means for supplying a pixel address to the address conversion means, an access means for accessing the image memory with the conversion address, a setting means for setting a conversion rule in the address conversion means, and a conversion rule by the setting means. There is obtained an image display device characterized in that it has a separating means for separating the supply means from the address converting means when the address converting means is set.

(Example) The present invention will be explained below with reference to Examples.

Referring to FIG. 1, when displaying an image, a display clock from a display clock generation circuit 11 is applied to a display address counter 12. The display address counter 12 is
Generates a display address (pixel address) in response to a display clock.

A display command (command representing normal display, reduced display, enlarged display, or rotated display) indicating the display state of the image to be displayed is given to the RAM control unit 13.

When receiving the display command, the RAM control unit 13 switches the address switch 14 so that the RAM control unit 13 can access the address conversion RAM 15 via the address switch 14. In other words, the display address counter 12 is separated from the address conversion RAM 15. After that, R.A.
The M control unit 13 writes display state data indicated by the display command into the address conversion RAMI 5 (for example, when displaying is reduced to 1/2, 1/2 reduction display data is written into the address conversion RAMI 5).

Here, referring also to FIG. 2, here, the image memory 1
6 stores image data for 100 dots horizontally and 100 lines vertically, and a case will be described in which this image data is reduced to 1/2 in the horizontal and vertical directions and displayed.

As mentioned above, in this case, the RAM controller 13 has 1/2
A reduced display command is given, and as a result, address translation RA
1/2 reduction display data is written into M15. For example, as shown in FIG. 2(a), address conversion RAM1
5 contains conversion data (0) corresponding to address (0000).
000) corresponds to address (0001), conversion data (0002) corresponds to address (0002), conversion data (0004) corresponds to address (0203), and so on.
Conversion data (040B) will be written in response to. In other words, (address: conversion data) - (000
0:0000), (0001:0002), (0002
:0004).

(0003:000B),...,(0100:020
0), (0101:0202).

(0102:0204), (0103:020B)...
・It is written in a closed form.

When the RAM control unit 13 writes the 1/2 reduced display data to the address conversion RAM 15, it controls the address switch 14 and switches between the display address counter 12 and the address conversion RAM.
Connect with M15. As a result, the display address is given to the address conversion RAM 15.

The display address is (0000), (0001),
Address conversion RAM 15 in the order of (0002),...
, the address conversion RAM 15 responds to the display address and converts the conversion data (conversion address) to (000
0), (0002).

(0004)... are output in this order.

The image memory 16 has addresses (0000), (0001), . . . as shown in FIG. 2(b).
(9900), . . . , 0th pixel data, 1 1st pixel data p1, . . . , 9900th pixel data p1, . In other words, the pixel data accessed by the converted data and corresponding to the address indicated by the converted data is read out. Therefore, from the image memory 16, the 0th pixel data 1 the 2nd pixel data p1 the 4th pixel data p
1... Read out the 404th pixel data p..., D/
It is applied to an image display section (not shown) via the A converter 17. As a result, the address (0000) is displayed on the image display section, as shown in FIG. 2(c).

(0002), ..., (0404), ..., respectively, 0th pixel data 1 2nd pixel data p
1..., 404th pixel data p1... are displayed. In other words, the image stored in the image memory 16 is reduced to 1/2 and displayed on the image display section.

When performing enlarged display or rotated display, use the RA
The M control unit 13 associates the enlarged display data and rotated display data with the display address and converts the address R.
Just write to AM15.

Further, when performing normal display, the RAM control unit 13 writes the display address and conversion data in a one-to-one correspondence to the address conversion RAM 15.

(Effects of the Invention) As explained above, since the display address is converted to a conversion address in the address conversion RAM as necessary and the image memory is accessed using this conversion address, the image can be reduced, enlarged, Alternatively, the processing time when performing rotation etc. becomes extremely short.

Furthermore, there is no need for the processing memory that was conventionally required, and the image display device becomes less expensive.

[Brief explanation of drawings]

FIG. 1 is a block diagram schematically showing an image display device according to the present invention, FIGS. 2(a) to (c) are diagrams for explaining the reduction operation of the image display device shown in FIG. 1, and FIG. FIG. 4(a) is a block diagram schematically showing a conventional image processing device.
and (b) are diagrams for explaining the reduction operation of the image display device shown in FIG. 3. 11...Display clock generation circuit, 12...Display address counter 13...RAM control unit, 14...
Address switcher, 15...Address conversion RAM, 16
...Image memory 17...D/A converter Fig. 4 (CI) (b)

Claims (1)

[Claims] 1. An image memory that stores image data having a plurality of pixel data in correspondence with a pixel address for each pixel data, and an image display section that displays the image data read from the image memory. and an image display device configured to access the image memory and read the image data using the pixel address, converting the pixel address according to a preset conversion rule and outputting a converted address. An image display device comprising: address conversion means; supply means for supplying the pixel address to the address conversion means; and access means for accessing the image memory using the converted address. 2. An image display apparatus according to claim 1, further comprising a setting means for setting the conversion rule in the address conversion means. 3. The image display device according to claim 2, further comprising disconnection means for separating the supply means from the address conversion means when the conversion rule is set in the address conversion means by the setting means. An image display device characterized by: