JPH0456347A - Semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a technology for configuring external terminals of a semiconductor device, and in particular to a technology that is effective in preventing non-operation and destruction due to reverse mounting. be.

[Conventional technology]

2. Description of the Related Art Conventionally, semiconductor devices have a directional property and are configured such that they do not operate unless they are mounted in a predetermined direction.

For example, JEDEC5OL4D 5TATE PROD
UCTS 0tlTLINB (JEC Solid State Products Outline) MO-
As described in 001, AA-AD, 6/1/76, an index area is provided at one end of a dual-in-line package (DIP) to specify the mounting direction.

By the way, the present inventor has studied reverse mounting of a semiconductor device having directionality.

The following are the techniques studied by the present inventor, and the outline thereof is as follows.

In other words, semiconductor devices generally have leads formed symmetrically with respect to the center of the package, and these leads are located on the left and right sides (
or all four sides) have the same shape and the same arrangement.

FIGS. 6(a) and 6(b) show plan views of a conventional semiconductor device using a dual-in-line package (DIP). As shown in the figure, a plurality of external terminals 2 (leads) are provided on both left and right sides of the package 1 at regular intervals and are formed symmetrically.

Eight external terminals 2 are provided: a power supply terminal Vcc (for example, +5V), a ground terminal VSS, and signal terminals A, B, C, D, E, and F.

A dot-like index 3 is provided in a part of one corner of the package 1 (near the signal terminal in FIG. 6),
Index mark on the board or socket 1 on the board side
By mounting it in correspondence with the number pin, the direction can be specified.

In this way, by providing the index 3 and specifying the mounting direction, incorrect mounting by the user can be prevented. In addition to making index 3 dot-shaped, marks,
Notches, protrusions, groove-like recesses, etc. may also be provided.

[Problem to be solved by the invention]

However, in the semiconductor device as described above, even if the index means is provided, the sixth [f! As shown in J(b), even if the external terminals 2 are rotated by 180 degrees, the arrangement of the external terminals 2 does not change, and it is possible to mount the terminals in the opposite direction.Incorrect mounting is unavoidable, and mounting in the reverse direction is not possible. If this occurs, it may not only cause malfunction but also damage (in the example shown in Figure 6, the power supply becomes reverse polarity).

Therefore, an object of the present invention is to provide a technique that can guarantee normal operation even when mounting is performed in the reverse direction.

Another object of the present invention is to provide a technique that can reduce the generation of noise caused by power supply wiring.

The above objects and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving tll]

A brief overview of typical inventions disclosed in this application is as follows.

That is, it is a semiconductor device in which a plurality of external terminals are arranged on each of at least two opposing sides of a package, and the external terminals facing each other through the center point of the package are used for the same purpose.

[Effect]

According to the above-mentioned means, specific external terminals that face each other through the center point of the package are used for the same purpose (such as VCC or ground if related to power supply, data terminal if related to signal, etc.).

This ensures operation even when mounted in the opposite direction, and further prevents damage.

[Embodiment 1] FIGS. 1(a) and 1(b) are plan views showing an embodiment of a semiconductor device according to the present invention.

In this embodiment, as shown in Fig. 1 (a), the arrangement of the external terminals 2 is the same when mounting in the normal position and when mounting in the reverse direction, thereby eliminating the adverse effects of mounting in the reverse direction. It is.

That is, whereas conventionally, one external terminal 2 for signals and power was assigned to one function and these were distributed and arranged on both sides, the present invention has an external terminal for all functions on one side. Arrange all terminals 2 (V s s -A →B
-C-D -E → F -V c c) and change the arrangement direction (Vcc → F → E-D → C → B-A → VS
S) An external terminal 2 with the same content is also provided on the other side. In this case too, an index 3 is provided on the puff cage 1 according to conventional practice.

With this configuration, even if the part that should be mounted in the state shown in Fig. 1 (a) is mistakenly mounted in the opposite direction as shown in Fig. 1 (c), the external terminals 2 with the same function will be placed in the same position. and works perfectly regardless of implementation direction.

Such features can contribute to improving yield and reducing costs, especially since there are no restrictions on the mounting direction during IC characteristic testing or printed circuit board mounting.

Also, external terminal 2 related to power supply terminal (Vcc and V■)
are provided on both sides, these numbers are doubled, and the terminal V. The inductance between 0 and the terminal VSS can be reduced, the power supply impedance can be lowered, and the f1 noise property can be improved.

[Embodiment 2] FIG. 2 is a plan view showing a second embodiment of the semiconductor device according to the present invention.

The above embodiment has both power supply-related and signal-related external terminals 2.
In contrast, in this embodiment, only power-related terminals are provided on both sides, thereby reducing the number of external terminals 2 and preventing the package size from increasing. .

In this case, the signal terminals will be incorrectly connected due to the backward mounting, but the power supply will be connected correctly, so no damage will occur.

[Example 3] FIG. 3 is a plan view showing a third embodiment of the present invention.

This embodiment is an example of a QFP (quad flat package) type semiconductor device, in which external terminals 2 of the same number and in the same arrangement order are provided around all four sides. The functions and number of external terminals 2 are the same as in FIG.

According to this configuration, even when mounted in a state rotated by 90°, 180°, or 270° from the normal position (that is, incorrect mounting), it is possible to operate completely.

[Example 4] FIG. 4 is a plan view showing a specific embodiment of the present invention.

While each of the above embodiments schematically shows a semiconductor device, here an actual product is shown as an example. That is, a 512k x 8-bit, 4-megabit dual
The terminal arrangement of an in-line package type static RAM is shown.

Here, CE bar and WE bar indicate chip selection terminals and write terminals, AO to A17 are address terminals, and 100
~IO7 indicates a data terminal.

Among these, the address and data terminals can perform the same operation regardless of which terminal is used, so in order to reduce the number of terminals, the upper and lower addresses of the address and data terminals are arranged symmetrically. do. Note that since the number of address terminals is odd, only AO terminals are provided on both sides. In addition, power supply-related terminals are arranged in the center of the terminal row.

In this embodiment, compared to the number of terminals (32 pins) of a conventional 4M-bit static RAM, the number of terminals is increased by only 4, and the adverse effects (such as destruction) caused by reverse mounting can be eliminated.

FIG. 5 is a plan view showing an example in which a plurality of semiconductor devices according to the present invention are mounted. Here, only power supply-related wiring is shown.

In the semiconductor device shown in FIGS. 1 and 2, the VC
C and VSS are arranged at the outermost end of the terminal row. Therefore, VCC pattern 5 and VS1 pattern 6 are duplicated vertically so that terminals (Vcc or Vss) of the same purpose (same function) for adjacent semiconductor devices [4] are connected in one area. Form it like this.

By doing this, VCC pattern 5 and CFV
The ss pattern 6 can have a large area, the power source impedance can be lowered, and electrostatic shielding can also be achieved, making it possible to obtain a printed wiring pattern suitable for high-speed operation.

Above, the invention made by the present inventor has been specifically explained based on Examples, but it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. stomach.

For example, in the above embodiment, the DIP type and QFP type were illustrated, but the PGA (bin grid array) type, LC
It is also applicable to C (leadless chip carrier) type.

〔Effect of the invention〕

Among the inventions disclosed in this application, the effects obtained by typical ones are as follows.

In other words, it is a semiconductor device in which a plurality of external terminals are arranged on each of two opposing sides of a package, and since the external terminals facing each other through the center point of the package are used for the same purpose, it is possible to mount them in opposite directions. operation is guaranteed even in the worst case, and further damage can be prevented.

In addition, the power supply wiring becomes wider, which improves noise resistance.
It will also be able to handle higher speeds.

[Brief explanation of drawings]

1(a) and (b) are plan views showing one embodiment of a semiconductor device according to the present invention, FIG. 2 is a plan view showing a second embodiment of a semiconductor device according to the present invention, and FIG. 3 is a plan view showing an embodiment of a semiconductor device according to the present invention. 4 is a plan view showing a specific embodiment of the present invention, FIG. 5 is a plan view showing an example in which a plurality of semiconductor devices according to the present invention are mounted, and FIG. 6 is a plan view showing a third embodiment of the present invention. a) and (b) are plan views showing a conventional semiconductor device using a dual-in-line package.
c pattern,

Claims (1)

[Claims] 1. A semiconductor device in which a plurality of external terminals are arranged on each of at least two opposing sides of a package, in which the external terminals facing each other through the center point of the package are used for the same purpose. A semiconductor device characterized by: 2. The semiconductor device according to claim 1, wherein the external terminals used for the same purpose are related to a power supply. 3. The semiconductor device according to claim 1, wherein the external terminals used for the same purpose are signal-related. 4. The semiconductor device according to claim 1, wherein all of the external terminals are used for the same purpose.