JPH0456240A - Analysis of trouble of integrated circuit - Google Patents

Abstract

PURPOSE:To obtain an analytical method capable of detecting simply a defective place of an integrated circuit, in particular a discontinuity generated place, by a method wherein a first ion beam is radiated, an insulating film is etched to form a window which enables to expose a first conductive film, and after a second conductive film is formed with a second ion beam, secondary electrons generated by scanning a third ion beam are detected. CONSTITUTION:A process wherein a first ion beam is radiated on a prescribed region of the surface of a semiconductor substrate 1 at least formed with a first conductive film 5 and an insulating film 6 in this order of the film 5 and the film 6 and the film 6 is etched to form a window 7 which enables to expose the film 5, a process for forming a second conductive film 8 at a region including at least the above window 7 with a second ion beam, a process for scanning the surfaces of the above films 6 and 8 with a third ion beam and a process for detecting secondary electrons generated by the scanning of the third ion beam are provided. For example, Ga ions are radiated, a protective film 6 is subjected to sputter etching to form a through hole 7, then, a W metal film 8 is deposited by a convergent ion beam pumping CVD method. Then, the surface of an integrated circuit 11 is scanned with Ga ions and a secondary electron image is observed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a failure analysis method for detecting a fault location where a disconnection occurs in an integrated circuit.

2. Description of the Related Art In recent years, integrated circuits have become smaller and more highly integrated, and device structures have become more complex. For example, multilayer wiring technology, etc. These technological trends toward miniaturization and higher integration inevitably make failure analysis of integrated circuits difficult. Conventionally, in order to detect a failure location, the AI wiring was cut with a probe needle or a laser beam, etc., the probe needle was set up on the A1 wiring, and the failure location was detected while measuring voltage or current.

Problems to be Solved by the Invention However, in the conventional failure analysis method described above, it is difficult to set up probe needles due to miniaturization, and it takes a great deal of effort to discover local disconnections in highly integrated circuits. This method has the drawback of requiring time and effort.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems, and aims to provide an analysis method that can easily detect defective locations in integrated circuits, particularly locations where disconnections have occurred.

Means for Solving the Problem In order to achieve this object, the integrated circuit failure analysis method of the present invention locally irradiates the surface of the integrated circuit with a focused ion beam to locally charge the surface of the integrated circuit. It has a configuration that measures changes in the amount of secondary electrons emitted from the circuit surface.

Effect: When the surface of an integrated circuit is locally irradiated with a focused ion beam in this way, the surface of the integrated circuit is positively charged if it is on an insulating film such as a protective film. Furthermore, if a metal surface is exposed on the surface of an integrated circuit, the charged charges will flow into conductive wiring portions.

At the contact portion, it flows into the silicon substrate. When observing a secondary electron image excited by the focused ion beam, only the contact portion can be easily identified even from above the protective film.

If there is a disconnection between wires, the electrical charges are stopped at the disconnected portion, so a secondary electron image of the contact portion near the disconnected portion is not observed, and the wiring location can be detected.

EXAMPLE An example of the present invention will be described below with reference to the drawings.

FIG. 1 shows a cross section of a wiring portion of an integrated circuit device according to a first embodiment of the present invention. In the figure, 1 is a silicon substrate, 2 is an impurity diffusion layer, 3 is an interlayer insulating film, 4 is a contact window A, 5 is a conductive film, 6 is a protective film, 7 is a through hole, 8 is a W metal film, and 9 is a W metal film. The disconnection point 10 is the contact window B.

FIG. 2 is a block diagram showing the integrated circuit failure analysis apparatus of the present invention. 11 is an integrated circuit device; 12 is an integrated circuit device 11;
a scanning focused ion beam probe that locally irradiates the chip surface with a scanning focused ion beam and is movable to any position on the chip surface; 13 is an ion gun; 14 is an accelerator;
is an ion irradiation current control device, which controls the acceleration voltage and ion irradiation current of the scanning focused ion beam. 16 is a secondary electron detector, and 17 is a gas gun for forming a W metal film by a focused ion beam excitation CVD method.

Next, a method for performing failure analysis of the integrated circuit device' of the first embodiment using such a failure analysis apparatus will be described in detail.

First, in order to easily detect a disconnection point in the conductive film 5 inside the integrated circuit device, positive Ga ions with an acceleration voltage of 30 kV, an ion beam current of 103 pA, and a beam diameter of 0.45 μm are injected into the protective film 5 as a focused ion beam. 1μm above
The protective film 6 is sputter-etched by scanning for 30 seconds in a range of 1 μm x 1 μm to form a through hole 7. Furthermore, using W (CO) s gas as a source gas, a W metal film 8 having a specific resistance of 100 to 200 μΩ·eta is deposited in the through hole 7 in a range of 10 μm×10 μm by a focused ion beam excitation CVD method.

Next, the ion beam current was set to 10 pA, and the beam diameter was set to 0.1 μ.
m, Ga ions are irradiated onto the surface of the integrated circuit 11, and a secondary electron image is observed at a magnification of 1000 times or less. Ga
When the ions are incident on the protective film 6, for example an insulating film such as a silicon nitride film, the insulating film is positively charged. Therefore, only a small amount of secondary electrons are emitted from the surface of the insulating film, and a small signal is transmitted to the secondary electron detector 16. Further, when Ga ions are incident on a metal surface such as the W metal film 8, the charges flow into the conductive coating 9, for example, the A1 alloy film, without charging the metal film. In addition, in the contact part, the conductive coating 9,
It flows into the silicon substrate 1 through the impurity diffusion layer 2 . Therefore, a larger amount of secondary electrons are emitted at the surface of the W metal film 8 and at the contact portion than at the protective film 6. As a secondary electron image,
By appropriately selecting the high voltage applied to the secondary electron detector 16 and the DC level of the video signal, the surface of the W metal film 8 and the contact portion can be observed.

If there is a disconnection in the wiring, the flow of charge is stopped at the disconnection point 9 of the wiring, so that no charge flows into the contact portion of the disconnection portion. Therefore, the contact portion 10 at the disconnected portion is not observed as a secondary electron image. Due to this,
It is possible to detect the location of wire breakage.

Here, Ga ions are introduced into the protective film 6 and charging occurs, but if there are ions that penetrate the protective film 6, the failure analysis method shown here becomes less accurate. However, in reality, since the diameter of ions is very large compared to electrons, the mean free path of ions injected into a material is quite short, and various materials commonly used as protective films, such as silicon nitride, For silicon compounds such as silicon oxide and silicon oxide, when the acceleration energy is about 30 keV, the surface of the material is heated by several hundreds of amps.
It can only penetrate to a certain extent. Further, the penetration depth of ions is about several hundred A at an accelerating voltage of about 30 to 100 keV, which is commonly used.

From the above, this analysis method can produce the effects listed above if the thickness of the protective film 6 is several hundred amps or more.

In addition, here, ions are scanned over the material to observe the secondary electron image generated from the material on the surface of the integrated circuit device, but the ions irradiated to the metal film 8 pass through the conductive film 9 to the silicon. It flows into the silicon substrate 1 through the impurity diffusion layer 2 formed on the substrate 1 . On the other hand, if there is a disconnection point 9 as in the integrated circuit device of the first embodiment, the ionic current flows only from the impurity diffusion layer 2. If there is no disconnection, the ionic current will pass through the conductive film 5 to the impurity diffusion layer 2.
and flows out from 10. By detecting the ion current from the silicon substrate 1 in this way, it is possible to conduct electrical failure analysis by determining whether the ion current is coming from the impurity diffusion layer 2 or from the impurity diffusion layers 2 and 10. I can do it.

In this case, it is sufficient that the ion beam used for analysis is at least the W metal film 8.

Furthermore, the cause of the disconnection can be elucidated by processing the cross section of the disconnected area by sputter etching using a focused ion beam and observing the secondary electron image of the structure of the disconnected area.

A second embodiment of the present invention, a method for detecting a disconnection location in a multilayer wiring structure, will be described below with reference to the drawings. FIG. 3 shows a cross section of a wiring portion of an integrated circuit in a second embodiment of the present invention.

In FIG. 3, 21 is a silicon substrate, 22 is an impurity diffusion layer, 23 is an insulating film between eyebrows, and 24 is a contact window A125.
26 is the lower layer AI wiring, 26 is the insulating film between the eyebrows, 27 is the upper layer A1 wiring, 28 is the protective film, 29 is the first layer Al wiring disconnection point, 3
0 is the contact window B131 where the second layer Al wiring is broken.

First, in order to easily detect the disconnection point, the protective film 28 is removed using a dry etching device using a gas containing fluorine, such as a mixture of Freon gas (CF 4 ) and oxygen gas, and the second layer Al wiring 27 is removed. Expose (Figure 3 (
b)). Next, as a focused ion beam, for example, an acceleration voltage of 30 kV, an ion beam current of 10 pA, a beam diameter of 0.1
Positive Ga ions of μm are irradiated onto the surface of the integrated circuit 11, and a secondary electron image of the second layer AI wiring is observed at a magnification of 1000 times or less.

As explained in Example 1, a secondary electron image can be obtained by appropriately selecting the high voltage applied to the secondary electron detector 16 and the video signal DC level based on the secondary electron emission characteristics caused by ion beam irradiation. The surface of the layered Al wiring 27 and the contact window are observed.

If there is a disconnection in the second layer Al wiring 27, the flow of charge is interrupted at the disconnection point 29, as described in the first embodiment. Therefore, the amount of secondary electron emission is extremely reduced at the disconnection location. With this, it is possible to detect a disconnection point in the wiring. Although it has been shown here that the failure analysis can be performed electrically in the first embodiment, it goes without saying that the failure analysis can be performed electrically in the second embodiment as well, using exactly the same method.

When there is a disconnection in the first layer Al wiring 25, as explained in the first embodiment, the flow of charge stops at the disconnection point 31, so that the charge does not flow into the contact part of the disconnection ( Therefore, the contact portion 30 at the disconnected portion is not observed as a secondary electron image.Thereby, the disconnected portion 31 of the first layer AI wiring 25 can be detected.

In addition, the cause of the disconnection can be elucidated by performing cross-sectional processing of the disconnection location by sputter etching using a focused ion beam and observing the structure of the disconnection portion of the multilayer wiring as a secondary electron image.

In this example, an A1 alloy film was used as the conductive film, but a polycrystalline silicon film or a silicide film may also be used.

Similar effects can be obtained with multilayer films including polycrystalline silicon films and high melting point metal films.

Effects of the Invention As described above, according to the present invention, a fault location can be easily detected, and a fault location can be easily detected even in a device in which integrated circuits are highly integrated.

[Brief explanation of drawings]

FIG. 1 is a sectional view of an integrated circuit according to a first embodiment of the present invention, FIG. 2 is a configuration diagram showing a failure analysis device of the present invention, and FIG.
Figures (a) and (b) are sectional views of an integrated circuit according to a second embodiment of the present invention, respectively. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 2... Impurity diffusion layer, 3... Interlayer insulating film, 4... Contact window A, 5... Conductive film, 6...
・Protective film, 7...Through hole, 8...
・W metal film, 9...Disconnection point, 10...
・Contact window B111...Integrated circuit device, 1
2...Scanning focused ion beam probe, 13.
...Ion gun, 14...Accelerator, 15.
...Irradiation ion current control device, 16...
Secondary electron detector, 17... Gas gun, 21...
... silicon substrate, 22 ... impurity diffusion layer,
23... Interlayer insulating film, 24... Contact window A125... First layer AI wiring, 26...
...Interlayer insulating film, 27...Second layer AIWi
! Line, 28...Main M#, 29...1st
Layer AI wiring disconnection point, 30...Contact window B
131...Second layer AI wiring disconnection location.

Claims (3)

[Claims] (1) A first ion beam is irradiated to a predetermined region of a semiconductor substrate in which at least a first conductive film and an insulating film are formed in this order, and the insulating film is etched to expose the first conductive film. forming a second conductive film using a second ion beam in at least a region including the window; and forming a third conductive film on the surface of the insulating film and the second conductive film.
A method for analyzing a failure of an integrated circuit, comprising the steps of: scanning with the third ion; and detecting secondary electrons generated during scanning with the third ion. (2) A first ion beam is irradiated to a predetermined region of a semiconductor substrate on which at least a first conductive film and an insulating film are formed in this order, and the insulating film is etched to expose the first conductive film. a step of forming a second conductive film with a second ion beam in at least a region including the window; a step of scanning the surface of the second conductive film with a third ion; A method for analyzing a failure of an integrated circuit, comprising the step of detecting an ion current generated by the third ion scan. (3) The integrated circuit failure analysis method according to claim (1) or (2), wherein the first and third ions are ions of the same element.