JPH0453074Y2 - - Google Patents
Info
- Publication number
- JPH0453074Y2 JPH0453074Y2 JP1987039934U JP3993487U JPH0453074Y2 JP H0453074 Y2 JPH0453074 Y2 JP H0453074Y2 JP 1987039934 U JP1987039934 U JP 1987039934U JP 3993487 U JP3993487 U JP 3993487U JP H0453074 Y2 JPH0453074 Y2 JP H0453074Y2
- Authority
- JP
- Japan
- Prior art keywords
- diode
- coil
- midpoint
- capacitor
- transmitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Transceivers (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は、無線機におけるアンテナの送・受信
切換スイツチの改良に関する。[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to an improvement in a transmission/reception switching switch for an antenna in a radio device.
特に携帯型無線機に対して電池の使用時間を延
ばして携帯使用の益を一層高めるには、送・受信
を切り換えるアンテナスイツチが改良されるべき
である。 In particular, the antenna switch that switches between transmitting and receiving should be improved in order to extend the battery life of portable radios and further increase the benefits of portable radios.
従来のRXノツチフイルタータイプのアンテナ
スイツチ回路は、第2図のように、送信時に接続
される電池TXBとアースとの間に直列状態で働
く2個のダイオードD3,D4を用い、ダイオード
間にコイル5とコイル7を接続し、アースされた
並列の抵抗RとコンデンサCをダイオードD4の
出力端に接続したものである。
As shown in Figure 2, the conventional RX notch filter type antenna switch circuit uses two diodes D 3 and D 4 that operate in series between the battery TXB connected during transmission and the ground. Coils 5 and 7 are connected to the terminal, and a grounded parallel resistor R and capacitor C are connected to the output terminal of the diode D4 .
受信回路部RXの入力端は前記コイル5とコイ
ル7の中間点に接続し、アンテナANTは前記ダ
イオードD3とコイル5の中間に接続される。コ
イル7とコンデンサCにより送信部TX周波数の
ノツチフイルターを形成し、受信回路部RXと送
信回路部TXとの所要のアイソレーシヨンを得
た。 The input end of the receiving circuit RX is connected to the midpoint between the coil 5 and the coil 7, and the antenna ANT is connected to the midpoint between the diode D3 and the coil 5. The coil 7 and the capacitor C form a notch filter for the transmitting section TX frequency, and the required isolation between the receiving circuit section RX and the transmitting circuit section TX is obtained.
上記従来例は、ダイオードが2本直列に入つて
アースされるようにしたことから、電圧降下がダ
イオード2本分になる。その為この回路に入つて
いく電力の大部分が抵抗Rで消費され無駄な熱に
変わるだけである。この無駄な電力消費は無くす
必要がある。
In the conventional example, two diodes are connected in series and grounded, so the voltage drop is equal to the voltage drop of two diodes. Therefore, most of the electric power that enters this circuit is consumed by the resistor R and turns into wasted heat. This wasteful power consumption needs to be eliminated.
本考案は、送信部TX出力端とアンテナANT
間にダイオードD1を接続し、前記アンテナANT
と前記ダイオードD1との中間点と接続するコイ
ルL4に接続したコイルL8を逆向きにダイオード
D2に接続すると共にこのダイオードD2にアース
したコンデンサC1を接続し、前記コイルL4とコ
イルL8の中間点に受信部RXの入力端および内部
回路RFを接続し、電源TXBの電力供給端を前記
ダイオードD1と送信部TXの中間点および前記ダ
イオードD2とコンデンサC1との中間点に接続し、
該電源に対して前記ダイオードD1,D2が並列に
接続されていることを特徴とする低消費電力形ア
ンテナスイツチであつて、上記問題点を解決し
た。
This invention consists of transmitter TX output end and antenna ANT
Connect a diode D1 between the antenna ANT
The coil L 8 connected to the coil L 4 connected to the midpoint between the diode D 1 and the diode in the opposite direction
D 2 and a grounded capacitor C 1 is connected to this diode D 2 , and the input terminal of the receiver RX and the internal circuit RF are connected to the midpoint between the coil L 4 and the coil L 8 , and the power of the power source TXB is a supply end is connected to the midpoint between the diode D 1 and the transmitter TX and the midpoint between the diode D 2 and the capacitor C 1 ;
The present invention is a low power consumption type antenna switch characterized in that the diodes D 1 and D 2 are connected in parallel to the power source, and the above problem has been solved.
送信時は、電源TXBの電力が供給されて、ア
ンテナANTに向う電流は第1図において抵抗R1
−コイルL1−ダイオードD1−コイルL4−コイル
L3に流れ、ダイオードD1がONする。これにより
送信部TXとアンテナANT間が導通する。同時
に、電源TXB−抵抗R2−コイルL2−ダイオード
D2−コイルL8−コイルL3に流れる電流がダイオ
ードD2をONする。並列に接続したダイオード
D1,D2の導通とともに、コイルL8とコンデンサ
C1が送信部TX周波数に対してノツチフイルタ−
を形成して、送信部TXと受信部RX間のアイソ
レーシヨンをとる。また、コイルL3の電位は、
電源TBXに対しダイオードD1とダイオードD2が
並列になる為、ダイオード一本分の電圧降下にと
どまる高電位であつて、ここでは内部回路のラジ
オ周波数RFハイブリツト・ドライバー回路RFに
その高電圧を負荷する。例えば電源TXBが7.2V
の電池の場合、ダイオードD1又はD2が通常0.7V
の電圧降下を示すから、上記ドライバー回路RF
には6.5Vを作用させることが出来る。6.5Vは通
常の回路を動作させるに十分な電圧である。
During transmission, power is supplied from the power supply TXB, and the current flowing to the antenna ANT is connected to the resistor R 1 in Figure 1.
−Coil L 1 −Diode D 1 −Coil L 4 −Coil
The current flows to L 3 and diode D 1 turns on. This establishes conduction between the transmitter TX and the antenna ANT. At the same time, power supply TXB − resistor R 2 − coil L 2 − diode
The current flowing through D 2 - Coil L 8 - Coil L 3 turns on diode D 2 . Diodes connected in parallel
Along with conduction of D 1 and D 2 , coil L 8 and capacitor
C1 is a notch filter for the transmitter TX frequency.
to provide isolation between the transmitter TX and receiver RX. Also, the potential of coil L 3 is
Since diode D 1 and diode D 2 are connected in parallel to the power supply TBX, the voltage drop is only one diode high, and the high voltage is applied to the radio frequency RF hybrid driver circuit RF in the internal circuit. load. For example, power supply TXB is 7.2V
For batteries, the diode D 1 or D 2 is typically 0.7V
Since the above driver circuit shows a voltage drop of RF
6.5V can be applied to. 6.5V is enough voltage to operate normal circuits.
受信時は、電源TXBの電力は供給されず、上
記ダイオードD1をOFFにする。これによりアン
テナANT−受信部RXが導通し、受信を保持す
る。 During reception, power from the power supply TXB is not supplied and the diode D1 is turned off. As a result, the antenna ANT and the receiving section RX are brought into conduction and reception is maintained.
上記抵抗R1,R2はダイオードD1またはD2に流
れ込む電流をバランスさせるために使用し、数Ω
程度である。 The above resistors R 1 and R 2 are used to balance the current flowing into the diode D 1 or D 2 , and are several Ω.
That's about it.
本考案のアンテナスイツチは、上記回路特性に
よつて従来の制限が解消される。第2図の抵抗R
による電力消費を制御できないから、その代わり
の手段として電池電源TXBの消耗時間を延ばす
為にアンテナスイツチの電流を極力抑える方法を
取らざるを得ず、これが所要の性能を出す為の技
術的制約となつていた。本考案のアンテナスイツ
チでは、その電力を内部回路の動作に利用する方
式にし、電流を増加しても無線機の電力を無駄に
消費する結果とならないから、所要性能に必要な
付帯設計条件が緩和されて回路コストを下げるこ
とができる上に、従来以上にするための高性能化
を図ることができる。 The antenna switch of the present invention overcomes the conventional limitations due to the above circuit characteristics. Resistance R in Figure 2
Since it is not possible to control the power consumption by I was getting used to it. In the antenna switch of this invention, the power is used to operate the internal circuit, and even if the current is increased, the power of the radio is not wasted, so the incidental design conditions necessary for the required performance are eased. In addition to reducing circuit costs, it is also possible to achieve higher performance than ever before.
無線機電源に並列に接続した2本のダイオード
は、送信・受信間のアイソレーシヨンの形成のた
めにダイオード1本分の電圧降下でそれを形成す
ることができる結果、アンテナスイツチのアイソ
レーシヨンを形成した後の十分な高電圧で無線機
の内部回路を動作させることができるから、従来
熱として消費された電力を有効に使用出来る一
方、アンテナ電流を抑えたことにより伴つた従来
のコスト高周辺回路を性能を落さずにより合理的
な回路に設計変更する等、本考案の改良は広汎な
改良効果を付随させる。
Two diodes connected in parallel to the radio power supply can form isolation between transmit and receive with just the voltage drop of one diode, and as a result, the internal circuitry of the radio can be operated with a sufficiently high voltage after forming isolation for the antenna switch. This means that the power that would previously have been consumed as heat can be used effectively, while the improvements of this invention bring about a wide range of improvements, such as the ability to redesign the previously costly peripheral circuits that were associated with suppressing the antenna current into more rational circuits without sacrificing performance.
併せて、送信時の電力消費を抑えたことで、特
に携帯形無線機の内蔵電池の使用時間を長くし
て、その使用の益をより高めることができる。 In addition, by suppressing power consumption during transmission, it is possible to extend the usage time of the built-in battery of the portable radio, thereby further increasing the benefits of its use.
第1図は本考案の一実施例を示す回路図で、第
2図は従来例の回路図である。
D1,D2……ダイオード、L1,L2,L3,L4,L8
……コイル、C1,……コンデンサ、TX……送信
部、TXB……電源、RX……受信部、RF……内
部回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional example. D 1 , D 2 ... Diode, L 1 , L 2 , L 3 , L 4 , L 8
...coil, C 1 , ... capacitor, TX ... transmitter, TXB ... power supply, RX ... receiver, RF ... internal circuit.
Claims (1)
ードD1を接続し、前記アンテナANTと前記ダイ
オードD1との中間点と接続するコイルL4に接続
したコイルL8を逆向きにダイオードD2に接続す
ると共にこのダイオードD2にアースしたコンデ
ンサC1を接続し、該コンデンサC1と前記コイル
L8でノツチフイルターを形成して送信部TXと受
信部RX間をアイソレーシヨンする一方、前記コ
イルL4とコイルL8の中間点に受信部RXの入力端
および内部回路RFを接続し、電源TXBの電力供
給端を前記ダイオードD1と送信部TXの中間点お
よび前記ダイオードD2とコンデンサC1との中間
点に接続し、該電源に対して前記ダイオードD1,
D2が並列に接続されていることを特徴とする低
消費電力形アンテナスイツチ。 A diode D1 is connected between the transmitter TX output end and the antenna ANT, and a coil L8 connected to the coil L4 connected to the midpoint between the antenna ANT and the diode D1 is connected to the diode D2 in the opposite direction. At the same time, a grounded capacitor C 1 is connected to this diode D 2 , and the capacitor C 1 and the coil
L8 forms a notch filter to provide isolation between the transmitting section TX and the receiving section RX, while connecting the input end of the receiving section RX and the internal circuit RF to the intermediate point between the coil L4 and the coil L8 , The power supply end of the power supply TXB is connected to the midpoint between the diode D1 and the transmitter TX and the midpoint between the diode D2 and the capacitor C1 ,
A low power consumption antenna switch characterized by D2 being connected in parallel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987039934U JPH0453074Y2 (en) | 1987-03-20 | 1987-03-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987039934U JPH0453074Y2 (en) | 1987-03-20 | 1987-03-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63149648U JPS63149648U (en) | 1988-10-03 |
JPH0453074Y2 true JPH0453074Y2 (en) | 1992-12-14 |
Family
ID=30853567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987039934U Expired JPH0453074Y2 (en) | 1987-03-20 | 1987-03-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0453074Y2 (en) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5751353U (en) * | 1980-09-09 | 1982-03-24 | ||
JPS57204747U (en) * | 1981-06-23 | 1982-12-27 |
-
1987
- 1987-03-20 JP JP1987039934U patent/JPH0453074Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS63149648U (en) | 1988-10-03 |
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