JPH0450664B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a recording medium drive device that controls the motion phase of a recording medium such as a magnetic tape or a magnetic disk.

For example, when recording and reproducing digital audio signals using a magnetic tape with a fixed head, the magnetic tape is run at a specified speed, and a constant frequency phase detection servo is attached to a control track that extends in the longitudinal direction of the magnetic tape. Pulses are recorded, and upon reproduction, the servo pulses are reproduced and compared in phase with a servo reference signal, and the comparison output controls the rotational speed of the campus motor to control the running of the magnetic tape.

By the way, when sprite editing or simple electronic editing is performed, the phase of the servo pulse reproduced at the joint of the signal becomes discontinuous, and a large phase difference may occur between the servo pulse and the servo reference signal. This phase difference is corrected after a predetermined period of time, but in the process, the running speed of the magnetic tape changes more than the specified value, and the frequency of the reproduced data also changes in response to the change in speed. Problems arise such as not being able to perform extraction or not being able to correct time base errors using a TBC (time base correction device).

An object of the present invention is to minimize the change in running speed at the joint of a magnetic tape during playback when the phase of the servo pulse becomes discontinuous at the joint due to splice editing or simple electronic editing as described above. This is what I did. The present invention is applicable to recording and reproducing video signals in addition to audio signals, and to recording and reproducing using a rotating head.

In one embodiment described below, the present invention is applied to a fixed head type PCM tape recorder. As shown in Figure 1, in this example:
8 data tracks TD ₀ to TD ₇ and 2 analog tracks per 1/4 inch wide magnetic tape
TA ₁ and TA ₂ form a control track TC and a time code track TT. These eight data tracks TD ₀ to TD ₇ include
Each audio PCM signal of 8 channels is recorded with predetermined encoding. As shown in FIG. 2A, the recording positions of the data tracks TD (TD ₀ to TD ₇ ) and the control tracks TC coincide with each other in the width direction in units of one sector. One sector of the data track TD contains four blocks of data. As shown in Figure 2B, 16 words of data (one word is 16 bits), a data synchronization signal (shown with diagonal lines) added at the beginning, and a CRC code added at the end are used to create one
A transmission block (simply referred to as one block) is constructed. A 3-bit block address signal is inserted in the data synchronization signal section, and both this block address signal and data are CRC
It is subject to error detection by One sector of the control track TC is composed of a 4-bit synchronization signal (indicated by a hatched section), a 16-bit control word, a 28-bit sector address signal, and a 16-bit CRC code. control word is recorded
It is used to determine the sampling frequency and recording format of the PCM audio signal.The sector address is an absolute value that advances from address 0, and this control word and sector address
It is subject to error detection using CRC. As a modulation method for recording on the data track TD, a method capable of high-density recording such as the 3PM method is used, and as a modulation method for recording on the control track TC, a method such as the FM method is used. Least significant bit of sector address signal
_S0 is made to match the most significant bit of each block address signal of the four blocks included in the sector. In other words, block address [B ₂ B ₁ B ₀ ] is [S ₀ 00] within that sector.
It changes sequentially as [S ₀ 01], [S ₀ 10], and [S ₀ 11]. As shown in FIG. 3, in the running direction of the magnetic tape 1, there are a recording head HR, a reproduction head HP, and a recording head HR'.
The heads are arranged in such a way that they are located sequentially.
Each head has ten recording or reproducing magnetic gaps arranged in-line in the width direction of the magnetic tape 1, eight of which correspond to data tracks TD ₀ to TD ₇ , and the other It corresponds to two control tracks TC and time code track TT, respectively. The first recording on the magnetic tape 1 is performed by the recording head HR, and the recording head HR' is used for sync recording, cut-in/out, etc. The control track TC once formed by the recording head HR is not rewritten, but only the data track is rewritten.

For the control track TC mentioned above, the fourth
In the figure, a CTL head shown at 2 is provided for both recording and reproducing purposes. The reproduction signal of the CTL head 2 is supplied to the control signal detection circuit 3 via a reproduction amplifier, a demodulation circuit, etc. (not shown), and a servo pulse _P1 is taken out as an output thereof. Servo pulse _P1 is generated at a rate of one per sector corresponding to the timing at which the synchronization signal of the control track TC is detected. This servo pulse _P1 is supplied as a sample pulse to a sample hold circuit 4 serving as a phase comparator.

This sample hold circuit 4 receives a reference periodic function from a reference periodic function generating circuit 6, for example, a reference signal whose digital signal value increases sequentially with time.
_P2 is supplied. A clock CK is supplied from the clock generation circuit 5 to the reference periodic function generation circuit 6, and a reference signal _P2 is generated based on this clock CK. Here, when the running speed of the magnetic tape 1 is at the specified speed in the forward operation, the reference signal P ₂ has a frequency f ₂ that is an integer multiple of 2 or more, for example, 4 times (4f ₁ ) the frequency f ₁ of the servo pulse P ₁ . have. In other words, four periods of the reference signal _P2 are included within one prescribed period of the servo pulse _P1 , and the servo pulse _P1 samples a signal of any of these periods.

The phase error signal generated from the sample hold circuit 4 is supplied to the adder circuit 7, and the speed detection circuit 8
is added to the speed error signal from This speed detection circuit 8 is supplied with pulses with a frequency proportional to the rotational speed from a tachometer generator 9 that rotates integrally with the capstan motor 12, and a speed error signal having a magnitude corresponding to the frequency of this pulse is formed. Ru. Since the error signal obtained from the output of the adder circuit 7 is a digital signal, it is converted into an analog signal by the D/A converter circuit 10, and is passed through a low-pass filter (not shown) and a servo amplifier 11 to the DC motor. is supplied to the capstan motor 12 of. The speed error may be detected from the frequency of the servo pulse _P1 .

To further explain one embodiment of this invention,
As shown in FIG. 5, the above-mentioned sample hold circuit 4 and reference periodic function generation circuit 6 are realized by an m-bit counter 13 and a D-type flip-flop circuit 15.

The counter 13 receives a clock from the terminal 14.
CK is supplied, and the m bits from the most significant bit _Q1 to the least significant bit _Qn are repeatedly output from all 0 to all 1. Then, the upper 2 bits of counter 13 _Q1
and (m- ₂ ) bits excluding Q2 are used as the reference signal _P2 . FIG. 6A shows changes in the upper two bits Q ₁ and Q ₂ of the output of the counter 13,
This represents four modes 0 to 3. Further, FIG. 6B shows changes in the output bits Q ₃ to _{Q n} (reference signal P ₂ ) of the counter 13 converted into analog values. These output bits Q ₃ to _{Q n} are
For example, it changes in 2m ^-2 steps from a certain negative value to a certain positive value with 0 as the center. If the frequency of clock CK is f ₃ , then (f ₃ =
2m ^-2 ×f ₂ ).

The D-type flip-flop circuit 15 consists of m D-type flip-flops D ₁ to _{D n} , and the m-bit output of the counter 13 described above is supplied as its data input, respectively, and as the clock input of the flip-flops D ₁ to D _n . When the clock CK is supplied, a servo pulse is sent to the clock enable terminal.
_P1 is supplied, and at the timing of this servo pulse _P1 , the output of the counter 13 is fetched by the clock CK and output as _R1 to _Rn . Servo pulse _P1 converts the playback control signal shown in FIG. 7A from terminal 16 to D-type flip-flop 1.
NAND gate 20 of 7, 18 and inverter 19
It is formed by processing with. That is, a pulse delayed and inverted by one clock period is generated from inverter 19 (FIG. 7B), and a pulse delayed by two clock periods (FIG. 7C) is generated from flip-flop 18, both of which are connected to the NAND circuit.
By being supplied to the gate 20, a servo pulse _P1 having a pulse width of one clock period at the timing of the rising edge of the reproduction control signal as shown in FIG. 7D is formed.

FIG. 6C shows an example of the servo pulse _P1 . When the running of the magnetic tape is completely phase-locked to the reference signal _P2 , the zero value of the reference signal _P2 is sampled by the servo pulse _P1 ;
When a phase shift exists, the flip-flop circuit 15 generates a value that causes a speed change to compensate for the phase shift. FIG. 6D shows the sampling output generated from this flip-flop circuit 15.
R ₃ to R _n are converted into analog values and shown. Further, the upper two bits of the output of the flip-flop circuit 15 indicate the mode to which of the four reference signals the phase is locked, as shown in FIG. 6E.

Here, due to splice editing, if the phase of the reproduced servo pulse _P1 changes rapidly as shown in Figure 6C, the state locked to 0 mode will be released. . In the illustrated example, the fourth reference signal and servo pulse
P ₁ is in a state where the phase is compared, that is, 3 modes,
Initially, from the flip-flop circuit 15 to FIG.
Large level sampling output R ₃ ~ as shown in
When R _n is generated, its upper two bits R ₁ and R ₂ indicate the lock mode as shown in FIG. 6E. The servo pulse that occurs after that
_P1 and the fourth reference signal are compared in phase, and after a predetermined period of time, the running state of the magnetic tape 1 is stabilized.

Note that as the reference signal _P2 , one having a waveform as shown in FIG. 8 can be used. Figure 8A
8B shows a trapezoidal waveform, and FIG. 8C shows a trapezoidal waveform.
The waveform shown in FIG. 8D is a sine wave. When the sample and hold circuit 4 has an analog configuration consisting of a switching element and a hold capacitor, an analog waveform is used as the reference signal _P2 , and when it has a digital configuration as described above, the value changes digitally. A signal is used.

As understood from the description of one embodiment above,
According to this invention, the maximum value of the speed change of the recording medium that occurs when the phase of the reproduced servo pulse changes discontinuously can be suppressed to a small value, and the time required to reach a stable state (settling time ) can be made shorter. If the number of reference signals is n, the maximum value of speed change can be suppressed to 1/n compared to the case where (n=1).

[Brief explanation of the drawing]

1 and 2 are schematic diagrams used to explain the track pattern and data structure of a multi-channel tape recorder to which the present invention can be applied, FIG. 3 is a schematic diagram showing the head arrangement, and FIG. FIG. 5 is a block diagram showing a specific configuration of an embodiment of the present invention. FIGS. 6 and 7 are time charts used to explain the operation of an embodiment of the present invention. , FIG. 8 is a waveform diagram showing a modified example of the reference signal. 1...magnetic tape, 2...CTL head, 4...
...Sample hold circuit, 6...Reference periodic function generation circuit, 12...Capstan motor.

Claims (1)

[Claims] 1 A reference periodic function comprising means for detecting a servo pulse for phase detection of a recording medium from the recording medium and a circuit for driving control of the recording medium, and having a frequency that is an integral multiple of 2 or more of the frequency of the servo pulse at a predetermined high speed. A recording medium drive device that samples the output of the generator using the servo pulse, and applies this sampling output to the drive control circuit to control the motion phase of the recording medium.